Patent application number | Description | Published |
20090161801 | RECEIVER WITH DISCRETE-TIME FILTERING AND DOWN-CONVERSION - A receiver with discrete-time filtering and down-conversion is provided. The receiver includes a mixer and a sampling-and-filtering device. The sampling-and-filtering device is coupled to the mixer. The mixer receives a first radio frequency signal, and then mixes the first radio frequency with a reference signal to generate a first signal. The first signal is a continuous-time signal. The sampling-and-filtering device sequentially samples, filters, and down-converts the first signal according to a clock signal to generate a second signal. | 06-25-2009 |
20090170466 | CIRCUIT WITH PROGRAMMABLE SIGNAL BANDWIDTH AND METHOD THEREOF - A circuit with programmable signal bandwidth is provided. The circuit includes a first charge and discharge device, a first reset device, and a first variable capacitor device. The first reset device is coupled to the first charge and discharge device, and the first variable capacitor device is coupled to the first charge and discharge device. The first reset device is controlled by a discharge enable signal and used to provide a first discharge path. When the discharge enable signal turns off the first reset device, the first variable capacitor device generates a first total equivalent capacitor to the first charge and discharge device according to n reference signals, and n is an integer greater than 0. | 07-02-2009 |
20110291750 | CHARGE DOMAIN FILTER AND BANDWIDTH COMPENSATION CIRCUIT THEREOF - A charge domain filter (CDF) and a bandwidth compensation circuit of the CDF are provided. The CDF includes an amplifier, a plurality of switch-capacitor networks (SCNs), a connector, a current adder (CA) and a bandwidth compensation circuit. A first input terminal of the amplifier receives an input signal, and an output terminal thereof is connected to input terminals of the SCNs. The connector is connected between the output terminal of the SCNs and the CA for configuring coupling status of the output terminals of the SCNs and input terminals of the CA. The bandwidth compensation circuit senses a portion of or all of the output terminals of the SCNs and the CA, and outputs the sensing result to a second input terminal of the amplifier. | 12-01-2011 |
20130049850 | CHARGE DOMAIN FILTER APPARATUS - A charge domain filter (CDF) apparatus having a bandwidth compensation circuit is provided. The bandwidth compensation circuit includes a configurable power-reference cell (CPC) and/or a programmable-delay cell (PDC). The CPC receives and adjusts an output of the CDF to obtain a sensing power, and outputs the sensing power to the CDF. The PDC receives and delay an output of the CDF, and outputs a delay result to the CDF. The bandwidth compensation circuit having a flexible structure, so as to implement X-axis (frequency) compensation and/or Y-axis (power or gain) compensation of a frequency response diagram according to a design requirement. | 02-28-2013 |
20130120033 | CHARGE-DOMAIN FILTER AND METHOD THEREOF - A charge domain filter (CDF) is provided. The CDF includes a switched-capacitor network (SCN) and a clock generator. An input of the SCN receives an input signal. The SCN samples the input signal according to clock signals with different phases. The clock generator is coupled to the SCN for providing the clock signals. The clock generator adjusts phase differences of the clock signals or pulse widths of the clock signals in accordance with a control signal. | 05-16-2013 |
20130154725 | CHARGE DOMAIN FILTER AND METHOD THEREOF - A charge domain filter (CDF) and a method thereof are provided. The CDF includes an amplifier, a first switch-capacitor network (SCN), a second SCN, a third SCN and a fourth SCN. Input terminals of the first and the second SCNs are coupled to first and second output terminals of the amplifier, respectively. Input and output terminals of the third SCN are coupled to output terminals of the first and the second SCNs, respectively. Input and output terminals of the fourth SCN are coupled to output terminals of the second and the first SCNs, respectively. A mode control terminal of the third SCN receives a first mode signal to set an impulse response mode of the third SCN. A mode control terminal of the fourth SCN receives a second mode signal to set an impulse response mode of the fourth SCN. | 06-20-2013 |
20140002165 | CHARGE-DOMAIN FILTER AND METHOD THEREOF AND CLOCK GENERATOR | 01-02-2014 |
20150200794 | CHARGE-DOMAIN FILTER APPARATUS AND OPERATION METHOD THEREOF - A charge-domain filter (CDF) apparatus and an operation method thereof are provided. The CDF apparatus includes an input-signal combination network (ISCN), a switch-capacitor network (SCN) module, an output-signal combination network (OSCN), and a bandwidth compensation network (BCN). The input terminal of the ISCN receives an input signal. The SCN module is connected between the ISCN and the OSCN. The OSCN outputs an output signal of the CDF apparatus. The BCN senses the signal of the SCN module, senses the signal of the OSCN, or senses the signal of each of the SCN module and the OSCN, and correspondingly generates a forward signal or a feedback signal for the ISCN or the OSCN according to the sensing result to perform bandwidth compensation. | 07-16-2015 |