Patent application number | Description | Published |
20110009309 | Hard Surface Cleaning Composition - The present invention relates to a hard surface cleaning composition comprising a polybetaine polymer, wherein said polybetaine polymer comprises a zwitterionic unit A or a mixture thereof, wherein said unit A comprises a betaine group or a mixture thereof and wherein said betaine group of said unit A is a sulphobetaine group or a mixture thereof, and a vinylpyrrolidone homopolymer or copolymer, wherein said polybetaine polymer and said vinylpyrrolidone homopolymer or copolymer are present in said composition at a weight ratio of polybetaine polymer to vinylpyrrolidone homopolymer or copolymer of at utmost 1.5:1. | 01-13-2011 |
20110129610 | METHOD FOR COATING A HARD SURFACE WITH AN ANTI-FILMING COMPOSITION - The present invention generally relates to a method of coating a hard surface, particularly glass, with an anti-filming composition comprising the steps of contacting the hard surface with an effective amount of a composition comprising a water-soluble polymer, wherein the water-soluble polymer comprises an alkoxylated polyacrylic acid. | 06-02-2011 |
20130150276 | METHOD OF PROVIDING FAST DRYING AND/OR DELIVERING SHINE ON HARD SURFACES - A method of providing fast drying and/or delivering shine on a hard surface with a composition comprising an amphiphilic graft polymer based on water-soluble polyalkylene oxides as a graft base and side chains formed by polymerization of a vinyl ester component, wherein said amphiphilic graft polymer is water-soluble or water-dispersible and has a weight average molar mass of from about 3,000 to about 100,000, and wherein said hard surface is selected from the group consisting of a household hard surface; a dish; flatware; glassware; cutlery; and mixtures thereof. | 06-13-2013 |
Patent application number | Description | Published |
20110121364 | HETEROJUNCTION BIPOLAR TRANSISTOR - According to an example embodiment, a heterostructure bipolar transistor, HBT, includes shallow trench isolation, STI, structures around a buried collector drift region in contact with a buried collector. A gate stack including a gate oxide and a gate is deposited and etched to define a base window over the buried collector drift region and overlapping the STI structures. The etching process is continued to selectively etch the buried collector drift region between the STI structures to form a base well. SiGeC may be selectively deposited to form epitaxial silicon-germanium in the base well in contact with the buried collector drift region and poly silicon-germanium on the side walls of the base well and base window. Spacers are then formed as well as an emitter. | 05-26-2011 |
20110198591 | METHOD OF MANUFACTURING HETEROJUNCTION BIPOLAR TRANSISTOR AND HETEROJUNCTION BIPOLAR TRANSISTOR - Disclosed is a method of forming a heterojunction bipolar transistor (HBT), comprising depositing a first stack comprising an polysilicon layer ( | 08-18-2011 |
20110269289 | TRANSISTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME - A method of manufacturing a transistor device ( | 11-03-2011 |
20120037914 | HETEROJUNCTION BIOPOLAR TRANSISTOR AND MANUFACTURING METHOD - A method of manufacturing a heterojunction bipolar transistor, including providing a substrate comprising an active region bordered by shallow trench insulation regions; depositing a stack of a dielectric layer and a polysilicon layer over the substrate; forming a base window in the stack, the base window extending over the active region and part of the shallow trench insulation regions, the base window having a trench extending vertically between the active region and one of the shallow trench insulation regions; growing an epitaxial base material inside the base window; forming a spacer on the exposed side walls of the base material; and filling the base window with an emitter material. A HBT manufactured in this manner and an IC including such an HBT. | 02-16-2012 |
20120086058 | TUNNEL FIELD EFFECT TRANSISTOR - A tunnel field effect transistor and a method of making the same. The transistor includes a semiconductor substrate. The transistor also includes a gate located on a major surface of the substrate. The transistor further includes a drain of a first conductivity type. The transistor also includes a source of a second conductivity type extending beneath the gate. The source is separated from the gate by a channel region and a gate dielectric. The transistor is operable to allow charge carrier tunnelling from an inversion layer through an upper surface of the source. | 04-12-2012 |
20120132961 | HETEROJUNCTION BIPOLAR TRANSISTOR MANUFACTURING METHOD AND INTEGRATED CIRCUIT COMPRISING A HETEROJUNCTION BIPOLAR TRANSISTOR - Disclosed is a method of manufacturing a heterojunction bipolar transistor comprising a substrate, an upper region of said substrate comprising an active region of the bipolar transistor bordered by shallow trench insulation, said active region comprising a buried collector region extending to a depth beyond the depth of the shallow trench insulation, the method comprising forming a trench in the substrate adjacent to said active region, said trench extending through the shallow trench insulation; at least partially filling said trench with an impurity; and forming a collector sinker in the substrate by developing said impurity to extend into the substrate to a depth beyond the depth of the shallow trench insulation. An IC comprising a heterojunction bipolar transistor manufactured by this method is also disclosed. | 05-31-2012 |
20120132999 | METHOD OF MANUFACTURING A BIPOLAR TRANSISTOR AND BIPOLAR TRANSISTOR - Consistent with an example embodiment, there is method of manufacturing a bipolar transistor comprising providing a substrate including an active region; depositing a layer stack; forming a base window over the active region in said layer stack; forming at least one pillar in the base window, wherein a part of the pillar is resistant to polishing; depositing an emitter material over the resultant structure, thereby filling said base window; and planarizing the deposited emitter material by polishing. Consistent with another example embodiment, a bipolar transistor may be manufactured according to the afore-mentioned method. | 05-31-2012 |
20130032891 | METHOD OF MANUFACTURING AN IC COMPRISING A PLURALITY OF BIPOLAR TRANSISTORS AND IC COMPRISING A PLURALITY OF BIPOLAR TRANSISTORS - A method of manufacturing an integrated circuit comprising bipolar transistors including first and second type bipolar transistors, the method comprising providing a substrate comprising first isolation regions each separated from a second isolation region by an active region comprising a collector impurity of one of the bipolar transistors; forming a base layer stack over the substrate; forming a first emitter cap layer of a first effective thickness over the base layer stack in the areas of the first type bipolar transistor; forming a second emitter cap layer of a second effective thickness different from the first effective thickness over the base layer stack in the areas of the second type bipolar transistor; and forming an emitter over the emitter cap layer of each of the bipolar transistors. An IC in accordance with this method. | 02-07-2013 |
20130056855 | METHOD OF MANUFACTURING IC COMPRISING A BIPOLAR TRANSISTOR AND IC - Disclosed is an integrated circuit and a method of manufacturing an integrated circuit comprising a bipolar transistor, the method comprising providing a substrate comprising a pair of isolation regions separated by an active region comprising a collector; forming a base layer stack over said substrate; forming a migration layer having a first migration temperature and an etch stop layer; forming a base contact layer having a second migration temperature; etching an emitter window in the base contact layer, thereby forming cavities extending from the emitter window; and exposing the resultant structure to the first migration temperature in a hydrogen atmosphere, thereby filling the cavities with the migration layer material. | 03-07-2013 |
20130087799 | BIPOLAR TRANSISTOR MANUFACTURING METHOD, BIPOLAR TRANSISTOR AND INTEGRATED CIRCUIT - Disclosed is a method of manufacturing a bipolar transistor, comprising providing a substrate ( | 04-11-2013 |
20130178037 | METHOD OF MANUFACTURING HETEROJUNCTION BIPOLAR TRANSISTOR AND HETEROJUNCTION BIPOLAR TRANSISTOR - A method of forming a heterojunction bipolar transistor by depositing a first stack comprising an polysilicon layer and a sacrificial layer on a mono-crystalline silicon substrate surface; patterning that stack to form a trench extending to the substrate; depositing a silicon layer over the resultant structure; depositing a silicon-germanium-carbon layer over the resultant structure; selectively removing the silicon-germanium-carbon layer from the sidewalls of the trench; depositing a boron-doped silicon-germanium-carbon layer over the resultant structure; depositing a further silicon-germanium-carbon layer over the resultant structure; | 07-11-2013 |
20140162426 | Bipolar transistor manufacturing method, bipolar transistor and integrated circuit - Disclosed is a method of manufacturing a bipolar transistor, comprising providing a substrate ( | 06-12-2014 |
20140167055 | METHOD OF PROCESSING A SILICON WAFER AND A SILICON INTEGRATED CIRCUIT - Methods and systems for processing a silicon wafer are disclosed. A method includes providing a flash memory region in the silicon wafer and providing a bipolar transistor with a polysilicon external base in the silicon wafer. The flash memory region and the bipolar transistor are formed by depositing a single polysilicon layer common to both the flash memory region and the bipolar transistor. | 06-19-2014 |
20150041862 | METHOD OF MANUFACTURING IC COMPRISING A BIPOLAR TRANSISTOR AND IC - Disclosed is a method of manufacturing an integrated circuit comprising a bipolar transistor, the method comprising providing a substrate ( | 02-12-2015 |
Patent application number | Description | Published |
20130060066 | METHOD FOR ISOMERISATION OF HOP ALPHA-ACIDS USING HETEROGENEOUS ALKALINE EARTH METAL BASED CATALYSTS - The invention relates to a process for the production of iso-alpha-acids starting from hop alpha-acids in which an hop alpha-acid containing feed is contacted with a heterogeneous alkaline earth metal based catalyst, that essentially does not dissolve in the alpha-acid containing feed or in the iso-alpha-acid product phase, either in solvent-free conditions or in the presence of water, carbon dioxide, or an organic solvent or a mixture thereof. The resulting mixture is subjected to a temperature of at least 293 K, preferably under an inert atmosphere, for a time sufficient to effect high conversion of the alpha-acid reactant into the iso-alpha-acid product. The molar ratio of alpha-acid to earth alkaline metal (Mg, Ca, Sr, Ba) varies preferably between 0.2 and 20. After the isomerisation process, the heterogeneous alkaline earth metal based catalyst can be quantitatively separated from the iso-alpha-acid product phase by liquid-solid separation techniques. | 03-07-2013 |
20130150626 | METHOD FOR HYDROGENATION OF ISO-ALPHA-ACIDS AND TETRAHYDRO-ISO-ALPHA- ACIDS TO HEXAHYDRO-ISO-ALPHA-ACIDS - The invention relates to a process for the production of hexahydro-iso-alpha-acids starting from iso-alpha-acids (or tetrahydro-iso-alpha-acids) in which iso-alpha-acids (or tetrahydro-iso-alpha-acids) are mixed with a heterogeneous ruthenium containing catalyst, that catalyzes the hydrogenation from iso-alpha-acids or tetrahydro-iso-alpha-acids to hexahydro-iso-alpha-acids, either in solvent-free conditions, or in the presence of a solvent phase (e.g. carbon dioxide, water, ethanol or another organ-ic solvent, or mixtures thereof), and in the absence or presence of other hop compounds (such as beta-acids). The resulting mix-ture is then subjected to a temperature at which the iso-alpha-acid (or tetrahydro-iso-alpha-acid) containing reaction medium is sufficiently low in viscosity to allow easy mixing with the heterogeneous ruthenium containing catalyst and held under a hydrogen containing atmosphere (either pure hydrogen gas or mixed with an inert gas) for a reaction tune sufficient to effect high conver-sion of the iso-alpha-acid (or tetrahydro-iso-alpha-acid) reactant into the hexahydro-iso-alpha-acid product. The molar ratio of iso-alpha-acid or tetrahydro-iso-alpha-acid to ruthenium varies between 1:1 and 2000:1. After the hydrogenation process, the hetero-geneous ruthenium containing catalyst can be separated from the hexahydro-iso-alpha-acid product phase by centrifugation, filtra-tion, decantation or other liquid-solid separation techniques. The hydrogenation process can be performed batch-wise or alterna-tively in continuous mode. | 06-13-2013 |
20130209653 | METHOD FOR ISOMERISATION OF HOP ALPHA-ACIDS TO ISO-ALPHA-ACIDS - The invention relates to a process for the production of iso-alpha-acids starting from alpha-acids in which an alpha-acid containing hop extract is mixed with a carbon-containing chemical compound with one or more functional groups containing a (basic) nitrogen atom with a lone pair (or mixtures thereof), either in solvent-free conditions or in the presence of solvents and preferably under an oxygen-free atmosphere. The resulting mixture is subjected to a temperature of at least 278 K for a time sufficient to effect the intended conversion of the alpha-acid reactant into the iso-alpha-acid product. The present invention further relates to iso-alpha-acid compositions obtained by said improved isomerisation process and to the use of said iso-alpha-acid compositions as bittering formulation and/or as source to obtain reduced or hydrogenated iso-alpha-acid compositions. | 08-15-2013 |
Patent application number | Description | Published |
20100224215 | Method for Reducing the Damage Induced by a Physical Force Assisted Cleaning - Disclosed is a method for performing a physical force-assisted cleaning process on a patterned surface of a substrate, including providing a substrate having at least one patterned surface, supplying a cleaning liquid to the patterned surface, and applying a physical force to the cleaning liquid in contact with the patterned surface, whereby the physical force leads to bubble formation in the cleaning liquid. Furthermore, and prior to applying the physical force, an additive is supplied to the surface, and the additive is maintained in contact with the surface for a given time, the additive and the time being chosen so that a substantially complete wetting of the surface by the cleaning liquid is achieved. | 09-09-2010 |
20100317185 | SUBSTRATE TREATING METHOD AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING THE SAME - A substrate treating method comprising a step of preparing a semiconductor substrate (W, | 12-16-2010 |
20110000504 | Method and Apparatus for Controlling Optimal Operation of Acoustic Cleaning - Methods and apparatuses for cleaning a surface of a substrate are presented. The method comprises positioning a substrate at a controllable distance from a piezoelectric transducer, supplying a cleaning liquid between the substrate and the transducer, applying an oscillating acoustic force to the cleaning liquid by actuating the transducer, and moving the transducer relative to the substrate. The method further comprises, while moving the transducer relative to the substrate, measuring a value that indicates a distance between a surface of the substrate and the transducer, comparing the measured value to a desired value, and adjusting the distance between the surface and the transducer so that the measured value is maintained substantially equal to the desired value. The measured value may be the distance between the surface of the substrate and the transducer or a phase shift between an alternating current and voltage applied to the transducer. | 01-06-2011 |
20110088719 | Method and Apparatus for Cleaning a Semiconductor Substrate - Disclosed are systems and methods for cleaning semiconductor substrates, wherein a nucleation structure having nucleation sites is mounted facing a surface of the substrate to be cleaned. The substrate and structure are brought into contact with a cleaning liquid, which is subsequently subjected to acoustic waves of a given frequency. The nucleation template features easier nucleation formation than the surface that needs to be cleaned by, for example, causing the template to have a higher contact angle when in contact with the liquid than the substrate surface to be clean. Therefore, bubbles nucleate on the structure and not on the surface to be cleaned. | 04-21-2011 |
20120227775 | Method and Apparatus for Controlling Optimal Operation of Acoustic Cleaning - Methods and apparatuses for cleaning a surface of a substrate are presented. The method comprises positioning a substrate at a controllable distance from a piezoelectric transducer, supplying a cleaning liquid between the substrate and the transducer, applying an oscillating acoustic force to the cleaning liquid by actuating the transducer, and moving the transducer relative to the substrate. The method further comprises, while moving the transducer relative to the substrate, measuring a value that indicates a distance between a surface of the substrate and the transducer, comparing the measured value to a desired value, and adjusting the distance between the surface and the transducer so that the measured value is maintained substantially equal to the desired value. The measured value may be the distance between the surface of the substrate and the transducer or a phase shift between an alternating current and voltage applied to the transducer. | 09-13-2012 |
20120266912 | Method and Apparatus for Cleaning Semiconductor Substrates - The present invention is related to a method and apparatus for cleaning a substrate, in particular a semiconductor substrate such as a silicon wafer. The substrate is placed in a tank containing a cleaning liquid, at an angle with respect to acoustic waves produced in said liquid. The angle corresponds to the angle of transmission, i.e. the angle at which waves are not reflected off the substrate surface. A damping material is provided in the tank, arranged to absorb substantially all waves thus transmitted through the substrate. A significant improvement in terms of cleaning efficiency is obtained by the method of the invention. | 10-25-2012 |
20140053864 | System for Delivering Ultrasonic Energy to a Liquid and Use for Cleaning of Solid Parts - This present application relates to a system for delivering megasonic energy to a liquid, involving one or more megasonic transducers, each transducer having a single operating frequency within an ultrasound bandwidth and comprising two or more groups of piezoelectric elements arranged in one or more rows, and a megasonic generator means for driving the one or more transducers at frequencies within the bandwidth, the generator means being adapted for changing the voltage applied to each group of piezoelectric elements so as to achieve substantially the same maximum acoustic pressure for each group of piezoelectric elements. The generator means and transducers being constructed and arranged so as to produce ultrasound within the liquid. Such a system may be part of an apparatus for cleaning a surface of an article such as a semiconductor wafer or a medical implant. | 02-27-2014 |