Med
Med Belhadj, Ottawa CA
Patent application number | Description | Published |
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20100085989 | Systems and methods for packet based timing offset determination using timing adjustment information - Systems and methods for performing timing offset and or fractional frequency offset for the purpose of time and/or frequency synchronization are provided. Timing packets are exchanged between a master device and a slave device. In addition, timing adjustment information is received by the slave device. The slave device uses the timing adjustment information in conjunction with the transmit and receive times for the timing packets to estimate at timing offset and/or fractional frequency offset. | 04-08-2010 |
20100085990 | Systems and methods for a network device to update timing packets to reflect delay - Systems and methods for a network device to update timing packets to reflect delay are provided. A timing packet processor is externally connected to the network device. All timing packets are processed by the timing packet processor. The timing packets are updated to reflect an estimate of delay introduced by the network device. | 04-08-2010 |
20120320794 | SYSTEMS AND METHODS FOR PACKET BASED TIMING OFFSET DETERMINATION USING TIMING ADJUSTMENT INFORMATION - Systems and methods for performing timing offset and or fractional frequency offset for the purpose of time and/or frequency synchronization are provided. Timing packets are exchanged between a master device and a slave device. In addition, timing adjustment information is received by the slave device. The slave device uses the timing adjustment information in conjunction with the transmit and receive times for the timing packets to estimate at timing offset and/or fractional frequency offset. | 12-20-2012 |
Med Boukni, Laval CA
Patent application number | Description | Published |
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20100267316 | FLOOR GRINDING APPARATUS - A grinding apparatus for grinding a surface includes a plurality of satellites, a carrier for supporting the plurality of satellites, a plurality of primary gears rotatably mounted within the carrier and disposed about a motor output, a static gear which is fixed with respect to the motor and co-axial with the motor output, and a plurality of secondary gears which each rotate with one of the primary gears. The primary gears rotate the satellites with respect to the carrier and the secondary gears rotate the carrier around the static gear. | 10-21-2010 |
Med Nadooshan, West New York, NJ US
Patent application number | Description | Published |
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20140248937 | SYSTEMS AND METHODS OF PROVIDING A GAMING SYSTEM ACCESSIBLE VIA A GLOBAL COMPUTER NETWORK - Embodiments of the present invention relate to a system and method for providing multiple users access to a multi-game gaming network in a social network environment, having unique means for accessing, playing, and ranking in individual games within the gaming network. A system of providing a gaming system accessible via a global computer network, the system being able to implement: hosting a gaming platform, whereby the gaming platform comprises access to plurality of locked games and at least one unlocked game; enabling a first user to play an unlocking game of chance provided through a graphical user interface of the gaming platform; enabling the user to unlock one of the plurality of locked games upon a predetermined outcome of the unlocking game of chance; and enabling the user to play an unlocked game via the gaming platform. | 09-04-2014 |
Med Nariman, Irvine, CA US
Patent application number | Description | Published |
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20140087676 | On-Chip Distributed Power Amplifier and On-Chip or In-Package Antenna for Performing Chip-To-Chip and Other Communications - A transmitter front-end for wireless chip-to-chip communication, and potentially for other, longer range (e.g., several meters or several tens of meters) device-to-device communication, is disclosed. The transmitter front-end includes a distributed power amplifier capable of providing an output signal with sufficient power for wireless transmission by an on-chip or on-package antenna to another nearby IC chip or device located several meters or several tens of meters away. The distributed power amplifier can be fully integrated (i.e., without using external components, such as bond wire inductors) on a monolithic silicon substrate using, for example, a complementary metal oxide semiconductor (CMOS) process. | 03-27-2014 |
Med Nariman, Ladera Ranch, CA US
Patent application number | Description | Published |
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20160006149 | LOOPED SOCKET PIN - Methods and apparatuses, wherein the method includes creating a surface mount socket pin for integrated circuit packaging. The method couples a first conductive element to a second conductive element, wherein the closed loop conductor is configured to provide two paths between the first conductive element and second conductive element, wherein a central region of the closed loop conductor is configured to engage with a plurality of symmetrical bumps in a mold to secure the closed loop conductor, wherein the closed loop conductor is elastic. | 01-07-2016 |