Patent application number | Description | Published |
20100118424 | MEASUREMENT OF ROUND TRIP LATENCY IN WRITE AND READ PATHS - A method and apparatus for measuring latency in a communication path is provided. The technique includes driving a signal such as a square wave on the communication path, such as a write path such that it travels around the write-read path, and sensing a returned signal at one end of the write-read path. A square wave signal corresponding to the square wave driven on the write path is delayed by a predetermined phase thus generating a delayed signal. The returned signal and the delayed signal are mixed, producing a mixed signal. The mixed signal is integrated to obtain an integrated output. The phase by which the delayed signal is shifted is successively adjusted. Returned signals are mixed with such delayed signals until the integrated output is equal to zero. The phase shift amount that results in a nulled integrated output, less a quarter cycle of the square wave, is equal to the round trip latency of the write-read path. | 05-13-2010 |
20100118426 | WRITE CLOCK CONTROL SYSTEM FOR MEDIA PATTERN WRITE SYNCHRONIZATION - A write clock control system comprises a clock controller that determines a phase offset based on a phase difference between a write clock signal and a media pattern corresponding to a given timing synchronization field being read, and a phase interpolator that produces an updated write clock signal by updating the phase of the write clock signal in accordance with control signals that are based on the phase offset signal. | 05-13-2010 |
20100118427 | ELIMINATING SECTOR SYNCHRONIZATION FIELDS FOR BIT PATTERNED MEDIA - Clock synchronization techniques are described for data storage media, particularly for the tolerances of efficient use of bit patterned media (BPM) capacity. In particular, techniques are described where position of a read-write head and timing of a write and/or read clock is determined within a fraction of a dot of the underlying media. The techniques obviate the requirement for the fields conventionally written preceding a data sector to provide bit synchronization and symbol framing (sector synchronization fields). | 05-13-2010 |
20100202079 | WRITE SYNCHRONIZATION PHASE CALIBRATION FOR STORAGE MEDIA - A technique is described for write synchronization phase calibration for storage media (e.g., bit patterned media). In one embodiment, a calibration write clock signal may be generated at a frequency offset from a nominal dot frequency of a bit patterned storage media. A periodic signal that was written to the media synchronous to the calibration write clock signal may then be read and mixed with a reference periodic signal at the nominal dot frequency to obtain a difference signal. This difference signal may be demodulated to determine a phase correction for write synchronization to the media. | 08-12-2010 |
20120224277 | INTERLEAVED AUTOMATIC GAIN CONTROL FOR ASYMMETRIC DATA SIGNALS - A data signal comprising an even component and an odd component with differing amplitudes is received at a main automatic gain controller (AGC). The even component is adjusted by a first interleaved AGC and the odd component is adjusted by a second interleaved AGC such that even and odd component amplitudes are substantially equal. Amplitude adjusted even and odd components are recombined to define a data signal with components having substantially equal amplitudes. The even and odd components can be generated by a read transducer moving relative to a magnetic storage medium comprising tracks defined by discrete and spaced-apart recording bits arranged in an interspersed pattern. A read channel separates the data signal into even and odd samples such that a gain can be independently adjusted for each of the even and odd samples to compensate for asymmetry between the even and odd samples. | 09-06-2012 |