Patent application number | Description | Published |
20080318923 | 1,3-Dihydro-2H-Indole-2-One Compound and Pyrrolidine-2-One Compound Fused With Aromatic Heterocycle - It is intended to provide a drug which is efficacious against pathological conditions relating to arginine-vasopressin V1b receptor. More particularly speaking, it is intended to provide a drug which has a therapeutic or preventive effect on depression, anxiety, Alzheimer's disease, Parkinson's disease, Huntington's chorea, eating disorders, hypertension, digestive diseases, drug addiction, epilepsy, brain infarction, brain ischemia, brain edema, head injury, inflammation, immune diseases, alopecia and so on. As the results of intensive studies, a novel 1,3-dihydro-2H-indol-2-one compound and a pyrrolidin-2-one compound fused with a heteroaromatic ring, which are highly selective antagonists of arginine-vasopressin V1b receptor, have high metabolic stabilities and show favorable brain penetration and high plasma concentrations, are found, thereby achieving the above objective. | 12-25-2008 |
20090095095 | MICROSTRUCTURE INSPECTING APPARATUS, MICROSTRUCTURE INSPECTING METHOD AND SUBSTRATE HOLDING APPARATUS - An inspecting apparatus of a microstructure having a movable section | 04-16-2009 |
20130159513 | INFORMATION PROCESSING SYSTEM AND OPERATION MANAGEMENT METHOD - An object is to prevent overload on a shared resource. In an information processing system including a resource possibly shared between a plurality of work loads, an additional load is applied to the resource while operating the work loads, and the performances of the work loads are monitored. | 06-20-2013 |
20160062951 | SEMICONDUCTOR DEVICE - A semiconductor device includes a plurality of spin units individually including a memory cell configured to store values of spins in an Ising model, a memory cell configured to store an interaction coefficient from an adjacent spin that exerts an interaction on the spin, a memory cell configured to store an external magnetic field coefficient of the spin, and an interaction circuit configured to determine a subsequent state of the spin. The spin units individually include a random number generator configured to supply the random number to the plurality of the spin units and generate two-valued simulated coefficients of two values or simulated coefficients of three values in performing an interaction to determine a subsequent state of a spin of the spin units from a value of a spin from an adjacent spin unit, an interaction coefficient, and an external magnetic field coefficient. | 03-03-2016 |
20160063148 | SEMICONDUCTOR DEVICE - A semiconductor device that can simulate interactions between nodes of a large-scale interaction model and can be manufactured easily at inexpensive cost is suggested. The semiconductor device is provided with a plurality of semiconductor chips, each of which simulates interactions between nodes of an interaction model, and an inter-chip wire, wherein the plurality of semiconductor chips are used to simulate interactions between nodes of a single interaction model; each semiconductor chip includes: a plurality of element units, each of which retains values indicating the state of corresponding nodes and interaction coefficients and determines values indicating the next state of the corresponding nodes based on the retained values indicating the state of the nodes and each of the interaction coefficients and values of each of other nodes; and a connection unit that sends and receives some of the values indicating the state of the nodes, which are retained by a necessary element unit , via inter-chip wire to and from another semiconductor chip or sends and receives the values indicating state of the nodes, which are retained by the necessary element unit to and from the other semiconductor chip while sharing the inter-chip wire by means of time sharing. | 03-03-2016 |
20160063391 | INFORMATION PROCESSING SYSTEM AND MANAGEMENT APPARATUS - A highly-convenient information processing system capable of obtaining a solution of a problem under conditions desired by a user and a management apparatus capable of enhancing the convenience of the information processing system are suggested. An information processing system includes: a host unit equipped with one or more semiconductor chips that execute a ground-state search of an Ising model; and an operation unit that provides a user interface for a user to designate a problem; and a management unit that converts the problem designated by the user by using the user interface into the Ising model and controls the host unit to have the semiconductor chip perform the ground-state search of the converted Ising model; wherein the user can designate a condition for solving the problem by using the user interface; wherein the management unit generates an operating condition of the semiconductor chip according to the condition designated by the user and reports the generated operating condition and the Ising model of the problem designated by the user to the host unit; and wherein the host unit controls the semiconductor chip in accordance with the operating condition reported from the management unit. | 03-03-2016 |
20160064080 | SEMICONDUCTOR DEVICE AND INFORMATION PROCESSING DEVICE - In a semiconductor device which calculates an interaction model, a technique capable of executing interaction calculation in non-synchronization with a clock is provided. The semiconductor device includes a plurality of units each of which includes: a first memory cell for storing a value indicating a state of one node of an interaction model; a second memory cell for storing an interaction coefficient indicating an interaction from a node connected to the one node; and an interaction calculation circuit for determining a value indicating a next state of the one node based on a current determined by a value indicating a state of the connected node and the interaction coefficient. | 03-03-2016 |
20160064099 | SEMICONDUCTOR DEVICE AND ITS QUALITY MANAGEMENT METHOD - A semiconductor device capable of easily and properly detecting a defective element unit(s) and a quality management method for the semiconductor device are suggested. A semiconducting device simulating interactions between nodes in an interaction model is equipped with a quality management unit for managing the quality of each element unit provided corresponding to each node, wherein the quality management unit executes a specified quality test of each element unit, compares test results of the quality test with pre-given results to be obtained from the quality test, and detects a defective memory cell(s) and a defective element unit(s) based on the comparison results. | 03-03-2016 |
20160065210 | SEMICONDUCTOR DEVICE - An object of the present invention is to realize an example of configuration that approximately represents a state of quantum spin in a semiconductor device where components as a basic configuration unit are arrayed so as to search a ground state of Ising model. There is disclosed a semiconductor device provided with plural units each of which is equipped with a first memory cell that stores a value which represents one spin of the Ising model by three or more states, a second memory cell that stores an interaction coefficient showing interaction from another spin which exerts interaction on the one spin and a logical circuit that determines the next state of the one spin on the basis of a function having a value which represents a state of the other spin and the interaction coefficient as a constant or a variable. | 03-03-2016 |
20160077877 | INFORMATION PROCESSING SYSTEM AND INFORMATION PROCESSING METHOD - An information processing system characterized by the provision of an optimal-load arrangement means and a load-computation execution means wherein: said optimal-load arrangement means contains a load analysis means, a load distribution means, and program information; the load-computation execution means contains a hardware processing means and a software computation means; the program information includes resource information and information pertaining to data to be processed and the content of the processing to be performed thereon; the load analysis means has the ability to perform community assignment in which, of the data to be processed, data in regions having heavy loads and communication volumes that can be reduced is assigned to a hardware community and data in other regions is assigned to a software community; and the load distribution means divides up the data to be processed such that the data assigned to the hardware community is processed by the hardware processing means and the data assigned to the software community is processed by the software computation means. | 03-17-2016 |