Patent application number | Description | Published |
20100295593 | DELAY CIRCUIT - A delay circuit ( | 11-25-2010 |
20100302894 | WORD LINE SELECTION CIRCUIT AND ROW DECODER - A first exemplary aspect of the present invention is a word line selection circuit where address decode signals composed of a power supply voltage and a first voltage lower than a ground voltage are input, and that a word line selection signal composed of the first voltage and a second voltage higher than the power supply voltage is output not via a level shift circuit according to the address decode signals. | 12-02-2010 |
20110103124 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device has: memory blocks; and a local bus connected to the memory blocks. Each memory block has: switches respectively provided between bit line pairs and the local bus and each of which is turned ON in response to a selection signal; a dummy local bus; first and second control circuits. The local bus and the dummy local bus are precharged to a first potential before a read operation. In the read operation, the first control circuit outputs the selection signal to a selected switch to electrically connect a selected bit line pair and the local bus, while the second control circuit supplies a second potential lower than the first potential to the dummy local bus. The first control circuit stops outputting the selection signal when a potential of the dummy local bus is decreased to a predetermined set potential that is between the first and second potentials. | 05-05-2011 |
20110284508 | WELDING SYSTEM AND WELDING METHOD - A welding system has: a welding mechanism, a reception laser light source, a reception optical mechanism, an interferometer, a data recording/analysis mechanism and a data recording/analysis mechanism. The reception laser light source generates reception laser light so as to irradiate the object to be welded with the reception laser light for the purpose of detecting a reflected ultrasonic wave obtained as a result of reflection of a transmission ultrasonic wave. The reception optical mechanism transmits, during or after welding operation, the reception laser light generated from the reception laser light source to the surface of the object to be welded for irradiation while moving, together with the welding mechanism, relative to the object to be welded and collects laser light scattered/reflected at the surface of the object to be welded. | 11-24-2011 |
20110286005 | WELDING INSPECTION METHOD AND APPARATUS THEREOF - A welding inspection method has steps of: generating transmission laser light for generating an ultrasonic wave and transmitting the transmission laser light to an object to be inspected during or after welding operation for irradiation; generating reception laser light for detecting an ultrasonic wave and transmitting the reception laser light to the object to be inspected for irradiation; collecting laser light scattered and reflected at surface of the object to be inspected; performing interference measurement of the laser light and obtaining an ultrasonic signal; and analyzing the ultrasonic signal obtained by the interference measurement. At least one of the transmission laser light generated in the transmission laser light irradiation step and the reception laser light generated in the reception laser light irradiation step is irradiated onto a welded metal part or a groove side surface. | 11-24-2011 |
20120327733 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device has: memory blocks; and a local bus connected to the memory blocks. Each memory block has: switches respectively provided between bit line pairs and the local bus and each of which is turned ON in response to a selection signal; a dummy local bus; first and second control circuits. The local bus and the dummy local bus are precharged to a first potential before a read operation. In the read operation, the first control circuit outputs the selection signal to a selected switch to electrically connect a selected bit line pair and the local bus, while the second control circuit supplies a second potential lower than the first potential to the dummy local bus. The first control circuit stops outputting the selection signal when a potential of the dummy local bus is decreased to a predetermined set potential that is between the first and second potentials. | 12-27-2012 |
20130160551 | ULTRASONIC FLAW DETECTION DEVICE AND ULTRASONIC FLAW DETECTION METHOD - According to an embodiment, an ultrasonic flaw detection device is provided with: an ultrasonic probe, which applies ultrasonic waves, by driving a plurality of ultrasonic elements, to a test object to be inspected, and which receives reflected ultrasonic waves from the test object; and an analysis unit, which analyzes the signals of the reflected ultrasonic waves received by the ultrasonic probe, and which calculates the flaw detection results. The analysis unit calculates the flaw detection results using an ultrasonic wave propagation path obtained on the basis of the surface information of the test object having the ultrasonic waves applied thereto, thereby obtaining highly accurate detection results even the surface of the test object is formed in complex shape. | 06-27-2013 |
20140029329 | WORD LINE SELECTION CIRCUIT AND ROW DECODER - A first exemplary aspect of the present invention is a word line selection circuit where address decode signals composed of a power supply voltage and a first voltage lower than a ground voltage are input, and that a word line selection signal composed of the first voltage and a second voltage higher than the power supply voltage is output not via a level shift circuit according to the address decode signals. | 01-30-2014 |
20140313815 | WORD LINE SELECTION CIRCUIT AND ROW DECODER - A first exemplary aspect of the present invention is a word line selection circuit where address decode signals composed of a power supply voltage and a first voltage lower than a ground voltage are input, and that a word line selection signal composed of the first voltage and a second voltage higher than the power supply voltage is output not via a level shift circuit according to the address decode signals. | 10-23-2014 |