Mahadevan
Mahadevan Ganapathisubramanian, Cedar Park, TX US
Patent application number | Description | Published |
---|---|---|
20100320645 | DUAL ZONE TEMPLATE CHUCK - A template chuck includes multiple zones to provide 1) an imprint bend optimized to provide high curvature and provide contact at middle radius of substrate and/or, 2) separation bend zone with an increased free span zone and high crack angle. | 12-23-2010 |
20110001954 | CHUCKING SYSTEM WITH RECESSED SUPPORT FEATURE - In an imprint lithography system, a recessed support on a template chuck may alter a shape of a template positioned thereon providing minimization and/or elimination of premature downward deflection of outer edges of the template in a nano imprint lithography process. | 01-06-2011 |
20110260361 | SAFE DEPARATION FOR NANO IMPRINTING - Control of lateral strain and lateral strain ratio (d | 10-27-2011 |
20130214452 | LARGE AREA IMPRINT LITHOGRAPHY - Methods and systems are provided for patterning polymerizable material dispensed on flexible substrates or flat substrates using imprint lithography techniques. Template replication methods and systems are also presented where patterns from a master are transferred to flexible substrates to form flexible film templates. Such flexible film templates are then used to pattern large area flat substrates. Contact between the imprint template and substrate can be initiated and propagated by relative translation between the template and the substrate. | 08-22-2013 |
Mahadevan Ganapathisubramanian, Cupertino, CA US
Patent application number | Description | Published |
---|---|---|
20150091230 | CHUCKING SYSTEM WITH RECESSED SUPPORT FEATURE - In an imprint lithography system, a recessed support on a template chuck may alter a shape of a template positioned thereon providing minimization and/or elimination of premature downward deflection of outer edges of the template in a nano imprint lithography process. | 04-02-2015 |
20150183151 | Asymmetric Template Shape Modulation for Partial Field Imprinting - Systems and methods for partial field imprinting are provided such that imprint templates are asymmetrically modulated to allow initial contact with a partial field on a substrate at a location spaced apart from the template center. | 07-02-2015 |
Mahadevan Ganapathisubramanian, Austin, TX US
Patent application number | Description | Published |
---|---|---|
20100072652 | IMPRINT LITHOGRAPHY SYSTEM AND METHOD - System, method and process for imprinting a substrate using controlled deformation of a substrate and/or a template. The substrate and/or template may be positioned in single wave formation or double wave formation during an imprint lithography process. | 03-25-2010 |
20100090130 | Energy Sources for Curing in an Imprint Lithography System - Energy sources and methods for curing in an imprint lithography system are described. The energy sources may include one or more energy elements positioned outside of the viewing range of an imaging unit monitoring elements of the imprint lithography system. Each energy source is configured to provide energy along a path to solidify polymerizable material on a substrate. | 04-15-2010 |
20100109202 | Substrate Alignment - Systems and methods for imprinting a patterned layer on a substrate are described. Features of patterned layer may be concentrically imprinted in relation to a shaft positioned on a substrate chuck. The substrate may be biased using a radius difference between a diameter of the shaft and an inner diameter of the substrate in relation to a point on an inner edge of the substrate. | 05-06-2010 |
20100110409 | Separation in an Imprint Lithography Process - Systems, methods, and processes for separating a template from a substrate retained on an air cavity chuck during an imprint lithography process. Generally, vacuum level provided by air cavity chuck may be controlled during conforming of polymerizable material between the template and the substrate and during separation of the template and the substrate. | 05-06-2010 |
Mahadevan Hariharan, Taipei City TW
Patent application number | Description | Published |
---|---|---|
20140344573 | Decrypting Files for Data Leakage Protection in an Enterprise Network - Techniques are provided for decrypting an encrypted file within an enterprise network. The techniques include identifying by a password collecting module a password entered during a the encryption procedure performed at a terminal and storing the password: receiving an encrypted file by a data leakage protection (DLP) module; and attempting to decrypt the encrypted file with the password by the DLP module. | 11-20-2014 |
Mahadevan Lakshminarayanan, Abhiramapuram IN
Patent application number | Description | Published |
---|---|---|
20120030172 | MYSQL DATABASE HETEROGENEOUS LOG BASED REPLICATION - A system and method for transferring data between different types of systems, and in particular uses log-based replication to transfer data between, e.g. a MySQL database or system, and another type of database or system. In accordance with an embodiment, the system can be used to perform a one-time or initial copy of the MySQL data from a source database system to a target database system, and/or to replicate the on-going transactions captured from a MySQL database's binary log into one or additional non-MySQL database(s) on a continuous basis, such that the two systems are synchronized for transactions of interest. In accordance with an embodiment, full or partial data changes can be extracted from the MySQL binary log, optionally transformed, skipped or augmented, output or written to a file (which in accordance with an embodiment can be implemented as a trail file, or an Oracle GoldenGate trail file), and then applied at any of one or more target systems (e.g. another MySQL database, or a non-MySQL database), thereby synchronizing the source and target systems. | 02-02-2012 |
20130318044 | MYSQL DATABASE HETEROGENEOUS LOG BASED REPLICATION - A system and method for transferring data between different types of systems, and in particular uses log-based replication to transfer data between different types of systems. In accordance with an embodiment, the system can be used to perform a one-time or initial copy of the MySQL data from a source database system to a target database system, and/or to replicate the on-going transactions captured from a MySQL database's binary log into one or additional non-MySQL database(s) on a continuous basis, such that the two systems are synchronized for transactions of interest. In accordance with an embodiment, full or partial data changes can be extracted from the MySQL binary log, optionally transformed, skipped or augmented, output or written to a file, and then applied at any of one or more target systems (e.g. another MySQL database, or a non-MySQL database), thereby synchronizing the source and target systems. | 11-28-2013 |
Mahadevan Sivagururaman, Bangalore IN
Patent application number | Description | Published |
---|---|---|
20090257512 | Error Concealment for MPEG Decoding with Personal Video Recording Functionality - Error concealment for motion picture expert group (MPEG) decoding with personal video recording functionality. Error concealment of MPEG data may take place within various components within playback, recording, reading and writing data systems. The error concealment may be provided within existing systems whose components may not be capable of accommodating errors within MPEG data. In certain embodiments, the available data that contain no errors is maximized to conceal those portions of the data that do include errors. Various layers may be accommodated while performing error concealment, including the MPEG transport stream layer, the video layer, and the audio layer. | 10-15-2009 |
20130272433 | ERROR CONCEALMENT FOR MPEG DECODING WITH PERSONAL VIDEO RECORDING FUNCTIONALITY - Error concealment for motion picture expert group (MPEG) decoding with personal video recording functionality. Error concealment of MPEG data may take place within various components within playback, recording, reading and writing data systems. The error concealment may be provided within existing systems whose components may not be capable of accommodating errors within MPEG data. In certain embodiments, the available data that contain no errors is maximized to conceal those portions of the data that do include errors. | 10-17-2013 |
Mahadevan Srinivasan, San Diego, CA US
Patent application number | Description | Published |
---|---|---|
20160049945 | COMPENSATING FOR HYSTERETIC CHARACTERISTICS OF CRYSTAL OSCILLATORS - In some examples, compensating for hysteretic characteristics of a crystal oscillator in a timing circuit includes obtaining a plurality of successive temperature measurements. From the plurality of successive temperature measurements, a temperature gradient having a sign and a magnitude can be determined. A frequency compensation parameter can then be determined based on any combination of two or more factors chosen from a set of factors including a temperature measurement, the sign of the temperature gradient, and the magnitude of the temperature gradient. A frequency error of the timing circuit can then be compensated based on the frequency compensation parameter. | 02-18-2016 |
Mahadevan Survakumar, Gilbert, AZ US
Patent application number | Description | Published |
---|---|---|
20110101516 | Microelectronic package and method of manufacturing same - A microelectronic package includes a first substrate ( | 05-05-2011 |
Mahadevan Suryakumar, Gilbert, AZ US
Patent application number | Description | Published |
---|---|---|
20100073894 | Coreless substrate, method of manufacturing same, and package for microelectronic device incorporating same - A coreless substrate includes a stiffener material ( | 03-25-2010 |
20100163295 | COAXIAL PLATED THROUGH HOLES (PTH) FOR ROBUST ELECTRICAL PERFORMANCE - In some embodiments, coaxial plated through holes (PTH) for robust electrical performance are presented. In this regard, an apparatus is introduced comprising an integrated circuit device and a substrate coupled with the integrated circuit device, wherein the substrate includes: a plated through hole, the plated through hole filled with dielectric material and a coaxial copper wire, and conductive traces to separately route the plated through hole and the coaxial copper wire. Other embodiments are also disclosed and claimed. | 07-01-2010 |
20110318850 | MICROELECTRONIC PACKAGE AND METHOD OF MANUFACTURING SAME - A microelectronic package includes a first substrate ( | 12-29-2011 |
20120005887 | CORELESS SUBSTRATE, METHOD OF MANUFACTURING SAME, AND PACKAGE FOR MICROELECTRONIC DEVICE INCORPORATING SAME - A coreless substrate includes a stiffener material ( | 01-12-2012 |
20130189812 | COAXIAL PLATED THROUGH HOLES (PTH) FOR ROBUST ELECTRICAL PERFORMANCE - In some embodiments, coaxial plated through holes (PTH) for robust electrical performance are presented. in this regard, an apparatus is introduced comprising an integrated circuit device and a substrate coupled with the integrated circuit device, wherein the substrate includes: a plated through hole, the plated through hole filled with dielectric material and a coaxial copper wire, and conductive traces to separately route the plated through hole and the coaxial copper wire. Other embodiments are also disclosed. | 07-25-2013 |
Mahadevan Venkiteswaran S., Bangalore IN
Patent application number | Description | Published |
---|---|---|
20130069616 | OFFSET CALIBRATION TECHNIQUE TO IMPROVE PERFORMANCE OF BAND-GAP VOLTAGE REFERENCE - Offset calibration technique to improve performance of band gap voltage reference. An example of a bandgap reference source includes an output resistor, a first and second transistors and a differential amplifier. A positive-input calibration phase switch is in communication with a positive amplifier input, a emitter of the first and second transistor and a negative-input calibration phase switch in communication with the negative amplifier input, the emitter of the first and second transistor. A positive-output calibration phase switch is in communication with the positive amplifier output, the first and second terminal of the output resistor and a negative-output calibration phase switch is in communication with the negative amplifier output, the first and second terminal of the output resistor. An adjustable resistance is in communication with the emitter of the first transistor, the emitter of the second transistor, and the second terminal of the output resistor. | 03-21-2013 |