Patent application number | Description | Published |
20090153823 | LITHOGRAPHIC APPARATUS AND DEVICE MANUFACTURING METHOD - An immersion lithographic projection apparatus has a liquid confinement structure configured to at least partly confine liquid to a space between a projection system and a substrate, the confinement structure having a buffer surface, when in use, positioned in close proximity to a plane substantially comprising the upper surface of the substrate and of a substrate table holding the substrate, to define a passage having a flow resistance. A recess is provided in the buffer surface, the recess, when in use, being normally full of immersion liquid to enable rapid filling of a gap between the substrate and substrate table as the gap moves under the buffer surface. The recess may be annular or radial and a plurality of recesses may be provided. | 06-18-2009 |
20100321651 | LITHOGRAPHIC APPARATUS AND DEVICE MANUFACTURING METHOD - An immersion lithographic projection apparatus has a liquid confinement structure configured to at least partly confine liquid to a space between a projection system and a substrate, the confinement structure having a buffer surface, when in use, positioned in close proximity to a plane substantially comprising the upper surface of the substrate and of a substrate table holding the substrate, to define a passage having a flow resistance. A recess is provided in the buffer surface, the recess, when in use, being normally full of immersion liquid to enable rapid filling of a gap between the substrate and substrate table as the gap moves under the buffer surface. The recess may be annular or radial and a plurality of recesses may be provided. | 12-23-2010 |
20150015856 | LITHOGRAPHIC APPARATUS AND DEVICE MANUFACTURING METHOD - A lithographic apparatus includes a substrate table constructed to hold a substrate, a projection system configured to project a patterned radiation beam through an opening and onto a target portion of the substrate, and a conduit having an outlet in the opening. The conduit is configured to deliver gas to the opening. The lithographic apparatus includes a temperature control apparatus disposed in a space between the projection system and the substrate table. The temperature control device is configured to control the temperature of the gas in the space after the gas passes through the opening. | 01-15-2015 |
20150138519 | Contamination Trap for a Lithographic Apparatus - Disclosed is a contamination trap arrangement ( | 05-21-2015 |
20150192861 | Lithographic Apparatus and Method of Manufacturing a Device - There is disclosed a lithographic apparatus provided with a spectral purity filter which may be provided in one or more of the following locations: (a) in the illumination system, (b) adjacent the patterning device, either a static location in the radiation beam or fixed for movement with the patterning device, (c) in the projection system, and (d) adjacent the substrate table. The spectral purity filter is preferably a membrane formed of polysilicon, a multilayer material, a carbon nanotube material or graphene. The membrane may be provided with a protective capping layer, and/or a thin metal transparent layer. | 07-09-2015 |
20150331338 | Substrate Support for a Lithographic Apparatus and Lithographic Apparatus - Disclosed is a substrate support for an apparatus of the type which projects a beam of EUV radiation onto a target portion of a substrate ( | 11-19-2015 |
Patent application number | Description | Published |
20110145545 | COMPUTER-IMPLEMENTED METHOD OF PROCESSING RESOURCE MANAGEMENT - A computer-implemented method for managing processing resources of a computerized system having at least a first processor and a second processor, each of the processors operatively interconnected to a memory storing a set of data to be processed by a processor, the method comprising: monitoring data accessed by the first processor while executing; and if the second processor is at a shorter distance than the first processor from the monitored data, instructing to interrupt execution at the first processor and resume the execution at the second processor. | 06-16-2011 |
20120324166 | COMPUTER-IMPLEMENTED METHOD OF PROCESSING RESOURCE MANAGEMENT - A computer-implemented method for managing processing resources of a computerized system having at least a first processor and a second processor, each of the processors operatively interconnected to a memory storing a set of data to be processed by a processor, the method comprising: monitoring data accessed by the first processor while executing; and if the second processor is at a shorter distance than the first processor from the monitored data, instructing to interrupt execution at the first processor and resume the execution at the second processor. | 12-20-2012 |
20130194923 | CONVERGED ENHANCED ETHERNET NETWORK - A system to improve a Converged Enhanced Ethernet network may include a controller having a computer processor connected to a layer 2 endpoint buffer. The system may also include a manager executing on the controller to monitor the layer 2 endpoint buffer by determining buffer data packet occupancy and/or rate of change in the buffer data packet occupancy. The system may further include a reporter to notify a congestion source of the layer 2 endpoint buffer based upon the buffer data packet occupancy and/or rate of change in the buffer data packet occupancy. | 08-01-2013 |
20130194946 | CONVERGED ENHANCED ETHERNET NETWORK - A system to improve a Converged Enhanced Ethernet network may include a controller having a computer processor connected to a layer 2 endpoint buffer. The system may also include a manager executing on the controller to monitor the layer 2 endpoint buffer by determining buffer data packet occupancy and/or rate of change in the buffer data packet occupancy. The system may further include a reporter to notify a congestion source of the layer 2 endpoint buffer based upon the buffer data packet occupancy and/or rate of change in the buffer data packet occupancy. | 08-01-2013 |
20130205038 | LOSSLESS SOCKET-BASED LAYER 4 TRANSPORT (RELIABILITY) SYSTEM FOR A CONVERGED ETHERNET NETWORK - A reliability system for a Converged Enhanced Ethernet network may include a plurality of end points each comprising a layer 4 transport layer, where each end point is connected to a data center bridging (DCB) layer 2 network. The system may also include an adaptor between the layer 4 transport layer and the DCB layer 2 network to translate at least one of flow and congestion control feedback signals, provided by at least one of the DCB network and the transport layer, to consolidated feedback signals for controlling transmission by the transport layer. | 08-08-2013 |
20130205039 | LOSSLESS SOCKET-BASED LAYER 4 TRANSPORT (RELIABILITY) SYSTEM FOR A CONVERGED ETHERNET NETWORK - A reliability system for a Converged Enhanced Ethernet network may include a plurality of end points each comprising a layer | 08-08-2013 |
20140123083 | AUTOMATIC WAFER DATA SAMPLE PLANNING AND REVIEW - A method of constructing a mask for use in semiconductor device manufacturing is disclosed. A first shape that is related to mask construction is selected from a set of shapes. A second shape related to the mask construction is selected from the set of shapes. The first shape and the second shape are represented using a first shape vector and a second shape vector, respectively. A cluster is formed that includes the first shape and the second shape when the first shape vector and the second shape vector are within a selected criterion. | 05-01-2014 |
20140293533 | Cooling Electronic Components and Supplying Power to the Electronic Components - A mechanism is provided for cooling electronic components of a printed circuit board module and for supplying power to the electronic components of the printed circuit board module. The computer module comprises a printed circuit board module, wherein the electronic components are attached to a first side of the printed circuit board module, and a cooling module being attached to a second side of the printed circuit board, being arranged in parallel to the printed circuit board and having a first layer being thermally and electrically conductive. The first layer is arranged such that heat is dissipated from the printed circuit board module and that power from a power source is supplied to the electronic components of the printed circuit board module. | 10-02-2014 |
Patent application number | Description | Published |
20120303948 | ADDRESS TRANSLATION UNIT, DEVICE AND METHOD FOR REMOTE DIRECT MEMORY ACCESS OF A MEMORY - An address translation unit for Remote Direct Memory Access (RDMA) of a memory of a processor is provided. The address translation unit comprises an address translator and a signer. The address translator is configured to translate a received virtual address in a real address of the memory. The signer is configured to cryptographically sign the real address. | 11-29-2012 |
20130019108 | ADDRESS TRANSLATION UNIT, DEVICE AND METHOD FOR REMOTE DIRECT MEMORY ACCESS OF A MEMORY - A method for Remote Direct Memory Access (RDMA) of a memory of a processor. An address translation unit comprises an address translator and a signer. The address translator is configured to translate a received virtual address in a real address of the memory. The signer is configured to cryptographically sign the real address. | 01-17-2013 |
20130326122 | DISTRIBUTED MEMORY ACCESS IN A NETWORK - A method of distributed memory access in a network, the network including a plurality of distributed compute elements, at least one control element and a plurality of distributed memory elements, wherein a data element is striped into data segments, the data segments being imported on at least a number of the distributed memory elements by multiple paths in the network, includes receiving, by a requesting element, credentials including an access permission for accessing the number of distributed memory elements and location information from the control element, the location information indicating physical locations of the data segments on the number of distributed memory elements; and launching, by the requesting element, a plurality of data transfers of the data segments over the multiple paths in the network to and/or from the physical locations. | 12-05-2013 |
20150351242 | ASSEMBLY OF PRINTED CIRCUIT BOARDS - A printed circuit board (PCB) assembly includes a first PCB and a second PCB disposed substantially parallel and opposite to each other, such that a second side of the first PCB is opposite to a first side of the second PCB; wherein the second PCB has a first set of side connectors on its first side and a second set of side connectors on its second side, configured for both electrical power supply to and signal communication with the second PCB; the second PCB both electrically and mechanically connected to the second side of the first PCB via a first elastomeric connector; and the second PCB electrically connected to the first PCB via its second set of side connectors and a flexible electrical connector that is electrically connected to the second set of side connectors and the first PCB. | 12-03-2015 |
20150351256 | ASSEMBLY OF PRINTED CIRCUIT BOARDS - A printed circuit board (PCB) assembly includes a first PCB and a second PCB disposed substantially parallel and opposite to each other, such that a second side of the first PCB is opposite to a first side of the second PCB; wherein the second PCB has a first set of side connectors on its first side and a second set of side connectors on its second side, configured for both electrical power supply to and signal communication with the second PCB; the second PCB both electrically and mechanically connected to the second side of the first PCB via a first elastomeric connector; and the second PCB electrically connected to the first PCB via its second set of side connectors and a flexible electrical connector that is electrically connected to the second set of side connectors and the first PCB. | 12-03-2015 |