Patent application number | Description | Published |
20080224214 | SEMICONDUCTOR DEVICE AND FABRICATION METHOD - The present invention provides an SOI device which has high breakdown voltage, wide stable operation range, good thermal dissipation, and high effective conductance and good frequency characteristics, and a method for fabricating the device. In a semiconductor device, a BOX region is formed on a part of a surface layer of a p substrate. The BOX region is formed around a point where a vertical line is dropped from the center of the gate structure portion, and isolates a drain region and an extended drain region from the p | 09-18-2008 |
20080258211 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - In a MIS-type semiconductor device having a trench gate structure, a withstand voltage is ensured without changing the thickness of a drift layer and on-resistance can be reduced without applying a high gate drive voltage. The lower half of a trench extending through a p-base region into an n-drift region is filled with a high-permittivity dielectric having a relative permittivity that is higher than that of a silicon oxide film, preferably a silicon nitride film, and an insulated gate structure including a gate insulator and a gate electrode is fabricated on the high-permittivity dielectric. The depth d | 10-23-2008 |
20090008675 | SOI TRENCH LATERAL IGBT - To enable driving at a high withstand voltage and a large current, increase latchup immunity, and reduce ON resistance per unit area in an IGBT, a trench constituted by an upper stage trench and a lower stage trench is formed over an entire wafer surface between an n | 01-08-2009 |
20090050932 | SEMICONDUCTOR DEVICE AND THE METHOD OF MANUFACTURING THE SAME - To provide a semiconductor device that exhibits a high breakdown voltage, excellent thermal properties, a high latch-up withstanding capability and low on-resistance. The semiconductor device according to the invention, which includes a buried insulator region | 02-26-2009 |
20090194785 | Semiconductor device and manufacturing method thereof - A p-type body region and an n-type buffer region are formed on an n | 08-06-2009 |
20090242930 | SEMICONDUCTOR DEVICE - A lateral high-breakdown voltage semiconductor device is provided in which the breakdown voltages of elements as a whole are improved, while suppressing increases in cell area. A track-shape gate electrode surrounds a collector electrode extending in a straight line, a track-shape emitter electrode surrounds the gate electrode, and a track-shape first isolation trench surrounds the emitter electrode. A second isolation trench surrounds the first isolation trench. The region between the first isolation trench and the second isolation trench is an n-type isolation silicon region. The isolation silicon region is at the same potential as the emitter electrode. In the cross-sectional configuration traversing the gate electrode, the depth of the p base region in an interval corresponding to an arc-shape portion of the gate electrode is shallower than the depth of the p base region in an interval corresponding to a straight-line portion of the gate electrode. | 10-01-2009 |
20110233714 | SEMICONDUCTOR DEVICE - Aspects of the invention are related to a semiconductor device including a first conductivity type n-type drift layer, a second conductivity type VLD region which is formed on a chip inner circumferential side of a termination structure region provided on one principal surface of the n-type drift layer and which is higher in concentration than the n-type drift layer, and a second conductivity type first clip layer which is formed on a chip outer circumferential side of the VLD region so as to be separated from the VLD region and which is higher in concentration than the n-type drift layer. The invention can also include a first conductivity type channel stopper layer which is formed on a chip outer circumferential side of the first clip layer so as to be separated from the first clip layer and which is higher in concentration than the n-type drift layer. | 09-29-2011 |
20120248532 | SEMICONDUCTOR DEVICE - Plural island-form emitter cells ( | 10-04-2012 |
20130122663 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - Mirror-polished CZ wafer and FZ wafer are prepared. A first impurity region which will be a first isolation region is formed in a surface layer of a first main surface of the CZ wafer. The first main surface of the CZ wafer and a first main surface of the FZ wafer are bonded to each other by an inter-molecular bond. A second impurity region which will be a second isolation region is formed in a surface layer of a second main surface of the FZ wafer. A heat treatment is performed to diffuse the first impurity region and the second impurity region such that the first impurity region and the second impurity region are continuous, thereby forming a through silicon isolation region. | 05-16-2013 |
20140111270 | SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE, AND METHOD FOR CONTROLLING THE SEMICONDUCTOR DEVICE - An A-NPC circuit is configured so that the intermediate potential of two connected IGBTs is clamped by a bidirectional switch including two RB-IGBTs. Control is applied to the turn-on di/dt of the IGBTs during the reverse recovery of the RB-IGBTs. The carrier life time of an n | 04-24-2014 |
20140246721 | SEMICONDUCTOR DEVICE - A semiconductor device including: a first conductivity type n-type drift layer; a second conductivity type VLD region which is formed on a chip inner circumferential side of a termination structure region provided on one principal surface of the n-type drift layer and which is higher in concentration than the n-type drift layer; a second conductivity type first clip layer which is formed on a chip outer circumferential side of the VLD region so as to be separated from the VLD region and which is higher in concentration than the n-type drift layer; and a first conductivity type channel stopper layer which is formed on a chip outer circumferential side of the first clip layer so as to be separated from the first clip layer and which is higher in concentration than the n-type drift layer. Thus, it is possible to provide a semiconductor device having a stable and high breakdown voltage termination structure in which the length of a termination structure region is small as well as the immunity to the influence of external charge is high. | 09-04-2014 |
20150014742 | SEMICONDUCTOR DEVICE AND PRODUCTION METHOD FOR SEMICONDUCTOR DEVICE - Depth of a termination p base region provided in a termination portion of an active region close to an edge termination structure portion is more than depth of a p-type base region provided inside the termination p base region. An n-type high-concentration region is provided from one main surface of the semiconductor substrate in the entire surface layer of one surface of a semiconductor substrate within a depth of 20 μm or less below the bottom of the termination p base region. Ratio of the impurity concentration n | 01-15-2015 |
20150054025 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD - An n-type low lifetime adjustment region is provided in a portion inside an n | 02-26-2015 |
20150060938 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD | 03-05-2015 |
20150249149 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICOUNDUCTOR DEVICE - A forward termination structure that surrounds an active region is provided between the active region and a p | 09-03-2015 |
Patent application number | Description | Published |
20130119432 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD - A semiconductor device having a p+ collector region in the surface of an n− drift region. The p+ collector region forms a p-n junction with the n− drift region. A collector electrode is in contact with the p+ collector region. A low-lifetime region having a carrier lifetime shorter than in other regions is provided, extending from the n− drift region to the p+ collector region, at the interface between the n− drift region and p+ collector region. The low-lifetime region, being partially activated in accordance with the concentration distribution of a p-type impurity implanted in order to form the p+ collector region, is in a barely activated state. The low-lifetime region has an activation rate lower than that of the p+ collector region. The p+ collector region is completely electrically activated as far as a depth of, for example, 0.5 μm-0.8 μm, from the surface on the collector electrode side. | 05-16-2013 |
20130221403 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A semiconductor device and related method of manufacturing a semiconductor device that has an active region in the inner circumference of a chip with a thickness less than that of the outer circumference of the chip in which a termination structure is provided. An n field stop region, a p collector region, and a collector electrode are on the other main surface of an n | 08-29-2013 |
20150287601 | SEMICONDUCTOR DEVICE MANUFACTURING METHOD - A semiconductor device manufacturing method for a semiconductor device having a p-n junction formed of a first conductivity type first semiconductor region and a second conductivity type second semiconductor region, and comprising a low-lifetime region that has a carrier lifetime shorter than that in other regions at the interface of the p-n junction. The method includes an implantation process of, after implanting a second conductivity type impurity into the surface of the first semiconductor region with a first acceleration energy, implanting a second conductivity type impurity, with a second acceleration energy differing from the first acceleration energy, into the surface of the first semiconductor region into which the second conductivity type impurity has been implanted. | 10-08-2015 |
Patent application number | Description | Published |
20110293336 | CAM DRIVING MECHANISM, AND BELT TRANSPORTING APPARATUS AND IMAGE FORMING APPARATUS THEREWITH - A cam driving mechanism has: a cam; a motor which drives the cam; a gear train which transmits, while reducing the speed of, the output of the motor to the cam; a pulse disk which is formed integrally with a gear coupled in the gear train and in which a plurality of slits are formed at equal intervals; a home position detecting member which is arranged coaxially with the pulse disk so as to be rotatable independently thereof and which, by meshing with another gear coupled in the gear train, rotates at a lower rotation speed than the pulse disk; and a cam position detecting sensor which has a detecting portion including a light-emitting portion and a light-receiving portion, the cam position detecting sensor detecting the amount of driving of the cam based on the number of slits of the pulse disk that have passed through the detecting portion, the cam position detecting sensor detecting the home position of the cam based on the timing with which the home position detecting member shields the detecting portion. | 12-01-2011 |
20140147138 | IMAGE FORMING DEVICE - An image forming device includes: a secondary transfer roller configured to secondarily transfer a toner image transferred to an intermediate transfer belt, to a transfer paper; separating plates; and a power supply circuit configured to apply bias voltages to the separating plates. The separating plates are configured to separate the transfer paper from the intermediate transfer belt when the bias voltages are applied to the separating plates. The separating plates include two or more separating plates installed along a direction perpendicular to the transfer paper conveying direction. The bias voltages are applied to the separating plates independently of each other depending on a toner amount distribution of the toner image transferred to the transfer paper, in the direction perpendicular to the transfer paper conveying direction. | 05-29-2014 |
20140161490 | DEVELOPMENT DEVICE AND IMAGE FORMING APPARATUS INCLUDING THE SAME - A development device includes a developer container, a developer bearing member, a mixing/transporting member, an opening/closing member, and a drive mechanism. The developer container contains a developer. The developer bearing member is rotatably supported by the developer container. The developer bearing member also has a surface facing an image bearing member on which an electrostatic latent image is to be formed. The developer is borne on the surface of the developer bearing member. The mixing/transporting member mixes and transports the developer in the developer container. The opening/closing member opens and closes a developer outlet for discharging an excess of the developer in the developer container. The drive mechanism drives the opening/closing member in association with driving of the developer bearing member or the mixing/transporting member to open the developer outlet. | 06-12-2014 |
20150037063 | TRANSFER UNIT AND IMAGE FORMING APPARATUS - A transfer unit includes: a transfer belt mounted over a plurality of rollers to run to transfer toner images on a plurality of image carriers to a front side of the transfer belt; transfer rollers provided for the respective image carriers to give a transfer potential to the transfer belt to transfer the toner images thereto; a drive mechanism configured to move only the transfer rollers for formation of a multicolor image into and out of contact with the transfer belt; a cleaning member contactable with a back side of the transfer belt to clean the back side; and a shifting mechanism configured to, upon contact of the transfer rollers with the transfer belt, shift the cleaning member into contact with the back side of the transfer belt and, upon departure of the transfer rollers from the transfer belt, shift the cleaning member out of contact with the back side. | 02-05-2015 |
20150301488 | FIXING DEVICE AND IMAGE FORMING APPARATUS - A fixing device includes a first rotary member, a second rotary member, a support member having a connection part, an urging member, and an engaging member. The engaging member is capable of changing a state of the fixing device between a pressure applied state and a pressure reduced state using the urging member and the support member. When the nip pressure is in the pressure applied state, the engaging member changes a position of the urging member to direct the urging member longitudinally in a tangential direction to an arc that has a center coinciding with a center of rotation of the support member and that passes through the connecting portion. When the nip pressure is in the pressure reduced state, the engaging member changes the position of the urging member to direct the urging member longitudinally in a direction different from the tangential direction. | 10-22-2015 |
Patent application number | Description | Published |
20080252977 | IMAGE DISPLAY METHOD - Disclosed herein is an image display method wherein an image display apparatus which includes a light source and an optical system is used, the optical system including, an optical modulation section, a Fourier transform image forming section, a Fourier transform image selection section, and a conjugate image forming section, the image forming method including, a step, carried out by the optical modulation section, of producing a two-dimensional image based on two-dimensional image data whose aberrations caused by the optical system are corrected. | 10-16-2008 |
20120176484 | THREE-DIMENSIONAL IMAGE DISPLAY SYSTEM - A three-dimensional image display system, including: a multi-parallax image reproduction apparatus configured to reproduce two-dimensional images, which include a plurality of parallax images within one frame, at a first frame rate; and a three-dimensional display apparatus configured to carry out multi-parallax stereoscopic moving picture display at a second frame rate based on a plurality of parallax images reproduced by the multi-parallax image reproduction apparatus where one frame of stereoscopic moving pictures is formed from a multi-parallax image formed from a predetermined number of parallax images; the multi-parallax image reproduction apparatus reproducing an image wherein control information is included in any of the parallax images for every one frame or every plurality of frames, the three-dimensional image display apparatus carrying out control in accordance with the control information included in the parallax images to carry out the multi-parallax stereoscopic moving picture display. | 07-12-2012 |
Patent application number | Description | Published |
20140003510 | ENCODING APPARATUS, ENCODING METHOD, DECODING APPARATUS, AND DECODING METHOD | 01-02-2014 |
20150092846 | DECODING DEVICE AND DECODING METHOD - The present technology relates to a decoding device and a decoding method capable of reducing the amount of information relating to information specifying a reference image. A reception unit receives inter_ref_pic_set_prediction_flag representing whether reference image specifying information specifying a reference image, which is used for generating a predicted image, of a prior image that is an image prior to a current coding image in coding order that is transmitted in a case where the current coding image is an image other than a first image of a GOP (Group of Picture) is used as the reference image specifying information of the current coding image. The present technology, for example, can be applied to a decoding device of an HEVC (High Efficiency Video Coding) system. | 04-02-2015 |
20150139304 | IMAGE PROCESSING APPARATUS AND METHOD - The present disclosure relates to an image processing device and a method capable of suppressing the reduction of an image quality due to encoding/decoding. The image processing device includes: a quantization unit that when orthogonal transform processing is skipped with respect to a current block, quantizes all components of the current block using one weighting coefficient and when the orthogonal transform processing is performed on the current block, quantizes each component of the current block using a quantization matrix; an encoding unit that encodes the coefficient of the current block which is quantized by the quantization unit; and a transmission unit that transmits the coded data of the current block which is obtained by being encoded by the encoding unit. The present disclosure can be applied to, for example, an image processing device. | 05-21-2015 |
20150139305 | IMAGE PROCESSING APPARATUS AND METHOD - The present disclosure relates to an image processing device and a method capable of suppressing the reduction of an image quality due to encoding/decoding. The image processing device includes: a quantization unit that when orthogonal transform processing is skipped with respect to a current block, quantizes all components of the current block using one weighting coefficient and when the orthogonal transform processing is performed on the current block, quantizes each component of the current block using a quantization matrix; an encoding unit that encodes the coefficient of the current block which is quantized by the quantization unit; and a transmission unit that transmits the coded data of the current block which is obtained by being encoded by the encoding unit. The present disclosure can be applied to, for example, an image processing device. | 05-21-2015 |
20150139310 | IMAGE PROCESSING APPARATUS AND IMAGE PROCESSING METHOD - The present technique relates to an image processing apparatus and an image processing method capable of suppressing deterioration in accuracy of a predicted image and reducing the number of storable reference images. A motion prediction/compensation unit generates a predicted image of an encoding target image by using a reference image. A frame memory is, for example, a decoded picture buffer (DPB) and preferentially stores the reference image of which display order is close to that of the encoding target image. The present technique may be applied to, for example, an encoding device using a high efficiency video coding (HEVC) scheme. | 05-21-2015 |
20150139324 | ENCODING DEVICE AND ENCODING METHOD - The present technology relates to an encoding device and an encoding method capable of reducing the amount of information relating to information that specifies a reference image. | 05-21-2015 |
20150201217 | IMAGE PROCESSING DEVICE AND METHOD - The present invention relates to image processing device and method which can suppress block noise. A filter strength determination unit determines the filter strength for every four lines under the control of a control unit. In other words, if a block boundary determination unit has determined to perform filtering, the filter strength determination unit determines at which strength of the strong filter or the weak filter the filtering process is performed, and outputs the determination result to a filter calculation unit. On this occasion, the filter strength determination unit uses the Bs value in the determination formula of the strong filter. For example, in the case of using the Bs value, the threshold of the determination is set in accordance with a linear function of the Bs value from the control unit. The present disclosure can be applied to, for example, an image processing device. | 07-16-2015 |
20150215652 | IMAGE PROCESSING DEVICE AND METHOD - The present invention relates to image processing device and method which can suppress block noise. A filter strength determination unit determines the filter strength for every four lines under the control of a control unit. In other words, if a block boundary determination unit has determined to perform filtering, the filter strength determination unit determines at which strength of the strong filter or the weak filter the filtering process is performed, and outputs the determination result to a filter calculation unit. On this occasion, the filter strength determination unit uses the Bs value in the determination formula of the strong filter. For example, in the case of using the Bs value, the threshold of the determination is set in accordance with a linear function of the Bs value from the control unit. The present disclosure can be applied to, for example, an image processing device. | 07-30-2015 |
20150222921 | ENCODING DEVICE, ENCODING METHOD, DECODING DEVICE, AND DECODING METHOD - The present technology relates to an encoding device, an encoding method, a decoding device, and a decoding method, which are capable of sharing or predicting information related to a reference image of an image having a hierarchical structure. | 08-06-2015 |
20150256839 | IMAGE PROCESSING APPARATUS AND IMAGE PROCESSING METHOD, IMAGE ENCODING APPARATUS AND IMAGE ENCODING METHOD, AND IMAGE DECODING APPARATUS AND IMAGE DECODING METHOD - Provided is an image processing apparatus including: an encoder configured to scalably encode image data; a write unit configured to cause storage via a predetermined bus to store encoded data that is the image data scalably encoded by the encoder; a read unit configured to read a desired layer of the encoded data from the storage via the bus; and a decoder configured to scalably decode the encoded data read from the storage by the read unit. | 09-10-2015 |
20150304657 | IMAGE PROCESSING DEVICE AND METHOD - An image processing device and method capable of suppressing block noise. A β LUT_input calculation unit and a clipping unit calculate β LUT_input that is a value input to an existing β generation unit and an extended β generation unit. When the value of β LUT_input qp from the clipping unit is equal to or less than 51, the existing β generation unit calculates β using the LUT defined in the HEVC method and supplies the calculated β to a filtering determination unit. When the value of β LUT_input qp from the clipping unit is larger than 51, the extended β generation unit calculates extended β and supplies the calculated β to the filtering determination unit. The device can be applied to an image processing device, for example. | 10-22-2015 |