Patent application number | Description | Published |
20090200074 | Circuit Substrate Having Post-Fed Die Side Power Supply Connections - A circuit substrate uses post-fed top side power supply connections to provide improved routing flexibility and lower power supply voltage drop/power loss. Plated-through holes are used near the outside edges of the substrate to provide power supply connections to the top metal layers of the substrate adjacent to the die, which act as power supply planes. Pins are inserted through the plated-through holes to further lower the resistance of the power supply path(s). The bottom ends of the pins may extend past the bottom of the substrate to provide solderable interconnects for the power supply connections, or the bottom ends of the pins may be soldered to “jog” circuit patterns on a bottom metal layer of the substrate which connect the pins to one or more power supply terminals of an integrated circuit package including the substrate. | 08-13-2009 |
20090256253 | Continuously Referencing Signals Over Multiple Layers in Laminate Packages - A mechanism for continuously referencing signals over multiple layers in laminate packages provides a continuous path for signals from one layer to another while using the ideal voltage reference for all areas of the package and still avoiding discontinuities in the voltage reference. A reference plane adjustment engine analyzes a package design and identifies an ideal top plane for all areas of the package, including areas under particular chip die(s) and areas that are not under a chip die. The reference plane adjustment engine then modifies the package design to reposition ground planes, source voltage planes, signal planes, and vias between layers to maintain a continuous voltage reference regardless of the top layer. The reference plane adjustment engine provides the resulting mixed voltage plane package design to a design analysis engine. A package fabrication system fabricates the package. | 10-15-2009 |
20100195756 | REDUCED WIRING REQUIREMENTS WITH SIGNAL SLOPE MANIPULATION - An information handling system device includes a plurality of electronic components; an electric circuit including at least one trace for connecting two or more of the plurality of electronic components and transmitting data between the plurality of electronic components via at least one electric signal; and a substrate including an insulating material for serving as a base for the electric circuit and the plurality of electronic components, wherein the at least one electric signal transmitted between the plurality of electronic components is transmitted utilizing slope manipulation to provide a slope directly proportional to a data value. | 08-05-2010 |
20100330797 | FABRICATION METHOD FOR CIRCUIT SUBSTRATE HAVING POST-FED DIE SIDE POWER SUPPLY CONNECTIONS - A circuit substrate uses post-fed top side power supply connections to provide improved routing flexibility and lower power supply voltage drop/power loss. Plated-through holes are used near the outside edges of the substrate to provide power supply connections to the top metal layers of the substrate adjacent to the die, which act as power supply planes. Pins are inserted through the plated-through holes to further lower the resistance of the power supply path(s). The bottom ends of the pins may extend past the bottom of the substrate to provide solderable interconnects for the power supply connections, or the bottom ends of the pins may be soldered to “jog” circuit patterns on a bottom metal layer of the substrate which connect the pins to one or more power supply terminals of an integrated circuit package including the substrate. | 12-30-2010 |
20120174047 | Continuously Referencing Signals Over Multiple Layers in Laminate Packages - A mechanism for continuously referencing signals over multiple layers in laminate packages provides a continuous path for signals from one layer to another while using the ideal voltage reference for all areas of the package and still avoiding discontinuities in the voltage reference. A reference plane adjustment engine analyzes a package design and identifies an ideal top plane for all areas of the package, including areas under particular chip die(s) and areas that are not under a chip die. The reference plane adjustment engine then modifies the package design to reposition ground planes, source voltage planes, signal planes, and vias between layers to maintain a continuous voltage reference regardless of the top layer. The reference plane adjustment engine provides the resulting mixed voltage plane package design to a design analysis engine. A package fabrication system fabricates the package. | 07-05-2012 |
20130010445 | REDUCED WIRING REQUIREMENTS WITH SIGNAL SLOPE MANIPULATION - An information handling system device includes a plurality of electronic components; an electric circuit including at least one trace for connecting two or more of the plurality of electronic components and transmitting data between the plurality of electronic components via at least one electric signal; and a substrate including an insulating material for serving as a base for the electric circuit, wherein each of the at least one electric signal transmitted between the plurality of electronic components is transmitted utilizing slope manipulation by manipulating each of the at least one electric signal to provide a slope substantially proportional to a discrete integer data value of n discrete integer data values, n being a positive integer greater than or equal to 3, said discrete integer data value represented by using one of n distinct slopes transmitted utilizing a particular reference voltage of n predetermined reference voltages. | 01-10-2013 |
20130316534 | FABRICATION METHOD FOR CIRCUIT SUBSTRATE HAVING POST-FED DIE SIDE POWER SUPPLY CONNECTIONS - A circuit substrate uses post-fed top side power supply connections to provide improved routing flexibility and lower power supply voltage drop/power loss. Plated-through holes are used near the outside edges of the substrate to provide power supply connections to the top metal layers of the substrate adjacent to the die, which act as power supply planes. Pins are inserted through the plated-through holes to further lower the resistance of the power supply path(s). The bottom ends of the pins may extend past the bottom of the substrate to provide solderable interconnects for the power supply connections, or the bottom ends of the pins may be soldered to “jog” circuit patterns on a bottom metal layer of the substrate which connect the pins to one or more power supply terminals of an integrated circuit package including the substrate. | 11-28-2013 |
20130328645 | Plating Stub Resonance Shift with Filter Stub Design Methodology - A technique is provided to increase signal bandwidth of data processing signals by providing a plating stub as a filter using multiple line segments of different widths to filter the reflected high frequency components bouncing from the stub end toward the signal path. This stub-filter shifts the resonance point to a much higher frequency, placing that point of resonance beyond the bandwidth of interest without sacrificing a low frequency loss. Accordingly, there is provided an apparatus comprising a stub filter of a substrate, comprising a multi-segmented stub comprising a plurality of stub portions, where one of the stub portions has a different impedance than another of the stub portions. | 12-12-2013 |
20130330940 | Multi-Level Connector and Use Thereof that Mitigates Data Signaling Reflections - An improved electrical connector for connecting bus lines to a card such as a memory card or media card, including a multi-level connector comprising a latching device having a plurality of insertable latch positions that advantageously allows for selectively connecting or isolating an electrical path to an adjoining connector. The connectors of unpopulated DIMM slots are disconnected from the network along with the traces that would normally form a stub with associated undesirable signal reflections that would otherwise disturb the signal transmitted to the receiving end if not properly terminated. The contacts of the edge connector itself are used as a means to selectively connect or disconnect adjacent/downstream cards in a serially cascaded architecture. The burden of the stubs due to unpopulated card slots and the need to place one card at the far end of the network are thus eliminated. | 12-12-2013 |
20140075748 | Multi-Level Connector and Use Thereof that Mitigates Data Signaling Reflections - An improved electrical connector for connecting bus lines to a card such as a memory card or media card, including a multi-level connector comprising a latching device having a plurality of insertable latch positions that advantageously allows for selectively connecting or isolating an electrical path to an adjoining connector. The connectors of unpopulated DIMM slots are disconnected from the network along with the traces that would normally form a stub with associated undesirable signal reflections that would otherwise disturb the signal transmitted to the receiving end if not properly terminated. The contacts of the edge connector itself are used as a means to selectively connect or disconnect adjacent/downstream cards in a serially cascaded architecture. The burden of the stubs due to unpopulated card slots and the need to place one card at the far end of the network are thus eliminated. | 03-20-2014 |
20140167886 | Plating Stub Resonance Shift with Filter Stub Design Methodology - A technique is provided to increase signal bandwidth of data processing signals by providing a plating stub as a filter using multiple line segments of different widths to filter the reflected high frequency components bouncing from the stub end toward the signal path. This stub-filter shifts the resonance point to a much higher frequency, placing that point of resonance beyond the bandwidth of interest without sacrificing a low frequency loss. Accordingly, there is provided an apparatus comprising a stub filter of a substrate, comprising a multi-segmented stub comprising a plurality of stub portions, where one of the stub portions has a different impedance than another of the stub portions. | 06-19-2014 |