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Liu, Fremont

Chang-Chi Liu, Fremont, CA US

Patent application numberDescriptionPublished
20090196161Combined echo and crosstalk cancellation - Combined echo and crosstalk cancellation is provided. Frequency domain adaptive filters are used to remove or reduce the effects of echo and crosstalk for a multi-channel and full-duplex communications system. Data from each transmit channel is buffered and converted to the frequency domain. The frequency domain data is multiplied by crosstalk coefficients to obtain a frequency domain correction signal for each channel. Adaptation of the crosstalk coefficients is based on correlations between the error signals and the data from each of the transmit channels. A single frequency domain transform engine, such as a Fast Fourier Transform engine, is employed for all calculations to save power and area.08-06-2009
20110141875COMBINED ECHO AND CROSSTALK CANCELLATION - Combined echo and crosstalk cancellation is provided. Frequency domain adaptive filters are used to remove or reduce the effects of echo and crosstalk for a multi-channel and full-duplex communications system. Data from each transmit channel is buffered and converted to the frequency domain. The frequency domain data is multiplied by crosstalk coefficients to obtain a frequency domain correction signal for each channel. Adaptation of the crosstalk coefficients is based on correlations between the error signals and the data from each of the transmit channels. A single frequency domain transform engine, such as a Fast Fourier Transform engine, is employed for all calculations to save power and area.06-16-2011

Chongguang Liu, Fremont, CA US

Patent application numberDescriptionPublished
20090175898Influenza Hemagglutinin And Neuraminidase Variants - Polypeptides, polynucleotides, methods, compositions, and vaccines comprising influenza hemagglutinin and neuraminidase variants are provided.07-09-2009
20090175908Influenza Hemagglutinin And Neuraminidase Variants - Polypeptides, polynucleotides, methods, compositions, and vaccines comprising influenza hemagglutinin and neuraminidase variants are provided.07-09-2009
20110002960INFLUENZA HEMAGGLUTININ AND NEURAMINIDASE VARIANTS - Polypeptides, polynucleotides, methods, compositions, and vaccines comprising influenza hemagglutinin and neuraminidase variants are provided.01-06-2011
20110070263INFLUENZA HEMAGGLUTININ AND NEURAMINIDASE VARIANTS - Polypeptides, polynucleotides, methods, compositions, and vaccines comprising influenza hemagglutinin and neuraminidase variants are provided.03-24-2011
20120034265INFLUENZA HEMAGGLUTININ AND NEURAMINIDASE VARIANTS - Polypeptides, polynucleotides, methods, compositions, and vaccines comprising influenza hemagglutinin and neuraminidase variants are provided.02-09-2012
20120135023INFLUENZA HEMAGGLUTININ AND NEURAMINIDASE VARIANTS - Polypeptides, polynucleotides, methods, compositions, and vaccines comprising influenza hemagglutinin and neuraminidase variants are provided.05-31-2012
20120301503INFLUENZA HEMAGGLUTININ AND NEURAMINIDASE VARIANTS - Polypeptides, polynucleotides, methods, compositions, and vaccines comprising influenza hemagglutinin and neuraminidase variants are provided.11-29-2012
20130156810INFLUENZA HEMAGGLUTININ AND NEURAMINIDASE VARIANTS - Polypeptides, polynucleotides, methods, compositions, and vaccines comprising influenza hemagglutinin and neuraminidase variants are provided.06-20-2013
20130243816INFLUENZA HEMAGGLUTININ AND NEURAMINIDASE VARIANTS - Polypeptides, polynucleotides, methods, compositions, and vaccines comprising influenza hemagglutinin and neuraminidase variants are provided.09-19-2013
20140023680INFLUENZA HEMAGGLUTININ AND NEURAMINIDASE VARIANTS - Polypeptides, polynucleotides, methods, compositions, and vaccines comprising influenza hemagglutinin and neuraminidase variants are provided.01-23-2014
20140242102INFLUENZA HEMAGGLUTININ AND NEURAMINIDASE VARIANTS - Polypeptides, polynucleotides, methods, compositions, and vaccines comprising influenza hemagglutinin and neuraminidase variants are provided.08-28-2014

Patent applications by Chongguang Liu, Fremont, CA US

Christina Ying Liu, Fremont, CA US

Patent application numberDescriptionPublished
20110034150INTERNET-PHONE OPERATING SYSTEM AND APPLICATIONS AND INTERNET-PHONE FOR DIGITAL OUTPUT - An Internet-Phone device and system for receiving and outputting digital content. The Internet-Phone device may be an Internet-enabled smart phone with access to the Internet, may include a voice communication functionality and a messaging application, may be a mobile apparatus, and may be a wireless information apparatus. The Internet-Phone system may include one or more of a digital camera for image data acquisition, a digital imaging application for image editing, a touch sensitive screen, a graphical user interface, a document creation or document editing application, an e-mail application, and an Internet browsing application. The Internet-Phone device may include an operating system providing an object model or an application programming interface to facilitate access with an output service. The Internet-Phone device further may include a wireless communication unit that may have a radio frequency controller for establishing radio frequency wireless communication between the Internet-Phone device and a wireless output devices, and an output manager for managing output of the digital content to a selected wireless output device.02-10-2011
20110035682INTERNET-PAD OPERATING SYSTEM AND APPLICATIONS AND INTERNET-PAD FOR DIGITAL OUTPUT - An Internet-Pad device and system for receiving and outputting digital content. The Internet-Pad device may be a digital Pad with access to the Internet and the digital Pad may be a wireless mobile information apparatus. The Internet-Pad system may include a touch sensitive screen, a graphical user interface, a document creation or document editing application, an e-mail application, and an Internet browsing application installed or included in the Internet-Pad. The Internet browsing application may provide access to a digital document or digital content. The Internet-Pad may include an operating system providing an object model or an application programming interface to facilitate applications in the Internet-Pad accessing an output service. The Internet-Pad further may include a wireless communication unit that includes a radio frequency controller for establishing radio frequency wireless communication between the Internet-Pad and one or more wireless output devices that are distinct devices from the Internet-Pad, and an output manager for managing output of the digital content to a selected wireless output device.02-10-2011
20110211226OUTPUT DEVICE AND METHOD FOR OUTPUT WITHOUT AN OUTPUT DRIVER - An output device for providing output service to a mobile information apparatus without requiring a device specific output driver installed at the mobile information apparatus. The wireless output device may include an operating system, a wireless communication unit for radio frequency communication, a display screen, and a user interface over the display screen, the output device may include features for installing one or more application software at the output device for expanding the capabilities of the output device, registering the output device with a control point over a network and providing an identification of the output device for enabling one or more mobile information apparatuses to transmit output data to the output device. Subsequent to registering the output device and providing the identification information of the output device, the output device receives output data associated with the identification information from the mobile information apparatus for rendering.09-01-2011
20110279829OUTPUT SYSTEM DEVICE METHODS FOR RENDERING ACCESSED INTERNET CONTENT - Output system device methods for rendering digital content accessed over the Internet, the method includes providing security or authentication information to one or more servers over the Internet, providing payment or subscription information to the one or more servers over the Internet, selecting a reference to digital content, and providing, to the one or more servers, a content object that includes a reference or pointer to the digital content. Subsequently, an output system device receives, from the one or more servers over the Internet, the digital content corresponding to selected reference or pointer to the digital content for rendering at the rendering engine of the output system device.11-17-2011
20110279863SERVER APPLICATIONS AND SYSTEMS FOR RENDERING RECEIVED DIGITAL CONTENT - Server applications and systems for rendering digital content received from an information apparatus, the systems including a server, one or more server applications enabling multiple concurrent users to log on and access the one or more server applications in separate and protected sessions, and an output device. The server may receive a content object that includes digital content and instructions for manipulating the digital content. The server may further receive one or more job objects including at least one of authentication information, payment information, and subscription information. The server may generate an output data related to the output job, and send the output data for rendering at the output device. The systems may send a confirmation related to the output of digital content to the information apparatus. The systems may also store digital content at a server node over the Internet for use by the information apparatus.11-17-2011
20120230315WIRELESS SYNCHRONIZATION OF DATA AND SOFTWARE COMPONENTS OVER A WIRELESS NETWORK COMPATIBLE TO IEEE802.11 STANDARD(S) FOR MOBILE DEVICES - Wireless synchronization of data and software components over IEEE802.11 standard(s) are herein disclosed and enabled. An information apparatus, which includes a wireless communication unit compatible with IEEE802.11, may access a wireless local area network (WLAN). To setup the wireless synchronization, the user connects the information apparatus to a wireless output device over a wired connection (e.g., USB) and selects the wireless output device. Information associated with the wireless output device is saved in the mobile information apparatus for enabling wireless synchronization. Next, the user connects the mobile information apparatus to the WLAN, and, depending on the availability of the wireless output device in the network, the information apparatus may lock a wireless connection to the wireless output device for wireless synchronization. A client application in the mobile information apparatus and output controller software in the wireless output device may be required to facilitate the wireless synchronization over the WLAN.09-13-2012
20120258700SMART PHONE THAT INCLUDES A TOUCH SENSITIVE SCREEN AND A WIRELESS COMMUNICATION UNIT COMPATIBLE TO BLUETOOTH AND/OR IEEE802.11 STANDARDS FOR TRANSMITTING AUDIO CONTENT - Smart phones are herein disclosed and enabled. The smart phones include a graphical user interface, a touch sensitive screen, a digital camera, a wireless communication unit compatible with Bluetooth® and/or IEEE802.11 standards, and an Internet browsing application. The user may install additional applications to the smart phones. In one example, the smart phones may connect wirelessly to a Bluetooth® wireless audio output device. To setup wireless connection, the smart phone provides an interface over the touch sensitive screen to initiate wireless discovery, discovers one or more wireless devices for user selection, and locks a wireless communication connection between the smart phone and the selected wireless audio output device for wireless output of the audio content. A password or code may be required for connection. A security key may be stored in the smart phones to facilitate future connections. The smart phones also may support IEEE802.11 standards for direct wireless communication.10-11-2012

David J. Liu, Fremont, CA US

Patent application numberDescriptionPublished
20090004670METHODS FOR FABRICATING SURFACE ENHANCED FLUORESCENT (SEF) NANOPARTICLES AND THEIR APPLICATIONS IN BIOASSAYS - Embodiments of the invention relate to SEF nanoparticles with increased fluorescence, methods of making SEF nanoparticles, and their application in various bioassays for the detection of target bioanalytes. One embodiment includes the SEF nanoparticle itself, a second embodiment includes the fabrication of SEF nanoparticles, a third embodiment includes methods of using SEF nanoparticles in biodetection assays. A final embodiment includes kits to be used in the fabrication of SEF nanoparticles.01-01-2009
20100167938Nucleic acid sequencing and electronic detection - Embodiments of the present invention provide devices methods for sequencing DNA using arrays of reaction regions containing sensors to monitor changes in solutions or bound molecules contained in the reaction regions. Additional embodiments provide devices and methods for sequencing DNA using arrays of reaction regions that allow for optical monitoring of solutions in the reaction regions. Chemical amplification schemes that allow DNA to be sequenced in which multiple nucleotide addition reactions are performed to detect the incorporation of a base are disclosed. By sequencing DNA using parallel reactions contained in large arrays, DNA can be rapidly sequenced.07-01-2010
20100240544Aptamer biochip for multiplexed detection of biomolecules - The embodiments of the invention relate to an in situ generated and self-addressed aptamer biochip for the multiplexed detection of biomolecules. The inventive aptamer biochip uses sets of complementary probes to permit in situ generation and immobilization of aptamers on the aptamer biochip surface to form an addressable aptamer array. These aptamer biochip arrays can be used for detecting multiple biomolecules, especially those for disease signature pattern analysis.09-23-2010
20110159481Solid-phase chelators and electronic biosensors - Methods for sequencing nucleic acids are presented. Sequencing is accomplished through the chemical amplification of the products of DNA synthesis and the detection of the chemically amplified products. In embodiments of the invention, a substrate is provided having a plurality of molecules of DNA to be sequenced attached and a plurality of molecules capable of chelating pyrophosphate ions attached, the DNA molecules to be sequenced are primed, and a next complementary nucleotide is incorporated and excised a plurality of times leading to the buildup of pyrophosphate ions locally around the DNA molecule to be sequenced. Pyrophosphate ions are captured by the substrate-attached chelators and electronically detected to determine the identity of the next complementary nucleic acid in the DNA molecule to be sequenced. Additionally, devices and methods are provided for detecting biomolecules through the detection of pyrophosphate ions.06-30-2011
20120208716DEVICE AND METHOD FOR PARTICLE COMPLEX HANDLING - An embodiment of the invention relates to a device for detecting an analyte in a sample. The device comprises a fluidic network and an integrated circuitry component. The fluidic network comprises a sample zone, a cleaning zone and a detection zone. The fluidic network contains a magnetic particle and/or a signal particle. A sample containing an analyte is introduced, and the analyte interacts with the magnetic particle and/or the signal particle through affinity agents. A microcoil array or a mechanically movable permanent magnet is functionally coupled to the fluidic network, which are activatable to generate a magnetic field within a portion of the fluidic network, and move the magnetic particle from the sample zone to the detection zone. A detection element is present which detects optical or electrical signals from the signal particle, thus indicating the presence of the analyte.08-16-2012
20120322683ENZYMATIC SIGNAL GENERATION AND DETECTION OF BINDING COMPLEXES IN STATIONARY FLUIDIC CHIP - An embodiment of the invention relates to a device for detecting an analyte in a sample. The device comprises a fluidic network and an integrated circuitry component. The fluidic network comprises a sample zone, a cleaning zone and a detection zone. The fluidic network contains a magnetic particle and/or a signal particle. A sample containing an analyte is introduced, and the analyte interacts with the magnetic particle and/or the signal particle through affinity agents. A microcoil array or a mechanically movable permanent magnet is functionally coupled to the fluidic network, which are activatable to generate a magnetic field within a portion of the fluidic network, and move the magnetic particle from the sample zone to the detection zone. A detection element is present which detects optical or electrical signals from the signal particle, thus indicating the presence of the analyte.12-20-2012
20140141526METHOD AND DEVICE FOR BIOMOLECULE PREPARATION AND DETECTION USING MAGNETIC ARRAY - An embodiment of the invention relates to a device for detecting an analyte in a sample. The device comprises a fluidic network and an integrated circuitry component. The fluidic network comprises multiple zones such as a sample zone, a cleaning zone and a detection zone. The fluidic network contains a magnetic particle and/or a signal particle. A sample containing an analyte is introduced, and the analyte interacts with the magnetic particle and/or the signal particle through affinity agents. A microcoil array or a mechanically movable permanent magnet is functionally coupled to the fluidic network, which are activatable to generate a magnetic field within a portion of the fluidic network, and move the magnetic particle from the sample zone to the detection zone. A detection element is present which detects optical or electrical signals from the signal particle, thus indicating the presence of the analyte.05-22-2014
20140274730NUCLEIC ACID SEQUENCING AND ELECTRONIC DETECTION - Embodiments of the present invention provide devices methods for sequencing DNA using arrays of reaction regions containing sensors to monitor changes in solutions or bound molecules contained in the reaction regions. Additional embodiments provide devices and methods for sequencing DNA using arrays of reaction regions that allow for optical monitoring of solutions in the reaction regions. Chemical amplification schemes that allow DNA to be sequenced in which multiple nucleotide addition reactions are performed to detect the incorporation of a base are disclosed. By sequencing DNA using parallel reactions contained in large arrays, DNA can be rapidly sequenced.09-18-2014
20140342470DEVICE AND METHOD FOR PARTICLE COMPLEX HANDLING - An embodiment of the invention relates to a device for detecting an analyte in a sample. The device comprises a fluidic network and an integrated circuitry component. The fluidic network comprises a sample zone, a cleaning zone and a detection zone. The fluidic network contains a magnetic particle and/or a signal particle. A sample containing an analyte is introduced, and the analyte interacts with the magnetic particle and/or the signal particle through affinity agents. A microcoil array or a mechanically movable permanent magnet is functionally coupled to the fluidic network, which are activatable to generate a magnetic field within a portion of the fluidic network, and move the magnetic particle from the sample zone to the detection zone. A detection element is present which detects optical or electrical signals from the signal particle, thus indicating the presence of the analyte.11-20-2014

Patent applications by David J. Liu, Fremont, CA US

David Kuan-Yu Liu, Fremont, CA US

Patent application numberDescriptionPublished
20080225601EEPROM MEMORY DEVICE WITH CELL HAVING NMOS IN A P POCKET AS A CONTROL GATE, PMOS PROGRAM/ERASE TRANSISTOR, AND PMOS ACCESS TRANSISTOR IN A COMMON WELL - A memory device including a plurality of memory cells, each with a control gate NMOS transistor sharing a floating gate with a program/erase PMOS transistor which is, in turn, connected in series with an access PMOS transistor. The memory cells are formed in a common N-Well formed in a P-substrate, the NMOS transistor being formed in a p-doped pocket or base. The program/erase PMOS includes a gate, and first and second P+ doped regions formed in the N-Well, wherein the first P+ region is electrically connected to a corresponding bit line. The access PMOS includes a gate, and first and second P+ regions formed within the N-Well, wherein the first P+ region is electrically connected to the second P+ region of the program/erase PMOS, and the gate is electrically connected to a corresponding word line. The control gate NMOS includes source, drain, and gate, wherein the source and third drain as well as the p-doped pocket are electrically connected to a corresponding control gate line, and the gate is electrically connected to the gate of the program/erase PMOS, forming floating gate of the cell.09-18-2008
20080273392METHOD OF PROGRAMMING A SELECTED MEMORY CELL - A memory device including a plurality of memory cells, each with a control gate NMOS transistor sharing a floating gate with a program/erase PMOS transistor which is, in turn, connected in series with an access PMOS transistor. The memory cells are formed in a common N-Well formed in a P-substrate, the NMOS transistor being formed in a p-doped pocket or base. The program/erase PMOS includes a gate, and first and second P+ doped regions formed in the N-Well, wherein the first P+ region is electrically connected to a corresponding bit line. The access PMOS includes a gate, and first and second P+ regions formed within the N-Well, wherein the first P+ region is electrically connected to the second P+ region of the program/erase PMOS, and the gate is electrically connected to a corresponding word line. The control gate NMOS includes source, drain, and gate, wherein the source and third drain as well as the p-doped pocket are electrically connected to a corresponding control gate line, and the gate is electrically connected to the gate of the program/erase PMOS, forming floating gate of the cell.11-06-2008
20080273401METHOD OF ERASING A BLOCK OF MEMORY CELLS - A memory device including a plurality of memory cells, each with a control gate NMOS transistor sharing a floating gate with a program/erase PMOS transistor which is, in turn, connected in series with an access PMOS transistor. The memory cells are formed in a common N-Well formed in a P-substrate, the NMOS transistor being formed in a p-doped pocket or base. The program/erase PMOS includes a gate, and first and second P+ doped regions formed in the N-Well, wherein the first P+ region is electrically connected to a corresponding bit line. The access PMOS includes a gate, and first and second P+ regions formed within the N-Well, wherein the first P+ region is electrically connected to the second P+ region of the program/erase PMOS, and the gate is electrically connected to a corresponding word line. The control gate NMOS includes source, drain, and gate, wherein the source and third drain as well as the p-doped pocket are electrically connected to a corresponding control gate line, and the gate is electrically connected to the gate of the program/erase PMOS, forming floating gate of the cell.11-06-2008
20090014772EEPROM MEMORY CELL WITH FIRST-DOPANT-TYPE CONTROL GATE TRANSISTOR, AND SECOND-DOPANT TYPE PROGRAM/ERASE AND ACCESS TRANSISTORS FORMED IN COMMON WELL - A memory device including a plurality of memory cells, each with a control gate NMOS transistor sharing a floating gate with a program/erase PMOS transistor which is, in turn, connected in series with an access PMOS transistor. The memory cells are formed in a common N-Well formed in a P-substrate, the NMOS transistor being formed in a p-doped pocket or base. The program/erase PMOS includes a gate, and first and second P+ doped regions formed in the N-Well, wherein the first P+ region is electrically connected to a corresponding bit line. The access PMOS includes a gate, and first and second P+ regions formed within the N-Well, wherein the first P+ region is electrically connected to the second P+ region of the program/erase PMOS, and the gate is electrically connected to a corresponding word line. The control gate NMOS includes source, drain, and gate, wherein the source and third drain as well as the p-doped pocket are electrically connected to a corresponding control gate line, and the gate is electrically connected to the gate of the program/erase PMOS, forming floating gate of the cell.01-15-2009

Dongtai Liu, Fremont, CA US

Patent application numberDescriptionPublished
20090085658ANALOG POWER AMPLIFIER PREDISTORTION METHODS AND APPARATUS - An embodiment of the invention is a predistortion approach to linearize a power amplifier by using one or more analog multiplier(s) and a DSP-based processor. For the analog embodiment, the inherent nature of the analog circuitries allows digital predistortion processing structured directly at the RF band, and enables a single power amplifier to support multi-modulation schemes, multi-carriers and multi-channels. As a result, the predistortion architecture is particularly suitable for wireless transmission systems, such as base-stations, repeaters, and indoor signal coverage systems. The wireless system performance can be improved and upgraded just by using the new PA module rather than change or rebuild new subsystem in existing base station. The analog embodiment can also mix and match its analog multipliers with other analog components such as phase splitters, phase shifters, attenuators, filters, couplers, mixers, low-noise amplifiers, buffers, envelope detectors, and etc., to provide additional features.04-02-2009
20090096521POWER AMPLIFIER PREDISTORTION METHODS AND APPARATUS USING ENVELOPE AND PHASE DETECTOR - An embodiment of the invention is a predistortion approach to linearize a power amplifier without frequency conversion of the RF signals by using envelope and phase detectors to detect the error to be corrected, and then one or more analog multiplier(s) and a DSP-based processor. For the analog embodiment, the inherent nature of the analog circuitries allows digital predistortion processing structured directly at the RF band, and enables a single power amplifier to support multi-modulation schemes, multi-carriers and multi-channels. As a result, the predistortion architecture is particularly suitable for wireless transmission systems, such as base-stations, repeaters, and indoor signal coverage systems. The wireless system performance can be improved and upgraded just by using the new PA module rather than change or rebuild new subsystem in existing base station. The analog embodiment can also mix and match its analog multipliers with other analog components such as phase splitters, phase shifters, attenuators, filters, couplers, mixers, low-noise amplifiers, buffers, envelope detectors, and etc., to provide additional features.04-16-2009

Guangli Liu, Fremont, CA US

Patent application numberDescriptionPublished
20080217710Novel SyAF structure to fabricate Mbit MTJ MRAM - A MTJ that minimizes error count (EC) while achieving high MR value, low magnetostriction, and a RA of about 1100 Ω-μm09-11-2008

Hain-Ching Liu, Fremont, CA US

Patent application numberDescriptionPublished
20090049238DISK DRIVE STORAGE DEFRAGMENTATION SYSTEM - The present invention provides a disk drive storage defragmentation system, comprising providing a cache buffer system coupled to a host system, coupling a disk drive storage system to the cache buffer system, performing a defragmentation process on the disk drive storage system utilizing the cache buffer system and servicing a data access request by the host system from the cache buffer system.02-19-2009
20100077251METHOD AND SYSTEM FOR RELIABLY AND EFFICIENTLY TRANSPORTING DATA OVER A NETWORK - A data transport system for transporting data between a server (03-25-2010
20130044803INSTANTANEOUS DECODER REFRESH FRAME ALIGNED MULTI-BITRATE TRANSCODER OUTPUT - A video stream is transcoded to provide a plurality of primary profiles. Individual frames of the video stream have a Presentation Time Stamp (PTS). A PTS is used as a token to identify particular frames to be encoded as Instantaneous Decoder Refresh (IDR) frames in each profile. An IDR frame period is determined, indicative of a desired number of video frames between two IDR frames. An IDR frame is inserted into each profile every IDR frame period. The IDR frames of each profile are aligned with the same IDR frames of the other profiles. The PTS of each IDR frame in each profile is monitored. Upon determining that a PTS is out of alignment, the next PTS of the affected profile is aligned with the corresponding PTS of remaining profiles. Backup transcoders produce backup profiles that are maintained in alignment with each other and with the primary profiles.02-21-2013

Patent applications by Hain-Ching Liu, Fremont, CA US

Hain-Ching Humphrey Liu, Fremont, CA US

Patent application numberDescriptionPublished
20090268612Method and apparatus for a network queuing engine and congestion management gateway - A method, apparatus, and queuing engine implement congestion management. The method may include receiving, via a first interface of the apparatus, data traffic for forwarding to a node of a network. The method may also include receiving, at a second interface of the apparatus, a notification that indicates that congestion is affecting communication with the node, and responsive to the notification, accumulating the data traffic into the queue for a given time period. The method may further include dequeuing the data traffic from the queue after the given time period; and sending the portion of the data traffic to the node via the second interface.10-29-2009
20110026584STATISTICAL REMULTIPLEXING OF COMPRESSED VIDEO SEGMENTS - Compressed digital video bitstreams are segmented into video segments. A staging processor performs transrating on the original video segments and generates several transrated output video segments. The output video segments are combined into a video block for further distribution. A bit rate switch selects among the transrated video segments from the video block to provide a statistically multiplexed output bitstream. The bit rate switch can also select local stream segments, such as advertisements, for content insertion purposes. A transprocessor including multiple encoder output features is also provided.02-03-2011

Han Liu, Fremont, CA US

Patent application numberDescriptionPublished
20090174296Computer frame - A computer frame has a body and multiple support assemblies. The body has a housing and multiple mounting legs and may accommodate a fan. The housing has a sidewall. The mounting legs are attached to and protrude down from the sidewall. The support assemblies are attached to and hold the body to allow a computer to be mounted under the body. Therefore, the computer frame allows efficient air circulation and makes maintaining a computer system mounted in the computer frame easy.07-09-2009
20100224387Case cable management - The case cable management has a shell, a circuit board, multiple sockets and a cover. The shell has a bottom board and a sidewall. The circuit board is attached securely to the bottom board of the shell. The sockets are mounted through the sidewall of the shell and have multiple terminals connected securely to the circuit board. The cover covers the shell. Multiple power lines are mounted through the sidewall of the shell to connect the circuit board and sockets to a power supply and cables from computer apparatuses are connected to the sockets to receive electric power. Different cables can be distinguished clearly and conveniently for simplified cable routing to avoid confusion and facilitate replacement.09-09-2010
20110007471COMPUTER CHASSIS - A computer chassis has a body, a connector, an opening, a plug-in slot and an eSATA connector. The body has a panel and a receiving space. The connector is attached to the body and located in the receiving space. The opening is formed on the panel and communicates with the receiving space. The plug-in slot is formed on the panel beside the opening. The eSATA connector has a receiving end mounted to the plug-in slot.01-13-2011

Patent applications by Han Liu, Fremont, CA US

Harvey I. Liu, Fremont, CA US

Patent application numberDescriptionPublished
20080310836Manufacturing System and Method Using IR Communications Link - An automated test system for testing devices being manufactured comprises an infrared communications link for free space communications between a host and a device under test. The communications link is asymmetric and instructions from the host are acknowledged by the device. The instructions cause the device to operate, and the output of the device is monitored, logged, and compared to acceptance criteria. The host can then generate calibration messages to the device, to change the device operating characteristics as appropriate. The communications link uses an unmodulated data stream together with asynchronous handshaking and a robust checksum algorithm to ensure accurate communication.12-18-2008
20090043294Capacitive Sensing Method and Device for Detecting Skin - A skin proximity sensor and method are disclosed in a dermatologic treatment device that includes a bezel or similar surface, and a treatment source capable of being activated to supply a dermatologic treatment through the bezel or surface, such as a window or similar port. A plurality of contacts leading to remotely located capacitors, in some embodiments, or a plurality of capacitive sensors in other embodiments, is positioned in or under the bezel and around the window, and control circuitry coupled to the plurality of capacitors senses the change in capacitance due to skin and inhibits activation of the dermatologic treatment device unless the proximity of skin is sensed. The presence of skin is detected, for example, by measuring changes in charge and discharge times, indicating a variation in capacitance.02-12-2009
20090097513Failure Protection Apparatus and System - A safety and interlock circuit for use with devices which could cause injury if an error condition causes improper operation. A control program executing on a processor monitors a variety of device conditions, including pulse over-duration threshold, diode over-current threshold, pulse lock-out duration, temperature threshold, and pulse repetition frequency limit, and prevents the laser from firing if an error condition is detected. In addition, the error conditions are logged in a persistent memory to facilitate subsequent diagnosis and correction.04-16-2009
20100069898Acne Treatment Method, System and Device - An acne treatment system, device and method includes optical visualization means for identifying areas of skin colonized by the 03-18-2010
20110098789Phototherapy Device Thermal Control Apparatus and Method - A phototherapy device includes a light source; a light emanation block; and a heat exchanger for the dissipation of heat from one or more heat loads associated with the device. Heat may be transferred via the heat exchanger from the light source independently of the dissipation of heat from one or more of the other device heat loads. Substantially thermally isolated heat transfer regions may be provided, and such regions may be maintained at different operating temperatures, to control the transfer of heat in conjunction with a phototherapy method and to promote efficient and enhanced device operation and performance.04-28-2011

Patent applications by Harvey I. Liu, Fremont, CA US

Hongche Liu, Fremont, CA US

Patent application numberDescriptionPublished
20080208852Editable user interests profile - A method for an online information system includes tracking user interactions with the online information system, storing profile information for the user based on the user interactions, and providing user access to modify the user's profile information. This system improves confidence in system for users who are reluctant to have their online activity tracked by the system operator. The user has access to all information that the system operator has for the user, and can edit or correct that information.08-28-2008
20080294609CANONICALIZATION OF TERMS IN A KEYWORD-BASED PRESENTATION SYSTEM - A presentation system accepts presentations or references to presentations from prospective presenters. Some or all of the presentations or references are stored in a database and referenced by keywords such that presentations to be presented in response to particular searches can be identified. A presentation manager handles accepting bids and settling terms between prospective presenters. The results of such processes might be stored in a presentation details database. A presentation server handles retrieving presentations from the presentation details database for presentation to users along with requests such as search results. Both the presentation manager and the presentation server can operate on a keywords-basis, wherein presentation terms specify keywords to be associated with particular presentations and the presentation server serves particular presentations based on keywords in a search query for which the presentations are to be returned. The association of keywords can be done using canonicalization so that, under certain conditions, different keywords are treated as the same keyword. Canonicalizations might include plural/singular forms, gender forms, stem word forms, suffix forms, prefix forms, typographical error forms, word order, pattern ignoring, acronyms, stop word elimination, etc. Conditions might include aspects of the search query state, such as the user's demographics, the page from which the search query was initiated, etc.11-27-2008
20110246634Internet Improvement Platform with Learning Module - Redirecting DNS traffic includes receiving, at an Internet improvement platform, a DNS query issued from an Internet application running on a computing device. The Internet navigation platform determines an appropriate response to the DNS query. The response is then executed. Characteristics relative to the query and to the result of a served page may be recorded and later referenced by the Internet improvement platform.10-06-2011
20120036352Anonymization of Personal Data - A method for anonymization of personal data is provided for protecting the privacy of a user while sharing user information with a third party. The method includes receiving from a user a domain name address associated with an intended website and an Internet Protocol (IP) address associated with the user and determining that the domain name address is an invalid domain name. The method may further include encrypting the IP address associated with the user by translating the IP address into a unique identifier, with the encryption being a one-way hashing process, and then sending the unique identifier and the invalid domain name address to the third party. The method may further include receiving, from the third party, the unique identifier and a third party content, with the third party content being based on the invalid domain name; decrypting the unique identifier by translating the unique identifier back into the IP address, associating the third party content with the IP address, and based on the IP address, providing the third party content to the user.02-09-2012

Patent applications by Hongche Liu, Fremont, CA US

Hongze Liu, Fremont, CA US

Patent application numberDescriptionPublished
20090306680SYSTEM AND METHOD FOR SELECTING FOLLICULAR UNITS FOR HARVESTING - A system and method for selecting follicular units for hair harvesting using imaging and processing techniques are provided. The method of selecting an order of harvesting follicular units is based on a combination of one or more policies and filters that are generally designed to improve a speed, quality and efficacy of the harvesting process. The method of the present invention may be implemented with various hair harvesting and transplantation systems, including manual, partially automated and fully automated systems.12-10-2009

Hsin-Yuo Liu, Fremont, CA US

Patent application numberDescriptionPublished
20110267966METHODS AND APPARATUSES TO IMPROVE PERFORMANCE OF COEXISTING RADIO SIGNALS - Embodiments of a method and an apparatus for improving the performance of coexisting wireless radio signals are described. In one embodiment, the method includes detecting burst-type interference based on a packet error rate and a transmission rate associated with a transmitter. The method further includes setting the transmission rate in accordance with a burst-type rate adaptation mode to increase data throughput.11-03-2011
20110321042Methods and Systems to Permit Multiple Virtual Machines to Separately Configure and Access a Physical Device - Methods and systems to permit multiple virtual machines (VMs) to separately configure and access a physical resource, substantially outside of a virtual machine monitor (VMM) that hosts the VMs. Each of a plurality of virtual machines (VMs) may access and configure the physical device through corresponding instances of a device driver that exposes controllable functions of the physical device within the VMs. VM-specific configuration parameters and connection information may be maintained for each of the VMs, outside of a VMM, to reconfigure or virtualize the physical device for each of the VMs with the corresponding VM-specific configuration parameters and connection information. Physical device virtualization augmentation features may be implemented within a combination of a physical device controller and a host device driver that executes outside of the VM.12-29-2011
20110321065Methods and Systems to Implement a Physical Device to Differentiate Amongst Multiple Virtual Machines of a Host Computer System - Methods and systems to implement a physical device to differentiate amongst multiple virtual machines (VM) of a computer system. The device may include a wireless network interface controller. VM differentiation may be performed with respect to configuration controls and/or data traffic. VM differentiation may be performed based on VM-specific identifiers (VM IDs). VM IDs may be identified within host application programming interface (API) headers of incoming configuration controls and data packets, and/or may be looked-up based on VM-specific MAC addresses associated with data packets. VM IDs may be inserted in API headers of outgoing controls and/or data packets to permit a host computer system to forward the controls and/or packets to appropriate VMs. VM IDs may be used look-up VM-specific configuration parameters and connection information to reconfigure the physical device on a per VM basis. VM IDs may be used look-up VM-specific security information with which to process data packets.12-29-2011
20130095760System and Methods for Avoiding Interference Between Communications in Different Frequency Bands - An electronic device may include wireless communications circuitry that communicates in multiple radio-frequency communications bands such as cellular or local area network bands. The radio-frequency communications bands may be divided into channels that are each associated with a frequency range within a corresponding radio-frequency communications band. The electronic device may identify whether frequency harmonics associated with communications in a first radio-frequency communications band interfere with communications in a second radio-frequency communications band. The electronic device may identify channels in the second radio-frequency communications band that are affected by the frequency harmonics of the communications in the first radio-frequency communications band and configure the wireless communications circuitry to avoid communicating in the identified channels.04-18-2013

Humphrey Liu, Fremont, CA US

Patent application numberDescriptionPublished
20080298248Method and Apparatus For Computer Network Bandwidth Control and Congestion Management - In one embodiment, a network switch includes first logic for receiving a flow, including identifying a reaction point as the source of the data frames included in the flow. The network switch further includes second logic for detecting congestion at the network switch and associating the congestion with the flow and the reaction point, third logic for generating congestion notification information in response to congestion, and fourth logic for receiving control information, including identifying the reaction point as the source of the control information. The network switch further includes fifth logic for addressing the congestion notification information and the control information to the reaction point, wherein the data rate of the flow is based on the congestion notification information and the control information. The content of the data frames included in the flow is independent of the congestion notification information and the control information in a first mode of the network switch.12-04-2008

Jeff Liu, Fremont, CA US

Patent application numberDescriptionPublished
20090150492Initializing Relationships Between Devices In A Network - A relationship initiation between devices in a network is described. According to one embodiment, persona information is exchanged between devices in a network. Based upon the persona information, a user of a device may initiate a relationship with another device.06-11-2009

Jeff J. Liu, Fremont, CA US

Patent application numberDescriptionPublished
20100057884BROWSER-BASED DOWNLOAD MANAGER - A file download manager automatically controls how and where downloaded files are stored. A method for use in downloading a file includes establishing communications between a network site and a computer that is visiting the network site, automatically detecting whether a device capable of receiving files is connected to the computer, automatically determining a location in the device where a file may be stored, and automatically downloading a file from the network site to the computer and sending the downloaded file to the device to be stored at the determined location in the device. A computer readable storage medium stores one or more computer programs adapted to cause a processor based system to execute these steps.03-04-2010

Jessica Sofia Liu, Fremont, CA US

Patent application numberDescriptionPublished
20100061825TWO-WAY NAILS, TWO-WAY SCREWS AND THEIR MOUNTING TOOLS - The present invention provides mounting members useable for fastening two objects together and their mounting tools. In one embodiment, the mounting member includes a first tapered tip and an opposite, second tapered tip defining a shank therebetween, where the shank has an exterior surface and a structure formed on the exterior surface.03-11-2010

Jianquan Liu, Fremont, CA US

Patent application numberDescriptionPublished
20080299593Luminogenic and fluorogenic compounds and methods to detect molecules or conditions - A method to detect the presence or amount of at least one molecule in a sample which employs a derivative of luciferin or a derivative of a fluorophore is provided. Compounds and compositions for carrying out the methods of the invention are also provided.12-04-2008
20100330553Chemically induced optical signals and DNA sequencing - Methods for sequencing nucleic acids are presented. Sequencing is accomplished through the chemical amplification of the products of DNA synthesis and the detection of the chemically amplified products. In embodiments of the invention, a substrate is provided having a plurality of molecules of DNA to be sequenced attached and a plurality of molecules capable of chelating pyrophosphate ions attached, the DNA molecules to be sequenced are primed, and a next complementary nucleotide is incorporated and excised a plurality of times leading to the buildup of pyrophosphate ions locally around the DNA molecule to be sequenced. Pyrophosphate ions are captured by the substrate-attached chelators and optically detected to determine the identity of the next complementary nucleic acid in the DNA molecule to be sequenced.12-30-2010
20110319276NUCLEOTIDES AND OLIGONUCLEOTIDES FOR NUCLEIC ACID SEQUENCING - Embodiments of the invention provide non-natural bifunctional nucleotides having both nuclease resistance and nucleic acid synthesis blocking properties and methods of sequencing nucleic acids that employ non-natural bifunctional nucleic acids. Additional embodiments provide non-natural oligonucleotides and methods for sequencing nucleic acids using the non-natural oligonucleotides. Methods according to embodiments of the invention employ electronic detection and fluorescent detection of nucleic acid sequencing reactions.12-29-2011
20120046176NUCLEIC ACID SEQUENCING - Nucleic acid sequencing using concatemers of DNA is provided. Optionally, amplified reaction products from the repeated incorporation and excision of a nucleoside complementary to a nucleoside of the DNA to be sequenced onto primer molecules hybridized to the concatemers of DNA are detected. Nucleic acid sequencing using concatemers of DNA and non-natural oligonucleotides is also provided. Nucleic acid sequencing reactions are detected electronically and or optically using arrays of detectors.02-23-2012
20140154716LUMINOGENIC AND FLUOROGENIC COMPOUNDS AND METHODS TO DETECT MOLECULES OR CONDITIONS - A method to detect the presence or amount of at least one molecule in a sample which employs a derivative of luciferin or a derivative of a fluorophore is provided. Compounds and compositions for carrying out the methods of the invention are also provided.06-05-2014

Patent applications by Jianquan Liu, Fremont, CA US

Johnny Liu, Fremont, CA US

Patent application numberDescriptionPublished
20090320117REMOTE SIGN-OUT OF WEB BASED SERVICE SESSIONS - Remote sign-out of web based service sessions. As a part of remote sign-out of web based service sessions, a user authentication token is accessed that is used to establish a web based service session and this user authentication token is stored in memory of an authentication server and returned in a cookie to the device. User access and deletion of the user authentication token from memory is accommodated using a device different from that which initially established the web based service session. Upon receipt of a browser request involving the user authentication token, it is determined whether the user authentication token is stored in memory. An access denial indication is provided to a web based service that indicates that the user authentication token is not stored in memory.12-24-2009

Johnny C. Liu, Fremont, CA US

Patent application numberDescriptionPublished
20100161973REQUEST AUTHENTICATION TOKEN - An authentication mechanism for use in network-based services generates an authentication token. The authentication token is provided to a client device as part of the code comprising a content page. The content page code is received and loaded by a browser application at the client device. When the content page code is received and loaded by the browser application, the authentication token is loaded by the browser as well. Upon receiving subsequent input, the browser application may send a content request to the server. The content request includes the authentication token maintained by the browser application in the content page. A server may validate the authentication token provided in the request using version information and one or more master authentication tokens.06-24-2010
20140047522REQUEST AUTHENTICATION TOKEN - An authentication mechanism for use in network-based services generates an authentication token. The authentication token is provided to a client device as part of the code comprising a content page. The content page code is received and loaded by a browser application at the client device. When the content page code is received and loaded by the browser application, the authentication token is loaded by the browser as well. Upon receiving subsequent input, the browser application may send a content request to the server. The content request includes the authentication token maintained by the browser application in the content page. A server may validate the authentication token provided in the request using version information and one or more master authentication tokens.02-13-2014

Kuo-Shih Liu, Fremont, CA US

Patent application numberDescriptionPublished
20090046263USING PHASE DIFFERENCE OF INTERFERENCE LITHOGRAPHY FOR RESOLUTION ENHANCEMENT - Interference lithography (IL) system and methods are disclosed according to embodiments of the invention. Two beams of coherent light with a first phase difference expose a first interference pattern on a nonlinear photoresist. A second interference pattern may be exposed on the nonlinear photoresist using the same coherent light beams with a second phase difference. The difference between the first and second phase differences is between 70° and 270°. The ensuing pattern is a composite of the first and second interference patterns. The IL may employ a third and fourth light beam.02-19-2009
20090111056RESOLUTION ENHANCEMENT TECHNIQUES COMBINING FOUR BEAM INTERFERENCE-ASSISTED LITHOGRAPHY WITH OTHER PHOTOLITHOGRAPHY TECHNIQUES - Methods and systems are disclosed that provide multiple lithography exposures on a wafer, for example, using interference lithography and optical photolithography. Various embodiments may balance the dosage and exposure rates between the multiple lithography exposures to provide the needed exposure on the wafer. Other embodiments provide for assist features and/or may apply resolution enhancement to various exposures. In a specific embodiment, a wafer is first exposed using optical photolithography and then exposed using interference lithography.04-30-2009
20090117491RESOLUTION ENHANCEMENT TECHNIQUES COMBINING INTERFERENCE-ASSISTED LITHOGRAPHY WITH OTHER PHOTOLITHOGRAPHY TECHNIQUES - Methods and systems are disclosed that provide multiple lithography exposures on a wafer, for example, using interference lithography and optical photolithography. Various embodiments may balance the dosage and exposure rates between the multiple lithography exposures to provide the needed exposure on the wafer. Other embodiments provide for assist features and/or may apply resolution enhancement to various exposures. In a specific embodiment, a wafer is first exposed using optical photolithography and then exposed using interference lithography.05-07-2009
20090246706PATTERNING RESOLUTION ENHANCEMENT COMBINING INTERFERENCE LITHOGRAPHY AND SELF-ALIGNED DOUBLE PATTERNING TECHNIQUES - A method for providing regular line patterns using interference lithography and sidewall patterning techniques is provided according to one embodiment. The method comprising may include producing regularly spaced parallel lines on a template using interference lithography techniques and then depositing sidewalls on the longitudinal sides of the regularly spaced parallel lines using sidewall patterning techniques. Various deposition and etching steps may also be included. The embodiments of the invention may provide regular line patterns with a line density half the interference lithography line density. Various lithography techniques may also be used to crop rounded connecting resulting from the sidewall patterning and/or to alter portions of the line pattern.10-01-2009
20100002210INTEGRATED INTERFERENCE-ASSISTED LITHOGRAPHY - A lithography scanner and track system is provided that includes an interference lithography system according to one embodiment. The scanner provides a first optical exposure of a wafer. The track system provides pre and post-processing functions on a wafer. The interference lithography system may be included within the scanner and may expose a wafer either before or after the first optical exposure. The interference lithography system may also be included within the track system as part of the pre or post processing. The first optical exposure may include optical photolithography.01-07-2010

Lin-Shih Liu, Fremont, CA US

Patent application numberDescriptionPublished
20080266997VOLATILE MEMORY ELEMENTS WITH ELEVATED POWER SUPPLY LEVELS FOR PROGRAMMABLE LOGIC DEVICE INTEGRATED CIRCUITS - Integrated circuits are provided that have volatile memory elements. The memory elements produce output signals. The integrated circuits may be programmable logic device integrated circuits containing programmable core logic including transistors with gates. The core logic is powered using a core logic power supply level defined by a core logic positive power supply voltage and a core logic ground voltage. When loaded with configuration data, the memory elements produce output signals that are applied to the gates of the transistors in the core logic to customize the programmable logic device. The memory elements are powered with a memory element power supply level defined by a memory element positive power supply voltage and a memory element ground power supply voltage. The memory element power supply level is elevated with respect to the core logic power supply level.10-30-2008
20110285422VOLATILE MEMORY ELEMENTS WITH ELEVATED POWER SUPPLY LEVELS FOR PROGRAMMABLE LOGIC DEVICE INTEGRATED CIRCUITS - Integrated circuits are provided that have volatile memory elements. The memory elements produce output signals. The integrated circuits may be programmable logic device integrated circuits containing programmable core logic including transistors with gates. The core logic is powered using a core logic power supply level defined by a core logic positive power supply voltage and a core logic ground voltage. When loaded with configuration data, the memory elements produce output signals that are applied to the gates of the transistors in the core logic to customize the programmable logic device. The memory elements are powered with a memory element power supply level defined by a memory element positive power supply voltage and a memory element ground power supply voltage. The memory element power supply level is elevated with respect to the core logic power supply level.11-24-2011
20130043536BUFFERED FINFET DEVICE - One embodiment relates to a buffered transistor device. The device includes a buffered vertical fin-shaped structure formed in a semiconductor substrate. The vertical fin-shaped structure includes at least an upper semiconductor layer, a buffer region, and at least part of a well region. The buffer region has a first doping polarity, and the well region has a second doping polarity which is opposite to the first doping polarity. At least one p-n junction that at least partially covers a horizontal cross section of the vertical fin-shaped structure is formed between the buffer and well regions. Other embodiments, aspects, and features are also disclosed.02-21-2013
20130127494MEMORY ELEMENTS WITH RELAY DEVICES - Integrated circuits with memory elements are provided. An integrated circuit may include logic circuitry formed in a first portion having complementary metal-oxide-semiconductor (CMOS) devices and may include at least a portion of the memory elements and associated memory circuitry formed in a second portion having nano-electromechanical (NEM) relay devices. The NEM and CMOS devices may be interconnected through vias in a dielectric stack. Devices in the first and second portions may receive respective power supply voltages. In one suitable arrangement, the memory elements may include two relay switches that provide nonvolatile storage characteristics and soft error upset (SEU) immunity. In another suitable arrangement, the memory elements may include first and second cross-coupled inverting circuits. The first inverting circuit may include relay switches, whereas the second inverting circuit includes only CMOS transistors. Memory elements configured in this way may be used to provide volatile storage characteristics and SEU immunity.05-23-2013
20140085967MEMORY ELEMENTS WITH RELAY DEVICES - Integrated circuits with memory elements are provided. An integrated circuit may include logic circuitry formed in a first portion having complementary metal-oxide-semiconductor (CMOS) devices and may include at least a portion of the memory elements and associated memory circuitry formed in a second portion having nano-electromechanical (NEM) relay devices. The NEM and CMOS devices may be interconnected through vias in a dielectric stack. Devices in the first and second portions may receive respective power supply voltages. In one suitable arrangement, the memory elements may include two relay switches that provide nonvolatile storage characteristics and soft error upset (SEU) immunity. In another suitable arrangement, the memory elements may include first and second cross-coupled inverting circuits. The first inverting circuit may include relay switches, whereas the second inverting circuit includes only CMOS transistors. Memory elements configured in this way may be used to provide volatile storage characteristics and SEU immunity.03-27-2014

Patent applications by Lin-Shih Liu, Fremont, CA US

Lisong Liu, Fremont, CA US

Patent application numberDescriptionPublished
20100061825TWO-WAY NAILS, TWO-WAY SCREWS AND THEIR MOUNTING TOOLS - The present invention provides mounting members useable for fastening two objects together and their mounting tools. In one embodiment, the mounting member includes a first tapered tip and an opposite, second tapered tip defining a shank therebetween, where the shank has an exterior surface and a structure formed on the exterior surface.03-11-2010
20110038527IMAGE PATTERN MATCHING SYSTEMS AND METHODS FOR WAFER ALIGNMENT - A computer-implemented image pattern matching method for wafer alignment is provided, for determining an overall similarity value and an overall geometry relationship between a target wafer image and a model wafer image. The method includes: determining a plurality of model patterns in the model wafer image; searching the target wafer image to identify a plurality of target patterns, thereby generating a plurality of matches each including a respective target pattern and model pattern; selecting, using multiple threshold values, ones of the plurality of matches according to a plurality of similarity values; and determining, using a predetermined algorithm and the selected ones of the matches, the overall similarity value and the overall geometry relationship between the target wafer image and the model wafer image.02-17-2011
20120087537SYSTEM AND METHODS FOR READING AND MANAGING BUSINESS CARD INFORMATION - A system and method for business card information reading and managing comprises a scanner which is optional and can provide dark background, a preprocessing module, a host computer with data storage, input/output (I/O), and display devices, an information extracting module, optical character recognition (OCR) engine, an image-processing (IP) engine, an information organizing module, all connected to the host computer to work together. On top of the system is the dataflow logic, i.e. the method, which guides all the business card information reading and management in a sequence of steps. The method is supported mainly through the software (SW) running on the host computer, with a GUI to interact with end users and provides functions like scanning/loading images and managing result. Among the steps, there are automatic card boundary and orientation detection step/method, manual card boundary and orientation refining step/method, automatic key information area detection step/method, manual key information area refining step/method by using a set of template key information items as over-layers on the GUI's image display. There is also key information extraction step which uses optical character recognition (OCR) and image processing to extract key information from cards and put the results in a table which can be further edited, merged with another table, and/or saved.04-12-2012

Patent applications by Lisong Liu, Fremont, CA US

Li Wen Liu, Fremont, CA US

Patent application numberDescriptionPublished
20080249880iPOS Transaction Terminal - Apparatus and methods for transaction processing. The apparatus may be a transaction terminal including a keypad, a circuit for interacting with the transaction customer and a link communicatively connecting the keypad and the customer-interaction circuit. The cashier may interact with the keypad, while the customer (and not the cashier) may interact with the customer-interaction circuit. The link may communicate a dollar amount for the transaction between the keypad and the customer-interaction circuit. Accessories for the keypad may include a check reader, a display or a receipt printer. Accessories for the customer-interaction circuit may include a smart-card reader, a magnetic-strip reader and biometric readers. The customer-interaction circuit may include a port for connection to a remote service provider. That port may be the only remote-access port in the transaction terminal. The customer-interaction circuit may include a virtual keypad, and the circuit itself maybe programmed to capture a personal identifier number by means of that virtual keypad. The customer-interaction circuit may include virtual paper, and the circuit itself may be programmed to capture a signature by means of the virtual paper. A cash register at the POS location with the transaction terminal may not be communicatively coupled to the transaction terminal.10-09-2008

Maozi Liu, Fremont, CA US

Patent application numberDescriptionPublished
20080272516Successive Shrinking of Elastomers - a Simple Miniaturization Protocol to Produce Micro- and Nano-Structures - A stepwise contraction and adsorption nanolithography (SCAN) patterning process can shrink complex microstructures (produced by current microfabrication technology) into the nanometer region. The basis of SCAN is to transfer a pre-engineered microstructure onto a extended elastomer. This extended elastomer is then allowed to relax, reducing the microstructure accordingly. The new miniaturized structure is then used as a stamp to transfer the structure onto another stretched elastomer. Through iterations of this procedure, patterns of materials with pre-designed geometry are miniaturized to the desired dimensions, including sub-100 ran. The simplicity and high throughput capability of SCAN make the platform a competitive alternative to other micro- and nanolithography techniques for potential applications in multiplexed sensors, non-binary optical displays, biochips, nanoelectronics devices, and microfluidic devices.11-06-2008
20090212279Nanostructure-Based Electronic Device - The nanostructure-based electronic device comprises a solid support, an organic template layer, a nanostructure and electrodes. The organic template layer is on the surface of the solid support, and has a surface comprising a pair of spaced, electrically-charged regions arranged in tandem in an electrically-neutral background. The nanostructure is elongate, is electrically-conducting, and extends between the charged regions. The electrodes are located the surface of the template layer and are at least co-extensive with the charged regions.08-27-2009
20090219528METHODS AND SYSTEMS FOR COMPUTING A SIZE DISTRIBUTION OF SMALL PARTICLES - Methods, systems and computer readable media for computing small particle size distributions. A reference matrix of pre-computed reference vectors is provided, with each reference vector representing a discrete particle size or particle size range of a particle size distribution of particles contained in a dilute colloid. A measurement vector of measured extinction values of a sample dilute colloid is provided, wherein the measured extinction values have been measured by spectrophotometric measurement at the discrete wavelengths. Size distribution and concentrations of particles in the sample dilute colloid are determined using linear equations, the reference matrix and the reference vector.09-03-2009
20090222218Methods and systems for computing a particle size distribution of small partcles in a process - Methods, systems and computer readable media for computing small particle size distributions of particles in a process stream comprising a sample dilute colloid. A reference matrix of pre-computed reference vectors is provided. Each reference vector represents a discrete particle size or particle size range of a particle size distribution of particles contained in a dilute colloid. Each reference vector represents a reference extinction spectrum over a predetermined wavelength range. A measurement vector representing a measured extinction spectrum of the sample particles in the sample colloid is provided, wherein the measured extinction spectrum has been spectrophotometrically measured over the wavelength range. The particle size distribution and particle concentrations of the particles in the sample colloid are determined using the reference matrix, the measurement vector and linear equations.09-03-2009

Patent applications by Maozi Liu, Fremont, CA US

Matthew Liu, Fremont, CA US

Patent application numberDescriptionPublished
20090144325Blocking of Unlicensed Audio Content in Video Files on a Video Hosting Website - A system, method and various software tools enable a video hosting website to automatically identified unlicensed audio content in video files uploaded by users, and initiate a process by which the user can replace the unlicensed content with licensed audio content. An audio replacement tool is provided that enables the user to permanently mute the original, unlicensed audio content of a video file, or select a licensed audio file from a collection of licensed audio, and insert the selected in place of the original audio. Where a video file includes unlicensed audio, the video hosting website provides access to video files to a client device, along with an indication to the client device to mute the audio during playback of the video.06-04-2009
20090144326Site Directed Management of Audio Components of Uploaded Video Files - A system, method and various software tools enable a video hosting website to automatically identified unlicensed audio content in video files uploaded by users, and initiate a process by which the user can replace the unlicensed content with licensed audio content. An audio replacement tool is provided that enables the user to permanently mute the original, unlicensed audio content of a video file, or select a licensed audio file from a collection of licensed audio, and insert the selected in place of the original audio.06-04-2009
20100010893VIDEO OVERLAY ADVERTISEMENT CREATOR - Methods and systems for creating video overlay advertisements suitable for use with digital videos. In one embodiment, values specifying attributes of a desired video overlay advertisement are entered via a browser-based user interface functioning on a client device and communicated to a server. The server receives the values and in response provides to the client device a video overlay advertisement having the desired attributes, which the client displays within the browser-based user interface.01-14-2010
20100023397Video Promotion In A Video Sharing Site - A promoter wishing to promote video content on a video hosting website selects the video and associates it with an advertising creative. The promoter selects associated keywords and indicates financial terms for the promotion, for example by agreeing to a cost-per-click or cost-per-impression payment arrangement with the video hosting site. When a user of the video hosting site performs a search on the keywords (or similar words) associated with the promoted video, the video hosting website includes the creative for the promoted video with the other search results returned. The user can then select to view any of the search results or the promoted video identified by the creative. When the user clicks on the indicia for the promoted video, the video hosting site serves to the user a watch page on which the user views the promoted video. The promoter is charged according to the payment mechanism selected.01-28-2010
20100169655BLOCKING OF UNLICENSED AUDIO CONTENT IN VIDEO FILES ON A VIDEO HOSTING WEBSITE - A system, method and various software tools enable a video hosting website to automatically identified unlicensed audio content in video files uploaded by users, and initiate a process by which the user can replace the unlicensed content with licensed audio content. An audio replacement tool is provided that enables the user to permanently mute the original, unlicensed audio content of a video file, or select a licensed audio file from a collection of licensed audio, and insert the selected in place of the original audio. Where a video file includes unlicensed audio, the video hosting website provides access to video files to a client device, along with an indication to the client device to mute the audio during playback of the video.07-01-2010
20110289598Blocking of Unlicensed Audio Content in Video Files on a Video Hosting Website - A system, method and various software tools enable a video hosting website to automatically identified unlicensed audio content in video files uploaded by users, and initiate a process by which the user can replace the unlicensed content with licensed audio content. An audio replacement tool is provided that enables the user to permanently mute the original, unlicensed audio content of a video file, or select a licensed audio file from a collection of licensed audio, and insert the selected in place of the original audio. Where a video file includes unlicensed audio, the video hosting website provides access to video files to a client device, along with an indication to the client device to mute the audio during playback of the video.11-24-2011
20140020116BLOCKING OF UNLICENSED AUDIO CONTENT IN VIDEO FILES ON A VIDEO HOSTING WEBSITE - A system, method and various software tools enable a video hosting website to automatically identified unlicensed audio content in video files uploaded by users, and initiate a process by which the user can replace the unlicensed content with licensed audio content. An audio replacement tool is provided that enables the user to permanently mute the original, unlicensed audio content of a video file, or select a licensed audio file from a collection of licensed audio, and insert the selected in place of the original audio. Where a video file includes unlicensed audio, the video hosting website provides access to video files to a client device, along with an indication to the client device to mute the audio during playback of the video.01-16-2014

Patent applications by Matthew Liu, Fremont, CA US

Matthew Cheng-Yu Liu, Fremont, CA US

Patent application numberDescriptionPublished
20100242060Online Ad Placement Based On User Metrics For Hosted Media - The present invention provides methods for determining which ads to present to a user. An embodiment of the method comprises identifying one or more ads, at least one of the identified ads associated with a video. For each identified ad, a first score is calculated. The first score for the identified ad associated with the video is calculated based on one or more metrics representing user interactions associated with viewing the video. In one embodiment, the score for the ad associated with the video will be better (e.g., higher) the more viewers of the video hosting service interact with the associated video, since such interactions thereby indicate a higher over level of viewer interest in the video. One or more of the identified ads are selected to be presented to the user based at least in part on the first score of each of the identified ads. The one or more selected ads are transmitted to a device for presenting to the user.09-23-2010

Mengchi Liu, Fremont, CA US

Patent application numberDescriptionPublished
20090154542High-speed serial data signal receiver circuitry - Circuitry for receiving a high-speed serial data signal (e.g., having a bit rate in the range of about 10 Gpbs and higher) includes a two-stage, continuous-time, linear equalizer having only two serially connected stages. Phase detector circuitry may be provided for receiving the serial output of the equalizer and for converting successive pairs of bits in that output to successive parallel-form bit pairs. Further demultiplexing circuitry may be provided to demultiplex successive groups of the parallel-form bit pairs to final groups of parallel bits, which can be quite large in terms of number of bits (e.g., 64 parallel bits). Another aspect of the invention relates to multiplexer circuitry for efficiently going in the opposite direction from such relatively large groups of parallel data bits to a high-speed serial data output signal.06-18-2009

Philip Liu, Fremont, CA US

Patent application numberDescriptionPublished
20100051087FRAMELESS THIN-FILM SOLAR PHOTOVOLTAIC PANELS AND METHOD - A solar panel utilizes at least one and, in one embodiment, three protective layers to eliminate the need for a metal frame. The protective layers may include one inorganic layer and two polymer layers, which are cured onto an underside of the panel. In one embodiment, the protective layers are cured over lateral edges of certain of the layers of the solar panel, including for example the conductor layers, semiconductor junction, and reflector layer. The protective layers may extend to cover an exposed edge along an underside of panel's superstrate. In one embodiment, the lateral edge of the superstrate is contoured to resist damage from rough handling and/or exposure to the elements. A support platform may be provided, and the solar panel secured thereon by way of interposing an adhesive between an underside of the panel and the support platform.03-04-2010
20100097082APPARATUS AND METHOD FOR DETERMINING IN REAL TIME THE SUCCESS OF CONDUCTIVE COATING REMOVAL - An apparatus and method is provided for determining, using real-time data, whether a removal process has been effective in removing a conductive coating from a removal site on a substrate of an electric device. The method includes determination of conductivity between the removal site and the intact conductive coating which relates to the absence or presence of the conductive coating in the removal site. The presence of conductive coating in the removal site indicates incomplete removal and thus enables real time correction thereof.04-22-2010

Philip Chihchau Liu, Fremont, CA US

Patent application numberDescriptionPublished
20090139567CONFORMAL PROTECTIVE COATING FOR SOLAR PANEL - A multilayer conformal coating is optimized in both composition and geometry to protect the back and sides of a transparent-fronted thin-film solar photovoltaic panel or similar device from various damage mechanisms associated with long-term outdoor exposure without an additional backcap or edge frame. A “barrier stack” or “barrier layer” of inorganic moisture-barrier and chemical-barrier layers is applied to the back of the photovoltaic functional film stack, extending into a bare-substrate border zone around the functional stack edges. The barrier stack shields the functional stack from moisture and chemical invasion, and the coated border zone effectively seals the vulnerable edges of the functional stack. An “envelope stack” or “envelope layer” of thicker polymer films is applied over the mechanically delicate inorganic barrier stack and around the solar photovoltaic panel edges. The envelope stack electrically insulates the solar photovoltaic panel and substantially protects the panel back and sides from mechanical shock, stress, and abrasion, thermal stress, fire, weathering, and UV-exposure degradation.06-04-2009
20090301561Coating composition, substrates coated therewith and methods of making and using same - Multilayer radiation curable liquid coating compositions are provided that include one or more UV oligomers including at least one aliphatic urethane acrylic oligomer; at least one acrylate diluent monomer selected from a mono-, bi-, and tri-functional reactive acrylate diluent monomers; at least one photo-initiator; at least one UV absorber; at least one hindered amine light stabilizer; and at least one antioxidant, where the liquid composition does not comprise a solvent and does not comprise an adhesion promoter. The UV oligomer in the base coat composition has elongation higher than 200% and tensile strength lower than 1000 psi. The UV oligomer in the top coat composition has tensile strength higher than 5000 psi. A coating system is provided that includes a liquid primer coat composition, a liquid base coat composition and a liquid top coat composition. The cured film has good electrical insulation and UV resistance, and passes thermal cycle, damp heat and humidity freezing tests that are part of UL certification processes. The coating compositions are useful for coating substrates including SiOx substrates.12-10-2009

Ping-Chen Liu, Fremont, CA US

Patent application numberDescriptionPublished
20080265855Power regulator circuitry for programmable logic device memory elements - Power regulator circuitry for programmable memory elements on programmable logic device integrated circuits is provided. The programmable memory elements may each include a storage element formed from cross-coupled inverters and an address transistor. Address drivers may be used to supply address signals to the address transistors. The power regulator circuitry may include an address power supply circuit that produces a time-varying address power supply voltage to the address drivers and storage element power supply circuits that provide time-varying storage element power supply voltages to the cross-coupled inverters in the storage elements. Unity gain buffers may be used to distribute a reference voltage from a bandgap voltage reference to the power supply circuits. The power supply circuits may use voltage dividers and p-channel metal-oxide-semiconductor control transistors.10-30-2008
20100201332VOLTAGE REGULATOR CIRCUITRY WITH ADAPTIVE COMPENSATION - Voltage regulator circuitry is provided. The voltage regulator circuitry may contain a drive transistor that is controlled by the output of an operational amplifier. The drive transistor may supply a regulated voltage to a load. The operational amplifier may compare a reference voltage and a feedback signal at its inputs. The operational amplifier may include first and second stages. An adjustable resistor may be provided between the first and second stages. Control circuitry may control the resistance of the adjustable resistor based on the amount of current flowing through the load to ensure stable operation of the voltage regulator circuitry. Overshoot and undershoot detection and compensation circuitry may compensate for overshoot and undershoot in the regulated voltage. Voltage ramp control circuitry may be used to control the ramp rate of the regulated voltage.08-12-2010
20110062988POWER REGULATOR CIRCUITRY FOR PROGRAMMABLE LOGIC DEVICE MEMORY ELEMENTS - Power regulator circuitry for programmable memory elements on programmable logic device integrated circuits is provided. The programmable memory elements may each include a storage element formed from cross-coupled inverters and an address transistor. Address drivers may be used to supply address signals to the address transistors. The power regulator circuitry may include an address power supply circuit that produces a time-varying address power supply voltage to the address drivers and storage element power supply circuits that provide time-varying storage element power supply voltages to the cross-coupled inverters in the storage elements. Unity gain buffers may be used to distribute a reference voltage from a bandgap voltage reference to the power supply circuits. The power supply circuits may use voltage dividers and p-channel metal-oxide-semiconductor control transistors.03-17-2011
20130043902APPARATUS FOR IMPROVING PERFORMANCE OF FIELD PROGRAMMABLE GATE ARRAYS AND ASSOCIATED METHODS - A field programmable gate array (FPGA) includes a set of monitor circuits adapted to provide indications of process, voltage, and temperature for at least one circuit in the FPGA, and a controller adapted to derive a range of body-bias values for the at least one circuit from the indications of process, voltage, and temperature for the at least one circuit. The FPGA further includes a body-bias generator adapted to provide a body-bias signal to at least one transistor in the at least one circuit. The body-bias signal has a value within the range of body-bias values.02-21-2013

Patent applications by Ping-Chen Liu, Fremont, CA US

Shengfeng Liu, Fremont, CA US

Patent application numberDescriptionPublished
20090283721NITRIDE-BASED RED PHOSPHORS - Embodiments of the present invention are directed to the fluorescence of a nitride-based deep red phosphor having at least one of the following novel features: 1) an oxygen content less than about 2 percent by weight, and 2) a halogen content. Such phosphors are particularly useful in the white light illumination industry, which utilizes the so-called “white LED.” The selection and use of a rare earth halide as a raw material source of not only the activator for the phosphor, but also the halogen, is a key feature of the present embodiments. The present phosphors have the general formula M11-19-2009
20100308712NITRIDE-BASED RED-EMITTING PHOSPHORS IN RGB RED-GREEN-BLUE LIGHTING SYSTEMS - Embodiments of the present invention are directed to nitride-based, red-emitting phosphors in red, green, and blue (RGB) lighting systems, which in turn may be used in backlighting displays and warm white-light applications. In particular embodiments, the red-emitting phosphor is based on CaAlSiN12-09-2010
20130127332Coatings for Photoluminescent Materials - The teachings are generally directed to phosphors having combination coatings with multifunctional characteristics that increase the performance and/or reliability of the phosphor. The teachings include highly reliable phosphors having coatings that contain more than one inorganic component, more than one layer, more than one thicknesses, more than one combination of layers or thicknesses, a gradient-interface between components, a primer thickness or layer to inhibit or prevent leaching of phosphor components into the coatings, a sealant layer to inhibit or prevent entry of moisture or oxygen from the environment, a mixed composition layer as a sealant and multifunctional combination coatings.05-23-2013
20140084783RED-EMITTING NITRIDE-BASED CALCIUM-STABLIZED PHOSPHORS - Red-emitting phosphors may comprise a nitride-based composition represented by the chemical formula M03-27-2014

Patent applications by Shengfeng Liu, Fremont, CA US

Shenjian Liu, Fremont, CA US

Patent application numberDescriptionPublished
20080296736METHOD FOR REDUCING MICROLOADING IN ETCHING HIGH ASPECT RATIO STRUCTURES - A method for etching features of different aspect ratios in a conductive layer is provided. The method comprises: depositing over the conductive layer with an aspect ratio dependent deposition; etching features into the conductive layer with an aspect ratio dependent etching of the conductive layer; and repeating the depositing and the etching at least once.12-04-2008
20090130855Phase change alloy etch - A method of forming devices is provided. A phase change layer is provided. The phase change layer is etched by providing an etch gas comprising a bromine containing compound and forming a plasma from the etch gas. The phase change layer is of a material that may be heated by a current and then when cooled, either forms an amorphous material or a crystalline material, depending on how fast the material is cooled. In addition, the amorphous material has a resistance at least several times greater than the crystalline material.05-21-2009
20090258502SELECTIVE ETCH OF HIGH-K DIELECTRIC MATERIAL - A method for selectively etching a high-k dielectric layer with respect to a polysilicon material is provided. The high-k dielectric layer is partially removed by Ar sputtering, and then the high-k dielectric layer is etched using an etching gas comprising BCl10-15-2009
20110021029PLASMA ETCH METHOD TO REDUCE MICRO-LOADING - A method of producing plurality of etched features in an electronic device is disclosed that avoids micro-loading problems thus maintaining more uniform sidewall profiles and more uniform critical dimensions. The method comprises performing a first time-divisional plasma etch process step within a plasma chamber to a first depth of the plurality of etched features, and performing a flash process step to remove any polymers from exposed surfaces of the plurality of etched features without requiring an oxidation step. The flash process step is performed independently of the time-divisional plasma etch step. A second time-divisional plasma etch process step is performed within the plasma chamber to a second depth of the plurality of etched features. The method may be repeated until a desired etch depth is reached.01-27-2011
20110146909METHODS FOR WET CLEANING QUARTZ SURFACES OF COMPONENTS FOR PLASMA PROCESSING CHAMBERS - Methods for wet cleaning quartz surfaces of components for plasma processing chambers in which semiconductor substrates are processed, such as etch chambers and resist stripping chambers, include contacting the quartz surface with at least one organic solvent, a basic solution and different acid solutions, so as to remove organic and metallic contaminants from the quartz surface. The quartz surface is preferably contacted with one of the acid solutions at least two times.06-23-2011
20110183522METHOD AND APPARATUS FOR PATTERN COLLAPSE FREE WET PROCESSING OF SEMICONDUCTOR DEVICES - A method is provided for processing a wafer used in fabricating semiconductor devices. The method can comprise forming high-aspect ratio features on the wafer, which is followed by wet processing and drying. During drying, pattern collapse can occur. This pattern collapse can be repaired to allow for additional processing of the wafer. In some instance, pattern collapse can be repaired via etching where the etching breaks bonds that can have formed during pattern collapse.07-28-2011
20120144640EXTENDING LIFETIME OF YTTRIUM OXIDE AS A PLASMA CHAMBER MATERIAL - A method of installing a component of a plasma processing chamber by replacing a used component with a component made by forming a dual-layer green body and co-sintering the dual-layer green body so as to form a three-layer component. The three layer component comprises an outer layer of yttria, an intermediate layer of YAG, and a second outer layer of alumina. The component is installed such that the outer layer of yttria is exposed to the plasma environment when the chamber is in operation.06-14-2012

Patent applications by Shenjian Liu, Fremont, CA US

Timothy Liu, Fremont, CA US

Patent application numberDescriptionPublished
20080241838METHODS AND SYSTEMS FOR DETECTING NUCLEIC ACIDS - Methods and kits for detecting a target nucleic acid in a sample are described. In some embodiments, the sample to be analyzed includes a primer which hybridizes to at least a portion of the target nucleic acid, a probe having a first region which hybridizes to at least a portion of the target nucleic acid and a second region having a detectable label, a polymerase which extends the hybridized primer and an enzyme comprising nuclease activity that can cleave the hybridized hybridization probe to thereby release a labeled probe fragment. In some embodiments, the sample can then be contacted with a solid support comprising surface bound capture probes which can hybridize to the labeled probe fragment(s). These capture probes more readily bind to the probe fragment(s) than to the intact hybridization probe. The label can then be detected on the support surface. In this manner, improved discrimination between the probe fragments and the intact hybridization probes can be achieved.10-02-2008
20110014617Methods and Systems for Detecting Nucleic Acids - Methods and kits for detecting a target nucleic acid in a sample are described. In some embodiments, the sample to be analyzed includes a primer which hybridizes to at least a portion of the target nucleic acid, a probe having a first region which hybridizes to at least a portion of the target nucleic acid and a second region having a detectable label, a polymerase which extends the hybridized primer and an enzyme comprising nuclease activity that can cleave the hybridized hybridization probe to thereby release a labeled probe fragment. In some embodiments, the sample can then be contacted with a solid support comprising surface bound capture probes which can hybridize to the labeled probe fragment(s). These capture probes more readily bind to the probe fragment(s) than to the intact hybridization probe. The label can then be detected on the support surface. In this manner, improved discrimination between the probe fragments and the intact hybridization probes can be achieved.01-20-2011
20130164748Detection of nucleic acid amplification - Methods for detecting a target polynucleotide sequences are provided that utilize a probe having a target-complementary segment and a detectable tag. By cleaving the detectable tab and associating the tag with a tag complement coupled to an electrode, an electrochemical signal can be detected that is related to the presence of the tag:tag complement complex.06-27-2013

Patent applications by Timothy Liu, Fremont, CA US

Timothy Z. Liu, Fremont, CA US

Patent application numberDescriptionPublished
20080268440BIOMOLECULE IMMOBILIZATION ON SURFACE VIA HYDROPHOBIC INTERACTIONS - A method, apparatus, or system for generating a pattern of polynucleotides on a substrate. The method includes providing a substrate having a hydrophobic surface. The method further includes conjugating a polystyrene moiety to a polynucleotide and applying a polystyrene-polynucleotide conjugate to create a plurality of reaction spots on the hydrophobic surface of the substrate. An apparatus includes a substrate with at least one polystyrene-polynucleotide conjugate on a surface of the substrate. A system can analyze a polystyrene-polynucleotide conjugate and the system may perform PCR.10-30-2008
20090186779DIAMOND-BASED ARRAY ELECTRODE - An array comprising a probe covalently attached to a diamond substrate is fabricated, for example, by treating the diamond substrate with an aryl diazonium compound and covalently attaching the probe to the aryl group. Some embodiments are useful in DNA-based sensing applications.07-23-2009
20090280497Multiplex Detection Compositions, Methods, and Kits - The present invention generally relates to the detection of analytes, particularly biomolecules in samples. The invention also relates to compositions, methods, and kits for detecting the presence of analytes, typically in multiplex detection formats. The invention also relates to methods for determining the presence of at least one analyte in a sample, the methods employing employ single molecule detection techniques to individually detect at least one molecular complex or at least part of a molecular complex.11-12-2009
20090294286Ionic Liquid Apparatus and Method for Biological Samples - Apparatus and method for handling biological samples. Segments of ionic liquid can provide voltage across segments of immiscible liquid to concentrate or separate charged species in the biological samples. Reactants in biological samples can be contacted and reacted in segments of immiscible liquid.12-03-2009
20100105886COMPOSITIONS, METHODS, AND KITS FOR FABRICATING CODED MOLECULAR TAGS - The present teachings generally relate to probes and probes sets for detecting analytes. The teachings also relates to compositions, methods, and kits for assembling probes comprising at least one coded molecular tag.04-29-2010
20100112572COMPOSITIONS, METHODS, AND KITS FOR FABRICATING CODED MOLECULAR TAGS - The teachings herein generally relates to probes comprising fabricated coded molecular tags for detecting analytes. The teachings also relate to compositions, methods, and kits for fabricating coded molecular tags comprising a multiplicity or reporter groups in an ordered pattern.05-06-2010
20100300879DUAL ELECTRODE INJECTION OF ANALYTE INTO A CAPILLARY ELECTROPHORETIC DEVICE - An injection system including a first electrical circuit for concentration of an analyte and a second electrical circuit for injection of the concentrated analyte into an electrophoretic device is described, as well as methods of using the injection system.12-02-2010
20110201097Ionic Liquid Apparatus and Method for Biological Samples - Apparatus and method for handling biological samples. Segments of ionic liquid can provide voltage across segments of immiscible liquid to concentrate or separate charged species in the biological samples. Reactants in biological samples can be contacted and reacted in segments of immiscible liquid.08-18-2011
20110223596Multiplex Detection Compositions, Methods, and Kits - The present invention generally relates to the detection of analytes, particularly biomolecules in samples. The invention also relates to compositions, methods, and kits for detecting the presence of analytes, typically in multiplex detection formats. The invention also relates to methods for determining the presence of at least one analyte in a sample, the methods employing employ single molecule detection techniques to individually detect at least one molecular complex or at least part of a molecular complex.09-15-2011
20120088684MULTIPLEX NUCLEIC ACID DETECTION METHODS AND SYSTEMS - The present invention relates to methods and systems for single molecule based clonal amplification and subsequent detection of nucleic acid molecules, and particularly to the determination of SNPs, mutations, and to the diagnosis of diseases associated with the changes of these nucleic acid molecules.04-12-2012
20120283109METHOD OF ANALYZING TARGET NUCLEIC ACID OF BIOLOGICAL SAMPLES - This invention provides a method of analyzing target nucleic acids of biological samples for multiplex nucleic acid analysis of disease associated genetic changes of biological samples in biomedical research and clinical diagnostics.11-08-2012
20140045716Methods and Systems for Detecting Nucleic Acids - Methods and kits for detecting a target nucleic acid in a sample are described. In some embodiments, the sample to be analyzed includes a primer which hybridizes to at least a portion of the target nucleic acid, a probe having a first region which hybridizes to at least a portion of the target nucleic acid and a second region having a detectable label, a polymerase which extends the hybridized primer and an enzyme comprising nuclease activity that can cleave the hybridized hybridization probe to thereby release a labeled probe fragment. In some embodiments, the sample can then be contacted with a solid support comprising surface bound capture probes which can hybridize to the labeled probe fragment(s). These capture probes more readily bind to the probe fragment(s) than to the intact hybridization probe. The label can then be detected on the support surface. In this manner, improved discrimination between the probe fragments and the intact hybridization probes can be achieved.02-13-2014
20140093876MULTIPLEX NUCLEIC ACID DETECTION METHODS AND SYSTEMS - The present invention relates to methods and systems for single molecule based nucleic acid amplification and subsequent detection of nucleic acid molecules, and particularly to the determination of SNPs, mutations, and to the diagnosis of diseases associated with the changes of these nucleic acid molecules.04-03-2014
20140377750Methods and Systems for Detecting Nucleic Acids - Methods and kits for detecting a target nucleic acid in a sample are described. In some embodiments, the sample to be analyzed includes a primer which hybridizes to at least a portion of the target nucleic acid, a probe having a first region which hybridizes to at least a portion of the target nucleic acid and a second region having a detectable label, a polymerase which extends the hybridized primer and an enzyme comprising nuclease activity that can cleave the hybridized hybridization probe to thereby release a labeled probe fragment. In some embodiments, the sample can then be contacted with a solid support comprising surface bound capture probes which can hybridize to the labeled probe fragment(s). These capture probes more readily bind to the probe fragment(s) than to the intact hybridization probe. The label can then be detected on the support surface. In this manner, improved discrimination between the probe fragments and the intact hybridization probes can be achieved.12-25-2014
20150038368Biomolecule Immobilization On A Surface via Hydrophobic Interactions - A method, apparatus, or system for generating a pattern of polynucleotides on a substrate. The method includes providing a substrate having a hydrophobic surface. The method further includes conjugating a polystyrene moiety to a polynucleotide and applying a polystyrene-polynucleotide conjugate to create a plurality of reaction spots on the hydrophobic surface of the substrate. An apparatus includes a substrate with at least one polystyrene-polynucleotide conjugate on a surface of the substrate. A system can analyze a polystyrene-polynucleotide conjugate and the system may perform PCR.02-05-2015

Patent applications by Timothy Z. Liu, Fremont, CA US

Tsu-Jae King Liu, Fremont, CA US

Patent application numberDescriptionPublished
20080280217Patterning A Single Integrated Circuit Layer Using Multiple Masks And Multiple Masking Layers - A multiple mask and a multiple masking layer technique can be used to pattern a single IC layer. A resolution enhancement technique can be used to define one or more fine-line patterns in a first masking layer, wherein each fine-line feature is sub-wavelength. Moreover, the pitch of each fine-line pattern is less than or equal to that wavelength. The portions of the fine-line features not needed to implement the circuit design are then removed or designated for removal using a mask. After patterning of the first masking layer, another mask can then be used to define coarse features in a second masking layer formed over the patterned first masking layer. At least one coarse feature is defined to connect two fine-line features, wherein the coarse feature(s) can be derived from a desired layout using a shrink/grow operation. The IC layer can be patterned using the composite mask formed by the patterned first and second masking layers.11-13-2008
20080296632Stress-Enhanced Performance Of A FinFet Using Surface/Channel Orientations And Strained Capping Layers - Different approaches for FinFET performance enhancement based on surface/channel direction and type of strained capping layer are provided. In one relatively simple and inexpensive approach providing a performance boost, a single surface/channel direction orientation and a single strained capping layer can be used for both n-channel FinFETs (nFinFETs) and p-channel FinFETs (pFinFETs). In another approach including more process steps (thereby increasing manufacturing cost) but providing a significantly higher performance boost, different surface/channel direction orientations and different strained capping layers can be used for nFinFETs and pFinFETs.12-04-2008
20090010056Method and apparatus for capacitorless double-gate storage - A method and/or system and/or apparatus for a dual gate, capacitor less circuit that can act as a state storage device. Further embodiments describe fabrication methods and methods of operation of such a device.01-08-2009
20090039438Negative Differential Resistance Pull Up Element For DRAM - A memory cell includes a pull-up element that exhibits a refresh behavior that is dependent on the data value stored in the memory cell. The pull-up element is an NDR FET connected between a high voltage source and a storage node of the memory cell. The NDR FET receives a pulsed gate bias signal, wherein each pulse turns on the NDR FET when a logic HIGH value is stored at the storage node, and further wherein each pulse does not turn on the NDR FET when a logic LOW value is stored at the storage node. In this fashion a DRAM cell (and device) can be operated without a separate refresh cycle.02-12-2009
20090114953Method For Achieving Uniform Etch Depth Using Ion Implantation And A Timed Etch - A method of performing a timed etch of a material to a precise depth is provided. In this method, ion implantation of the material is performed before the timed etch. This ion implantation process substantially enhances the etch rate of the material within a precisely controlled depth range corresponding to the range of implantation-induced damage. By using the ion implantation, the variation in vertical etch depth can be reduced by a factor approximately equal to the etch rate of the damaged material divided by the etch rate of the undamaged material. The vertical etch depth can be used to provide a vertical dimension of a non-planar semiconductor device. Minimizing vertical device dimension variations on a wafer can reduce device and circuit performance variations, which is highly desirable.05-07-2009
20100184276LOW-TEMPERATURE FORMATION OF POLYCRYSTALLINE SEMICONDUCTOR FILMS VIA ENHANCED METAL-INDUCED CRYSTALLIZATION - A method for forming polycrystalline semiconductor film from amorphous semiconductor film at reduced temperatures and/or accelerated rates. The inclusion of a small percentage of semiconductor material, such as 2% within the metal layer, reduces the temperatures required for crystallization of the amorphous semiconductor by at least 50° C. in comparison to the use of the metal layer without the small percentage of semiconductor material. During a low temperature isothermal annealing process adjacent Al-2% Si and a-Si films undergo a layer exchange resulting in formation of a continuous polycrystalline silicon film having good physical and electrical properties. Formation of polycrystalline-semiconductor in this manner is suitable for use with low temperature substrates (e.g., glass, plastic) as well as with numerous integrated circuit and MEMs fabrication devices and practices.07-22-2010
20100291476Patterning A Single Integrated Circuit Layer Using Automatically-Generated Masks And Multiple Masking Layers - A multiple mask and a multiple masking layer technique can be used to pattern an IC layer. A RET can be used to define one or more fine-line patterns in a first masking layer. Portions of the fine-line features are then removed or designated for removal using a mask. This removal/designation can include accessing a desired layout (with at least one layout feature including a fine-line feature and a coarse feature) and expanding layout features only in directions along critical dimensions of those layout features. Another mask can then be used to define coarse features in a second masking layer formed over the patterned first masking layer. Coarse feature(s) can be derived from the desired layout using a shrink/grow operation performed only in directions orthogonal to a critical dimension of the fine-line features. The IC layer can be patterned using the composite mask formed by the patterned first and second masking layers.11-18-2010
20110212601Stress-Enhanced Performance Of A Finfet Using Surface/Channel Orientations And Strained Capping Layers - Different approaches for FinFET performance enhancement based on surface/channel direction and type of strained capping layer are provided. In one relatively simple and inexpensive approach providing a performance boost, a single surface/channel direction orientation and a single strained capping layer can be used for both n-channel FinFETs (nFinFETs) and p-channel FinFETs (pFinFETs). In another approach including more process steps (thereby increasing manufacturing cost) but providing a significantly higher performance boost, different surface/channel direction orientations and different strained capping layers can be used for nFinFETs and pFinFETs.09-01-2011
20120161229DRAM CELL UTILIZING A DOUBLY GATED VERTICAL CHANNEL - A double-gate vertical channel transistor (DGVC) structure is described which is particularly well suited for Dynamic RAM (DRAM) memory (e.g., capacitorless DRAM) wherein the memory cell occupies a small cell area of 4F06-28-2012
20130171548Patterning A Single Integrated Circuit Layer Using Automatically-Generated Masks And Multiple Masking Layers - A multiple mask and a multiple masking layer technique can be used to pattern an IC layer. A RET can be used to define one or more fine-line patterns in a first masking layer. Portions of the fine-line features are then removed or designated for removal using a mask. This removal/designation can include accessing a desired layout (with at least one layout feature including a fine-line feature and a coarse feature) and expanding layout features only in directions along critical dimensions of those layout features. Another mask can then be used to define coarse features in a second masking layer formed over the patterned first masking layer. Coarse feature(s) can be derived from the desired layout using a shrink/grow operation performed only in directions orthogonal to a critical dimension of the fine-line features. The IC layer can be patterned using the composite mask formed by the patterned first and second masking layers.07-04-2013
20140284727Integrated Circuit On Corrugated Substrate - By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-power transistors can be reliably and repeatably produced. Forming a corrugated substrate prior to actual device formation allows the ridges on the corrugated substrate to be created using high precision techniques that are not ordinarily suitable for device production. MOSFETs that subsequently incorporate the high-precision ridges into their channel regions will typically exhibit much more precise and less variable performance than similar MOSFETs formed using optical lithography-based techniques that cannot provide the same degree of patterning accuracy. Additional performance enhancement techniques such as pulse-shaped doping and “wrapped” gates can be used in conjunction with the segmented channel regions to further enhance device performance.09-25-2014
20150016185Electro-Mechanical Diode Non-Volatile Memory Cell For Cross-Point Memory Arrays - A non-volatile electro-mechanical diode memory cell is described for implementation of compact (4F01-15-2015

Patent applications by Tsu-Jae King Liu, Fremont, CA US

Xiaomin Liu, Fremont, CA US

Patent application numberDescriptionPublished
20080197021Method to make superior soft (low Hk), high moment magnetic film and its application in writer heads - A process sequence for forming a soft magnetic layer having Hce and Hch of ≦2 Oe, Hk≦5 Oe, and Bs of ≧24 kG is disclosed. A CoFe or CoFe alloy is electroplated in a 1008-21-2008
20100119874Laminated high moment film for head applications - A laminated high moment film with a non-AFC configuration is disclosed that can serve as a seed layer for a main pole layer or as the main pole layer itself in a PMR writer. The laminated film includes a plurality of (B/M) stacks where B is an alignment layer and M is a high moment layer. Adjacent (B/M) stacks are separated by an amorphous layer that breaks the magnetic coupling between adjacent high moment layers and reduces remanence in a hard axis direction while maintaining a high magnetic moment and achieving low values for Hch, Hce, and Hk. The amorphous material layer may be made of an oxide, nitride, or oxynitride of one or more of Hf, Zr, Ta, Al, Mg, Zn, Ti, Cr, Nb, or Si, or may be Hf, Zr, Ta, Nb, CoFeB, CoB, FeB, or CoZrNb. Alignment layers are FCC soft ferromagnetic materials or non-magnetic FCC materials.05-13-2010
20120145551Electroplated Magnetic Film for Read-Write Applications - A process is described for the fabrication, through electrodeposition, of Fe06-14-2012

Patent applications by Xiaomin Liu, Fremont, CA US

Xiumei Liu, Fremont, CA US

Patent application numberDescriptionPublished
20090323076HIGH RESOLUTION OPTICAL COHERENCE TOMOGRAPHY BASED IMAGING FOR INTRALUMINAL AND INTERSTITIAL USE IMPLEMENTED WITH A REDUCED FORM FACTOR - Mechanically robust minimal form factor OCT probes suitable for medical applications such as needle biopsy, intraluminal and intravascular imaging are achieved in part by employing compound lenses with some or all of the optical elements, including an optical fiber, to be thermally fused in tandem. To achieve a desired working distance without increasing a diameter of the optics assembly, a spacer can be disposed between the optical fiber and focusing optics. The compound lens configuration can achieve higher transverse resolution compared to a single lens at a desired working distance without increasing the probe diameter. In exemplary needle biopsy embodiments, the optical assembly is encapsulated in a glass housing or metal-like housing with a glass window, which is then selectively passed through a hollow needle. Esophageal imaging embodiments are combined with a balloon catheter. Circumferential and three-dimensional spiral scanning can be achieved in each embodiment.12-31-2009

Yiu Liu, Fremont, CA US

Patent application numberDescriptionPublished
20090091861Perpendicular magnetic recording write head with a side shield - A side shield structure for a PMR write head is disclosed that narrows write width and minimizes adjacent track and far track erasure. The side shield structure on each side of the write pole has two sections. One section along the ABS and adjacent to the pole tip has a height (SSH04-09-2009

Yuan Ching Liu, Fremont, CA US

Patent application numberDescriptionPublished
20100111958Notch-Binding Agents and Antagonists and Methods of Use Thereof - The present invention relates to Notch-binding agents and Notch antagonists and methods of using the agents and/or antagonists for treating diseases such as cancer. The present invention provides antibodies that specifically bind to a non-ligand binding region of the extracellular domain of one or more human Notch receptor, such as Notch2 and/or Notch3, and inhibit tumor growth. The present invention further provides methods of treating cancer, the methods comprising administering a therapeutically effective amount of an antibody that specifically binds to a non-ligand binding region of the extracellular domain of a human Notch receptor protein and inhibits tumor growth.05-06-2010
20120288496Notch-Binding Agents and Antagonists and Methods of Use Thereof - The present invention relates to Notch-binding agents and Notch antagonists and methods of using the agents and/or antagonists for treating diseases such as cancer. The present invention provides antibodies that specifically bind to a non-ligand binding region of the extracellular domain of one or more human Notch receptor, such as Notch2 and/or Notch3, and inhibit tumor growth. The present invention further provides methods of treating cancer, the methods comprising administering a therapeutically effective amount of an antibody that specifically binds to a non-ligand binding region of the extracellular domain of a human Notch receptor protein and inhibits tumor growth.11-15-2012
20130260455NOTCH BINDING AGENTS AND ANTAGONISTS AND METHODS OF USE THEREOF - The present invention relates to Notch-binding agents and Notch antagonists and methods of using the agents and/or antagonists for treating diseases such as cancer. The present invention provides antibodies that specifically bind to a non-ligand binding region of the extracellular domain of one or more human Notch receptor, such as Notch2 and/or Notch3, and inhibit tumor growth. The present invention further provides methods of treating cancer, the methods comprising administering a therapeutically effective amount of an antibody that specifically binds to a non-ligand binding region of the extracellular domain of a human Notch receptor protein and inhibits tumor growth.10-03-2013
20130296536NOTCH BINDING AGENTS AND ANTAGONISTS AND METHODS OF USE THEREOF - The present invention relates to Notch-binding agents and Notch antagonists and methods of using the agents and/or antagonists for treating diseases such as cancer. The present invention provides antibodies that specifically bind to a non-ligand binding region of the extracellular domain of one or more human Notch receptor, such as Notch2 and/or Notch3, and inhibit tumor growth. The present invention further provides methods of treating cancer, the methods comprising administering a therapeutically effective amount of an antibody that specifically binds to a non-ligand binding region of the extracellular domain of a human Notch receptor protein and inhibits tumor growth.11-07-2013

Patent applications by Yuan Ching Liu, Fremont, CA US

Zhan Liu, Fremont, CA US

Patent application numberDescriptionPublished
20090107493REDUNDANT POWER CONTROL FOR RESPIRATORY SYSTEM HEATERS - A humidification system is provided for a respiratory system is provided with a controller having two processors that monitor the operation of each other and of heating elements in the respiratory system to provide CPU redundancy and heating element control. Each heating element is provided with two control paths, for example a relay and a triac connected in series with the heating element and a power supply. Each heater has one control path connected to a first one of the processors and at least one heating element has at least one control path connected to a second one of the controllers. A hardware watchdog monitors the operation of the first processor, and can be triggered by a signal from the second processor, in response to which it can disable all heating elements.04-30-2009
20090113238POWER FAILURE MANAGEMENT FOR RESPIRATORY SYSTEM HEATER UNIT - A heater unit includes power failure management to detect disruptions in the electrical power supply, such as the AC supply, for the unit. The heater unit emits an audible alarm in response to detection of such a disruption, and may shut down the heater(s) and visuals display(s). The heater unit advantageously includes a power storage device, such as a super-capacitor, to temporarily power the electronic circuitry of the heater unit. Operating parameters, such as of a processor of the electronic circuitry, may be stored in a non-volatile memory response to the disruption, and recalled if the disruption terminates before the level of power has gotten too low to sustain reliable operation of the processor.04-30-2009
20120203195SYRINGE PUMP RAPID OCCLUSION DETECTION SYSTEM - An apparatus, method and program product detects an occlusion in a fluid line by determining if a relationship between force measurements departs from an expected relationship.08-09-2012
20120245525SYRINGE PUMP RAPID OCCLUSION DETECTION SYSTEM - An apparatus and method for detecting an occlusion in a downstream fluid line of a medical pump in relation to increased pressure in the downstream fluid line between the beginning and the end of each interval of a series of intervals of operation of the pump even if one or more intervals between the first and last intervals does not reflect such an increase in pressure in the downstream fluid line.09-27-2012
20140058351SYRINGE PUMP RAPID OCCLUSION DETECTION SYSTEM - An apparatus and method for detecting an occlusion in a downstream fluid line of a medical pump in relation to increased pressure in the downstream fluid line between the beginning and the end of each interval of a series of intervals of operation of the pump even if one or more intervals between the first and last intervals does not reflect such an increase in pressure in the downstream fluid line.02-27-2014

Patent applications by Zhan Liu, Fremont, CA US

Zhibing Liu, Fremont, CA US

Patent application numberDescriptionPublished
20090310729Circuit for correcting an output clock frequency in a receiving device - An output clock correction circuit (12-17-2009

Zhizheng Liu, Fremont, CA US

Patent application numberDescriptionPublished
20100327773METHOD AND SYSTEM FOR DIMMING AN OFFLINE LED DRIVER - An apparatus and method for dimming a light emitting diode (LED) driver. The apparatus includes a triode alternating current (TRIAC) dimmer and an LED driver receiving an input voltage from an output of the TRIAC dimmer so that the state of the LED driver is controlled by the TRIAC dimmer. The LED driver includes an active damping circuit configured for damping, upon detecting a rising edge of a bridge rectified input voltage, resonance caused by the TRIAC dimmer and the LED driver for a fixed period of time.12-30-2010

Zhuan Liu, Fremont, CA US

Patent application numberDescriptionPublished
20090276198Modeling Conductive Patterns Using An Effective Model - A model of a sample with a periodic or non-periodic pattern of conductive and transparent materials is produced based on the effect that the pattern has on TE polarized incident light. The model of the pattern may include a uniform film of the transparent material and an underlying uniform film of the conductive material. When the pattern has periodicity in two directions, the model may include a uniform film of the transparent material and an underlying portion that based on the physical characteristics of the periodic pattern in the TM polarization direction. When the sample includes an underlying periodic pattern that is orthogonal to the top periodic pattern, the sample may be modeled by modeling the physical characteristics of the top periodic pattern and the effect of the bottom periodic pattern. The model may be stored and used to determine a characteristic of the sample.11-05-2009
20090296075Imaging Diffraction Based Overlay - An overlay error is determined using a diffraction based overlay target by generating a number of narrow band illumination beams that illuminate the overlay target. Each beam has a different range of wavelengths. Images of the overlay target are produced for each different range of wavelengths. An intensity value is then determined for each range of wavelengths. In an embodiment in which the overlay target includes a plurality of measurement pads, which may be illuminated and imaged simultaneously, an intensity value for each measurement pad in each image is determined. The intensity value may be determined statistically, such as by summing, finding the mean or median of the intensity values of pixels in the image. Spectra is then constructed using the determined intensity value, e.g., for each measurement pad. Using the constructed spectra, the overlay error may then be determined.12-03-2009
20110238365Diffraction Based Overlay Linearity Testing - An empirical diffraction based overlay (eDBO) measurement of an overlay error is produced using diffraction signals from a plurality of diffraction based alignment pads from an alignment target. The linearity of the overlay error is tested using the same diffraction signals or a different set of diffraction signals from diffraction based alignment pads. Wavelengths that do not have a linear response to overlay error may be excluded from the measurement error.09-29-2011
20130242303DUAL ANGLES OF INCIDENCE AND AZIMUTH ANGLES OPTICAL METROLOGY - A dual optical metrology system includes a first metrology device and a second metrology device, each producing light at different oblique angles of incidence on the same spot of a sample from different azimuth angles. The dual optical metrology system further includes a rotating stage or flip mirrors capable of altering the orientation of the light beams so the first and second metrology devices can measure the same spot on the sample at different orientations. Thus, the first and second metrology devices generate first and second sets of optical metrology data, respectively, at a first orientation with respect to the sample. After the sample is rotated, the first and second metrology devices generate third and fourth sets of optical metrology data. The first, second, third, and fourth sets of data can then be used to determine one or more parameters of the sample.09-19-2013

Patent applications by Zhuan Liu, Fremont, CA US

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