Patent application number | Description | Published |
20100041632 | USES OF THE CARBOXY-AMIDO-TRIAZOLE COMPOUNDS AND SALTS THEREOF - The present invention relates to new medical use of CAI and its analogs/derivates together with the pharmaceutically acceptable salts thereof. Particularly, the use of CAI and its analogs/derivates, together with pharmaceutically acceptable salts thereof as TNF-α and IL-1β inhibitor and the use of these compounds in preparation of formulations for treatment of TNF-α and/or IL-1β mediated diseases other than malignant tumor especially of painful diseases and/or inflammatory diseases are provided herein. | 02-18-2010 |
20110260173 | SEMICONDUCTOR STRUCTURE - A semiconductor structure is provided. The semiconductor structure may comprise a substrate ( | 10-27-2011 |
20120007146 | METHOD FOR FORMING STRAINED LAYER WITH HIGH GE CONTENT ON SUBSTRATE AND SEMICONDUCTOR STRUCTURE - A semiconductor structure and a method for forming the same are provided. The semiconductor structure may comprise a substrate ( | 01-12-2012 |
20120012906 | Si-Ge-Si SEMICONDUCTOR STRUCTURE HAVING DOUBLE GRADED JUNCTIONS AND METHOD FOR FORMING THE SAME - A Si—Ge—Si semiconductor structure having double compositionally-graded hetero-structures is provided, comprising: a substrate; a buffer layer or an insulation layer formed on the substrate; a strained SiGe layer formed on the buffer layer or the insulation layer, wherein a Ge content in a central portion of the strained SiGe layer is higher than the Ge content in an upper surface or in a lower surface of the strained SiGe layer, and the Ge content presents a compositionally-graded distribution from the central portion to the upper surface and to the lower surface respectively. According to the present disclosure, a compositionally-graded hetero-structure replaces an abrupt hetero-structure so as to form a triangular hole carrier potential well, so that most of hole carriers may be distributed in the strained SiGe layer with high Ge content and a reduction of the carrier mobility caused by interface scattering may be avoided, thus further improving a performance of a device. | 01-19-2012 |
20120032231 | MOS TRANSISTOR STRUCTURE WITH IN-SITU DOPED SOURCE AND DRAIN AND METHOD FOR FORMING THE SAME - A MOS transistor structure with an in-situ doped source and/or drain and a method for forming the same are provided. The method comprises steps of: providing a substrate; forming a high Ge content layer on the substrate; forming a gate stack on the high Ge content layer and forming a side wall of one or more layers on both sides of the gate stack; etching the high Ge content layer to form a source region and/or a drain region; and forming a source and/or a drain in the source region and/or the drain region respectively by a low-temperature selective epitaxy, and introducing a doping gas during the low-temperature selective epitaxy to heavily dope the source and/or the drain and to in-situ activate a doping element. | 02-09-2012 |
20120187487 | GE-ON-INSULATOR STRUCTURE AND METHOD FOR FORMING THE SAME - A method for forming a Ge-on-insulator structure is provided, comprising steps of: forming a Ge layer ( | 07-26-2012 |
20120228671 | STRAINED GE-ON-INSULATOR STRUCTURE AND METHOD FOR FORMING THE SAME - A strained Ge-on-insulator structure is provided, comprising: a silicon substrate, in which an oxide insulating layer is formed on a surface of the silicon substrate; a Ge layer formed on the oxide insulating layer, in which a first passivation layer is formed between the Ge layer and the oxide insulating layer; a gate stack formed on the Ge layer, a channel region formed below the gate stack, and a source and a drain formed on sides of the channel region; and a SiN stress cap layer covering the gate stack to produce a strain in the channel region. Further, a method for forming the strained Ge-on-insulator structure is also provided. | 09-13-2012 |
20120228707 | STRAINED GE-ON-INSULATOR STRUCTURE AND METHOD FOR FORMING THE SAME - A strained Ge-on-insulator structure is provided, comprising: a silicon substrate, in which an oxide insulating layer is formed on a surface of the silicon substrate; a Ge layer formed on the oxide insulating layer, in which a first passivation layer is formed between the Ge layer and the oxide insulating layer; a gate stack formed on the Ge layer, a channel region formed below the gate stack, and a source and a drain formed on sides of the channel region; and a plurality of shallow trench isolation structures extending into the silicon substrate and filled with an insulating dielectric material to produce a strain in the channel region. Further, a method for forming the strained Ge-on-insulator structure is also provided. | 09-13-2012 |
20120228708 | STRAINED GE-ON-INSULATOR STRUCTURE AND METHOD FOR FORMING THE SAME - A strained Ge-on-insulator structure is provided, comprising: a silicon substrate, in which an oxide insulating layer is formed on a surface of the silicon substrate; a Ge layer formed on the oxide insulating layer, in which a first passivation layer is formed between the Ge layer and the oxide insulating layer; a gate stack formed on the Ge layer; and a channel region formed below the gate stack, and a source and a drain formed on sides of the channel region, in which the source and the drain are a Si | 09-13-2012 |
20120280274 | SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME - A semiconductor structure is provided, comprising: a Si substrate; a porous structure layer formed on the Si substrate, in which the porous structure layer has a flat surface and comprises a Si | 11-08-2012 |
20120305986 | SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME - A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a wafer; a plurality of convex structures formed on the wafer, in which every two adjacent convex structures are separated by a cavity in a predetermined pattern and arranged in an array, and the cavity between every two adjacent convex structures is less than 50 nm in width; and a first semiconductor film formed on the plurality of convex structures, in which a part of the first semiconductor film is spaced apart from the wafer. | 12-06-2012 |
20120305988 | SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME - A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate; a plurality of convex structures formed on the substrate, in which every two adjacent convex structures are separated by a cavity; a plurality of floated films, in which each floated film is formed between the every two adjacent convex structures and connected with tops of the every two adjacent convex structures, the floated films are partitioned into a plurality of sets, a channel layer is formed on a convex structure between the floated films in each set, a source region and a drain region are formed on two sides of the channel layer respectively, and an isolation portion is set between two adjacent sets of floated films; and a gate stack formed on each channel layer. | 12-06-2012 |
20130181208 | SEMICONDUCTOR VOLTAGE TRANSFORMATION STRUCTURE - A semiconductor voltage transformation structure is provided. The semiconductor voltage transformation structure includes: a first electrode layer; an electricity-to-light conversion layer formed on the first electrode layer; a second electrode layer formed on the electricity-to-light conversion layer; a first isolation layer formed on the second electrode layer; a third electrode layer formed on the first isolation layer; a light-to-electricity conversion layer formed on the third electrode layer; and a fourth electrode layer formed on the light-to-electricity conversion layer, in which the first isolation layer, the second electrode layer and the third electrode layer are transparent to a working light emitted by the electricity-to-light conversion layer. | 07-18-2013 |
20130207161 | SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME - A semiconductor device and a method for forming the same are provided. The semiconductor device comprises: a substrate ( | 08-15-2013 |
20130240958 | SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME - A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises: a semiconductor substrate; an active region formed in the semiconductor substrate, in which the active region comprises: a channel region, and a source region and a drain region formed on both sides of the channel region respectively; and a first isolation trench formed in the semiconductor substrate and on both sides of the active region, in which a first rare earth oxide layer is formed in each first isolation trench to produce a stress in the channel region in a channel length direction. | 09-19-2013 |
20130295733 | Si-Ge-Si SEMICONDUCTOR STRUCTURE HAVING DOUBLE COMPOSITIONALLY-GRADED HETERO-STRUCTURES AND METHOD FOR FORMING THE SAME - A Si—Ge—Si semiconductor structure having double compositionally-graded hetero-structures is provided, comprising: a substrate; a buffer layer or an insulation layer formed on the substrate; a strained SiGe layer formed on the buffer layer or the insulation layer, wherein a Ge content in a central portion of the strained SiGe layer is higher than the Ge content in an upper surface or in a lower surface of the strained SiGe layer, and the Ge content presents a compositionally-graded distribution from the central portion to the upper surface and to the lower surface respectively. According to the present disclosure, a compositionally-graded hetero-structure replaces an abrupt hetero-structure so as to form a triangular hole carrier potential well, so that most of hole carriers may be distributed in the strained SiGe layer with high Ge content and a reduction of the carrier mobility caused by interface scattering may be avoided, thus further improving a performance of a device. | 11-07-2013 |
20130320413 | SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME - A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises: a semiconductor substrate; a trench formed in the semiconductor substrate, in which a rare earth oxide layer is formed in the trench; a channel region partly or entirely formed on the rare earth oxide layer; and a source region and a drain region formed at both sides of the channel region, respectively. A relationship between a lattice constant a of the rare earth oxide layer and a lattice constant b of a semiconductor material of the channel region and/or the source region and the drain region is a=(n±c)b, where n is an integer, c is a mismatch ratio of lattice constants, and 012-05-2013 | |
20130320446 | SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME - A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises: a semiconductor substrate; a rare earth oxide layer formed on the semiconductor substrate; a channel region formed on the rare earth oxide layer; and a source region and a drain region formed at both sides of the channel region respectively, in which a relationship between a lattice constant a of the rare earth oxide layer and a lattice constant b of a semiconductor material of the channel region and/or the source region and the drain region is a=(n±c)b, where n is an integer, c is a mismatch ratio of lattice constants, and 012-05-2013 | |
20140054615 | CHIP WITH SEMICONDUCTOR ELECTRICITY CONVERSION STRUCTURE - A semiconductor electricity conversion structure is provided. The semiconductor electricity conversion structure includes: a substrate; and at least one semiconductor electricity conversion structure formed on the substrate, the at least one semiconductor electricity conversion structure including: at least one semiconductor electricity-to-light conversion unit for converting an input electric energy into a light energy, and at least one semiconductor light-to-electricity conversion unit for converting the light energy back into an output electric energy, in which a number of the semiconductor electricity-to-light conversion unit is in proportion to a number of the semiconductor light-to-electricity conversion unit to realize an electricity conversion, and an emitting spectrum of the semiconductor electricity-to-light conversion unit and an absorption spectrum of the semiconductor light-to-electricity conversion unit are matched with each other. | 02-27-2014 |
20140061679 | SEMICONDUCTOR ELECTRICITY CONVERTER - A semiconductor electricity converter is provided. The semiconductor electricity converter includes: an AC input module, for converting an input AC electric energy into a light energy, the AC input module including a plurality of semiconductor electricity-to-light conversion structures, each semiconductor electricity-to-light conversion structure including an electricity-to-light conversion layer; and an AC output module, for converting the light energy into an output AC electric energy, the AC output module including a plurality of semiconductor light-to-electricity conversion structures, each semiconductor light-to-electricity conversion structure including a light-to-electricity conversion layer; in which an emitting spectrum of each semiconductor electricity-to-light conversion structure and an absorption spectrum of each semiconductor light-to-electricity conversion structure are matched with each other. | 03-06-2014 |
20140097402 | SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME - A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises: a substrate ( | 04-10-2014 |
20140138741 | SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME - A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises: a Si substrate ( | 05-22-2014 |
20140145312 | SEMICONDUCTOR STRUCTURE WITH RARE EARTH OXIDE - A semiconductor structure with a rare earth oxide is provided. The semiconductor structure comprises: a semiconductor substrate ( | 05-29-2014 |
20140145314 | SEMICONDUCTOR STRUCTURE WITH BERYLLIUM OXIDE - A semiconductor structure with beryllium oxide is provided. The semiconductor structure comprises: a semiconductor substrate ( | 05-29-2014 |
20140319657 | SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME - A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises: a substrate ( | 10-30-2014 |
20140332933 | SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME - A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises: a substrate; and a plurality of convex structures formed on a surface of the substrate and arranged in a longitudinal direction of the substrate, each convex structure having a top surface, a bottom surface located on the surface of the substrate, a first end surface and a second end surface parallel to each other, and a front side surface and a rear side surface parallel to each other, in which the rear side surface of one of two adjacent convex structures and the front side surface of the other are located on a same plane to allow the plurality of convex structures to form a zigzag structure. | 11-13-2014 |