Patent application number | Description | Published |
20080291655 | Wiring substrate, semiconductor device package including the wiring substrate and methods of fabricating the same - Provided is a wiring substrate, a semiconductor device package including the wiring substrate, and methods of fabricating the same. The semiconductor device package may include a wiring substrate which may include a base film. The base film may include a mounting region and a non-mounting region. The wiring substrate may further include first wiring patterns on the non-mounting region and extending into the mounting region, second wiring patterns on the first wiring patterns of the non-mounting region, and an insulating layer on the non-mounting region, and a semiconductor device which may include bonding pads. At least one of side surfaces of the second wiring patterns adjacent to the mounting region may be electrically connected to at least one of the bonding pads of the semiconductor device. | 11-27-2008 |
20090117710 | METHOD OF CUTTING SEMICONDUCTOR WAFER, SEMICONDUCTOR CHIP APPARATUS, AND CHAMBER TO CUT WAFER - A method of cutting a semiconductor wafer includes preparing a semiconductor wafer including a scribe region and a chip region, forming a groove in the scribe region, loading the semiconductor wafer with the groove formed therein in a chamber, and cutting the semiconductor wafer into a plurality of chips through increasing a pressure of the chamber by a first pressure change rate, and then reducing the pressure of the chamber by a second pressure change rate. | 05-07-2009 |
20090284883 | ELECTRONIC DEVICE HAVING ELECTROSTATIC DISCHARGE PROTECTION DEVICE AND METHODS OF FABRICATING THE SAME - An electronic device having an electrostatic discharge (ESD) protection device and methods of fabricating the same. The electronic device can include an electronic element to be protected from electrostatic discharge. The electronic element can be installed on a substrate. The substrate can include a ground electrode disposed on the substrate, and a first element electrode disposed at a different level from the ground electrode on the substrate to overlap a part of the ground electrode and to electrically connect to the electronic element installed to the substrate. A dielectric layer can be disposed between the ground electrode and the first element electrode, wherein the ground electrode, the first element electrode and the dielectric layer disposed therebetween constitute an electrostatic discharge (ESD) protection device. | 11-19-2009 |
20100005652 | Method of manufacturing a wiring substrate, method of manufacturing a tape package and method of manufacturing a display device - Disclosed is a method of manufacturing a wiring substrate, a tape package using the wiring substrate, and a display device using the wiring substrate. In a method of manufacturing a wiring substrate, a screen may be disposed on a base plate, the screen having openings for forming wirings. A conductive paste may be coated in the openings of the screen. A substrate may be on the screen, the conductive paste being coated in the openings of the screen. The conductive paste may be hardened to be adhered to the substrate. The base plate and the screen may be removed from the substrate to form wirings on the substrate. Because the wirings may be formed using a glass substrate having heat-resisting properties by simplified processes, thermal deflections of the substrate and dimension variations in manufacturing processes may be reduced or minimized. | 01-14-2010 |
20100044851 | Flip chip packages - Flip chip packages and methods of manufacturing the same are provided, the flip chip packages may include a package substrate, a semiconductor chip, conductive bumps, a ground pattern and an underfilling layer. The semiconductor chip may be over the package substrate. The conductive bumps may be between the semiconductor chip and the package substrate to electrically connect the semiconductor chip and the package substrate with each other. The ground pattern may ground one of the package substrate and the semiconductor chip. The underfilling layer may be between the package substrate and the semiconductor chip to surround the conductive bumps. The underfilling layer may have a diode selectively located between the ground pattern and the conductive bumps by electrostatic electricity applied to the underfilling layer to protect the semiconductor chip from the electrostatic electricity. | 02-25-2010 |
20110143625 | TAPE FOR HEAT DISSIPATING MEMBER, CHIP ON FILM TYPE SEMICONDUCTOR PACKAGE INCLUDING HEAT DISSIPATING MEMBER, AND ELECTRONIC APPARATUS INCLUDING THE SAME - Disclosed is a chip-on-film (COF) type semiconductor package and a device using the same. The COF type semiconductor package may include an insulation substrate including a top surface and bottom surface, a semiconductor device on the top surface of the insulation substrate, a heat dissipating component on the bottom surface of the insulation substrate, and at least one space between the bottom surface of the insulation substrate and a top surface of the heat dissipating component. | 06-16-2011 |
20110247871 | MULTI-LAYER PRINTED CIRCUIT BOARD COMPRISING FILM AND METHOD FOR FABRICATING THE SAME - A multi-layer printed circuit board (PCB) and a method for fabricating the same are provided. The multi-layer printed circuit board may include a first film and a first insulation layer. The first film may include a first via therein and the first film may further include a first conductive pattern on an upper surface thereof and the first conductive layer may be electrically connected to the first via. The first insulation layer may be on the upper surface of the first film and the first insulation layer may include a second via therein and a second conductive pattern on an upper surface thereof and the second conductive pattern may be electrically connected to the second via. The second via may be electrically connected to the first conductive pattern. | 10-13-2011 |
20110285890 | CAMERA MODULE - A camera module has a lens unit including a lens, a first chip having an image region on which an image is formed from light having passed through the lens unit, a housing enclosing side surfaces of the lens unit and the first chip, a second chip and at least one printed circuit board. The chips are mounted to the at least one printed circuit board. | 11-24-2011 |
20110304763 | IMAGE SENSOR CHIP AND CAMERA MODULE HAVING THE SAME - An image sensor chip, a camera module, and devices incorporating the image sensor chip and camera module include a light receiving unit on which light is incident, a logic unit provided to surround the light receiving unit, and an electromagnetic wave shielding layer formed on the logic unit and not formed on the light receiving unit. | 12-15-2011 |
20110316144 | FLEXIBLE HEAT SINK HAVING VENTILATION PORTS AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME - A heat sink includes a first adhesive layer, and a heat dissipation layer disposed on the first adhesive layer, and has ventilation ports that extend therethrough including through the first adhesive layer and the heat dissipation layer. The heat sink forms an outermost part of a semiconductor package. Thus, when the heat sink is bonded via its adhesive layer to underlying structure during a manufacturing process, the ventilation ports allow air to pass therethrough. As a result, air is not trapped in the form of bubbles between the heat sink and the underlying structure. | 12-29-2011 |
20120074540 | SEMICONDUCTOR CHIP PACKAGE - A structure of a semiconductor chip package is provided. The semiconductor chip package includes: a substrate; a semiconductor chip mounted on a first surface of the substrate; a plurality of electrode pads on a second surface, different from the first surface, of the substrate; and an electrostatic discharge protection pad overlapping a portion of a first electrode pad and a portion of a second electrode pad among the plurality of electrode pads. | 03-29-2012 |
20140059852 | MULTI-LAYER PRINTED CIRCUIT BOARD COMPRISING FILM AND METHOD FOR FABRICATING THE SAME - A multi-layer printed circuit board (PCB) and a method for fabricating the same are provided. The multi-layer printed circuit board may include a first film and a first insulation layer. The first film may include a first via therein and the first film may further include a first conductive pattern on an upper surface thereof and the first conductive layer may be electrically connected to the first via. The first insulation layer may be on the upper surface of the first film and the first insulation layer may include a second via therein and a second conductive pattern on an upper surface thereof and the second conductive pattern may be electrically connected to the second via. The second via may be electrically connected to the first conductive pattern. | 03-06-2014 |
20140374902 | STACK TYPE SEMICONDUCTOR PACKAGE - A stack type semiconductor package includes: a lower semiconductor package including a lower package substrate, and a lower semiconductor chip which is mounted on the lower package substrate and includes a first surface facing a top surface of the lower package substrate and a second surface opposite to the first surface; an upper semiconductor package including an upper package substrate and an upper semiconductor chip which is mounted on the upper package substrate; an inter-package connection unit which connects the lower package substrate and the upper package substrate; a heat dissipation member which is formed on the second surface of the lower semiconductor chip; and an interconnection unit which is formed on a bottom surface of the upper package substrate, and is adhered to the heat dissipation member to connect the lower semiconductor chip and the upper package substrate. | 12-25-2014 |