Patent application number | Description | Published |
20080220617 | Deep STI trench and SOI undercut enabling STI oxide stressor - A method for imparting stress to the channel region of a transistor is provided. In accordance with the method, a semiconductor layer ( | 09-11-2008 |
20080272411 | SEMICONDUCTOR DEVICE WITH MULTIPLE TENSILE STRESSOR LAYERS AND METHOD - A semiconductor device has at least two tensile stressor layers that are cured with UV radiation. A second tensile stressor layer is formed after a first stressor layer. In some examples, the tensile stressor layers include silicon nitride and hydrogen. In some examples, the second tensile stressor layer has a greater shrinkage percentage due to the curing than the first tensile stressor layer. In one form, the second tensile stressor layer after the curing exerts a greater tensile stress than the first tensile stressor layer. The tensile stressors layers are utilized to improve carrier mobility in an N-channel transistor and thus enhance transistor performance. In one form a single group of overlying tensile stressor layers is provided with each layer being increasingly thicker and having increasingly more hydrogen prior to being cured. In other embodiments multiple overlying groups are formed, each group having a similar repeating depth and hydrogen profile. | 11-06-2008 |
20090017587 | Disposable organic spacers - A method for making a semiconductor device is provided, comprising (a) providing a semiconductor structure comprising a first gate electrode ( | 01-15-2009 |
20090075434 | METHOD OF REMOVING DEFECTS FROM A DIELECTRIC MATERIAL IN A SEMICONDUCTOR - A method of forming a semiconductor device includes forming a high dielectric constant material over a semiconductor substrate, forming a conductive material over the high dielectric constant material, and performing an anneal in a non-oxidizing ambient using ultraviolet radiation to remove defects in the high dielectric constant material. Examples of a non-oxidizing ambient include for example nitrogen, deuterium, a deuterated forming gas (N | 03-19-2009 |
20090191708 | METHOD FOR FORMING A THROUGH SILICON VIA LAYOUT - A method for forming a TSV layout reduces recessing in a silicon nitride layer caused by forming the TSV through a silicon nitride layer having an intrinsic tensile stress or neutral stress. In one embodiment, the method includes compensating for the tensile stressed silicon nitride layer by either moving the TSV location to an area of intrinsic tensile stress, or by substituting a compressively stressed silicon nitride layer in the area of the TSV. The compressively stressed silicon nitride layer experiences less recessing during a TSV etch process than a silicon nitride layer under tensile stress. The smaller recesses are more readily filled when a dielectric liner is applied to the sidewalls of the TSV, reducing the possibility of voids being formed. Also, the smaller recesses require smaller exclusion zones, resulting in less surface area of an integrated circuit being used for the TSVs, as well as greater reliability and improved yields. | 07-30-2009 |
20110210401 | MULTILAYER SILICON NITRIDE DEPOSITION FOR A SEMICONDUCTOR DEVICE - A method for making a semiconductor device is provided which comprises (a) providing a semiconductor structure equipped with a gate ( | 09-01-2011 |
20130029485 | METHOD OF MAKING A DIE WITH RECESSED ALUMIUM DIE PADS - A method for making a semiconductor device comprises forming an electrical interconnect layer, forming a first dielectric layer over the interconnect layer, forming an opening in the first dielectric layer over a first electrical interconnect of the interconnect layer, forming an aluminum layer over the first dielectric layer, etching the aluminum layer to form an aluminum die pad, forming a second dielectric layer over the aluminum die pad and the first dielectric layer, and forming a conductive via through the first and second dielectric layers to contact a second electrical interconnect of the interconnect layer. | 01-31-2013 |
20140213050 | METHOD OF MAKING A DIE WITH RECESSED ALUMINUM DIE PADS - A method for making a semiconductor device comprises forming an electrical interconnect layer, forming a first dielectric layer over the interconnect layer, forming an opening in the first dielectric layer over a first electrical interconnect of the interconnect layer, forming an aluminum layer over the first dielectric layer, etching the aluminum layer to form an aluminum die pad, forming a second dielectric layer over the aluminum die pad and the first dielectric layer, and forming a conductive via through the first and second dielectric layers to contact a second electrical interconnect of the interconnect layer. | 07-31-2014 |