Patent application number | Description | Published |
20130203920 | POLYMER COMPOSITION HAVING PHOTOALIGNABLE GROUP, LIQUID CRYSTAL ALIGNMENT FILM FORMED OF THE POLYMER COMPOSITION, AND LIQUID CRYSTAL DISPLAY DEVICE HAVING PHASE DIFFERENCE PLATE FORMED OF THE LIQUID CRYSTAL ALIGNMENT FILM - To provide a photoalignable material that can yield a photoalignable film having a high optical uniformity and no alignment defect, and allows photoalignment with exposure in a short period of time. A photoalignable polymer composition containing a specific photoalignable polymer having a silicone group or a fluorine-substituted alkyl group, and a photoalignable group, and a specific non-photoalignable polymer is manufactured, and the photoalignable film is manufactured by applying the polymer composition onto a base material or the like, drying an applied surface thereon, and irradiating the applied surface with light. | 08-08-2013 |
20140323629 | POLYMER COMPOSITION HAVING PHOTOALIGNABLE GROUP, LIQUID CRYSTAL ALIGNMENT FILM FORMED OF THE POLYMER COMPOSITION, AND LIQUID CRYSTAL DISPLAY DEVICE HAVING PHASE DIFFERENCE PLATE FORMED OF THE LIQUID CRYSTAL ALIGNMENT FILM - To provide a photoalignable material that can yield a photoalignable film having a high optical uniformity and no alignment defect, and allows photoalignment with exposure in a short period of time. A photoalignable polymer composition containing a specific photoalignable polymer having a silicone group or a fluorine-substituted alkyl group, and a photoalignable group, and a specific non-photoalignable polymer is manufactured, and the photoalignable film is manufactured by applying the polymer composition onto a base material or the like, drying an applied surface thereon, and irradiating the applied surface with light. | 10-30-2014 |
20140323657 | POLYMER COMPOSITION HAVING PHOTOALIGNABLE GROUP, LIQUID CRYSTAL ALIGNMENT FILM FORMED OF THE POLYMER COMPOSITION, AND LIQUID CRYSTAL DISPLAY DEVICE HAVING PHASE DIFFERENCE PLATE FORMED OF THE LIQUID CRYSTAL ALIGNMENT FILM - To provide a photoalignable material that can yield a photoalignable film having a high optical uniformity and no alignment defect, and allows photoalignment with exposure in a short period of time. A photoalignable polymer composition containing a specific photoalignable polymer having a silicone group or a fluorine-substituted alkyl group, and a photoalignable group, and a specific non-photoalignable polymer is manufactured, and the photoalignable film is manufactured by applying the polymer composition onto a base material or the like, drying an applied surface thereon, and irradiating the applied surface with light. | 10-30-2014 |
Patent application number | Description | Published |
20110073903 | SEMICONDUCTOR DEVICE - A reverse blocking IGBT according to the invention can include a reverse breakdown withstanding region, p-type outer field limiting rings formed in a reverse breakdown withstanding region and an outer field plate connected to the outer field limiting rings, the outer field plate including a first outer field plate in contact with outer filed limiting rings nearest to the active region and second outer field plates in contact with other outer field limiting rings. The first outer field plate having an active region side edge portion projecting toward the active region and second outer field plate having an edge area side edge portion projecting toward the edge area. The reverse blocking IGBT according to the invention can facilitate improving the withstand voltages thereof and reducing the area thereof. | 03-31-2011 |
20110207267 | REVERSE BLOCK-TYPE INSULATED GATE BIPOLAR TRANSISTOR MANUFACTURING METHOD - A reverse block-type insulated gate bipolar transistor (IGBT) manufacturing method that, when manufacturing a reverse block-type IGBT having a separation layer formed along tapered surfaces of a V-shaped groove formed using anisotropic etching, can secure a highly reliable reverse pressure resistance, and suppress a leakage current when reverse biasing. When irradiating with a flash lamp for flash lamp annealing after implantation of ions into a second conductivity type separation layer and second conductivity type collector layer to form the second conductivity type collector layer and second conductivity type separation layer, the strongest portion of radiation energy is focused on a depth position from the upper portion to the central portion of a tapered side edge surface. | 08-25-2011 |
20130344663 | REVERSE BLOCK-TYPE INSULATED GATE BIPOLAR TRANSISTOR MANUFACTURING METHOD - A reverse block-type insulated gate bipolar transistor (IGBT) manufacturing method that, when manufacturing a reverse block-type IGBT having a separation layer formed along tapered surfaces of a V-shaped groove formed using anisotropic etching, can secure a highly reliable reverse pressure resistance, and suppress a leakage current when reverse biasing. When irradiating with a flash lamp for flash lamp annealing after implantation of ions into a second conductivity type separation layer and second conductivity type collector layer to form the second conductivity type collector layer and second conductivity type separation layer, the strongest portion of radiation energy is focused on a depth position from the upper portion to the central portion of a tapered side edge surface. | 12-26-2013 |
Patent application number | Description | Published |
20090201753 | Semiconductor memory device, control method therefor, and method for determining repair possibility of defective address - There are provided are a plurality of memory mats, a sub-word driver that accesses a normal memory cell irrespective of whether a row address to which access is requested is a defective address, a sub-word driver that accesses a redundant memory cell belonging to a memory mat different from the normal memory cell indicated by the row address, when the row address is a defective address. According to the present invention, the normal memory cell and a redundant memory cell belong to memory mats different to each other, and thus the normal memory cell can be accessed concurrently with determining operation of the repair determining circuit. | 08-13-2009 |
20090268534 | SEMICONDUCTOR MEMORY DEVICE AND TEST METHOD THEREOF - A semiconductor memory device comprises a memory cell array having memory cells arranged at intersections of word lines and bit lines, a first sense amplifier connected to a bit line at a predetermined position of the bit lines, a second sense amplifier connected to a bit line adjacent to the bit line at the predetermined position, a supplying circuit for supplying a predetermined voltage to each bit line connected to the first or second sense amplifier, and a sense amplifier control circuit capable of controlling the first and second sense amplifiers independently. In the semiconductor memory device, the sense amplifier control circuit performs a control in which an operation of either of the first and second sense amplifiers is stopped, the predetermined voltage is supplied to the bit line connected to the stopped sense amplifier, and the other of the first and second sense amplifiers is operated. | 10-29-2009 |
20100103758 | Semiconductor memory device having sense amplifier - To provide a first power supply wiring that supplies a lower-side write potential to a sense amplifier, a second power supply wiring that supplies a higher-side write potential to the sense amplifier, a third power supply wiring that supplies an overdrive potential to the sense amplifier, and a stabilizing capacitance arranged between the first power supply wiring and the third power supply wiring. With this configuration, a capacitance value applied to the lower-side write potential and a capacitance value applied to the overdrive potential inevitably match, and thus fluctuation of the lower-side write potential and fluctuation of the overdrive potential at an initial stage of a sense operation are offset. | 04-29-2010 |
20110058402 | Semiconductor device having nonvolatile memory elements - A bit memory circuit of an antifuse element set includes two antifuse elements of which logical states are changed from an insulation state to a conductive state when a program voltage is applied. 1-bit data is represented by the logical states of the two antifuse elements. The two antifuse elements are collectively controlled by one decoder circuit. When writing data, the decoder circuit simultaneously performs insulation-breakdown on the two antifuse elements by simultaneously connecting the two antifuse elements to program voltage lines, respectively. | 03-10-2011 |
20110063933 | Semiconductor device, relief-address-information writing device, and relief-address-information writing method - To provided a relief-address generating circuit that generates relief address information based on plural data bits supplied in time sequence via a first terminal from outside and a programming circuit that writes into any one of fuse sets the relief address information generated by the relief-address generating circuit. With this configuration, repetition of a programming operation by the total number of the fuse sets at the maximum completes a series of write processing on relief address information. Therefore, it is possible to reduce the time required for a series of write processing on relief address information. | 03-17-2011 |
20110096616 | SENSE AMPLIFIER CIRCUIT TO ENABLE SPEEDING-UP OF READOUT OF INFORMATION FROM MEMORY CELLS - A sense amplifier circuit, which is connected to a bit line and to an inverted bit line to which a voltage, inverted alternatively from a high level or a low level of a voltage applied to the bit line, is applied, includes a first resistance section reducing a voltage output from a memory cell through the inverted bit line, a second resistance section reducing a voltage output from a memory cell through the bit line, and an amplification section amplifying the first voltage reduced by the first resistance section and amplifying the second voltage reduced by the second resistance section. | 04-28-2011 |
20110221513 | Semiconductor device having boosting circuit - A semiconductor device includes a boosting circuit that boosts an internal power supply voltage in a boosting range according to an external power supply voltage, an external voltage-level comparison circuit that compares the external power supply voltage and a predetermined reference voltage, and a variable resistor circuit that includes a variable resistor connected to an output terminal of the boosting circuit. The variable resistor circuit controls a resistance value of the variable resistor based on a comparison result of the external voltage-level comparison circuit. | 09-15-2011 |
20120120735 | SEMICONDUCTOR DEVICE HAVING ELECTRICAL FUSE AND CONTROL METHOD THEREOF - To provide a plurality of fuse elements, each of which is either in a programmed state or a non-programmed state, a plurality of fuse determination circuits, each of which outputs a determination result signal that corresponds to a programmed state or a non-programmed state of the fuse element, and a plurality of latch circuits that commonly receive a first timing signal, and each of which latches and outputs the determination result signal synchronously with the first timing signal. | 05-17-2012 |
20120120750 | SEMICONDUCTOR DEVICE HAVING ELECTRICAL FUSE AND CONTROL METHOD THEREOF - To provide an electrical fuse that is connected to a detection node via a selective transistor, a precharge transistor that precharges the detection node in a state where the selective transistor is off; a bias transistor that passes a bias current to the detection node in a state where the selective transistor is on and the precharge transistor is off, and a detection circuit that detects a potential of the detection node in a state where the bias current is flowing into the detection node, wherein the bias transistor reduces an amount of the bias current in a stepwise manner or a continuous manner. | 05-17-2012 |
20140111271 | SEMICONDUCTOR DEVICE HAVING BOOSTING CIRCUIT - A semiconductor device includes a boosting circuit that boosts an internal power supply voltage in a boosting range according to an external power supply voltage, an external voltage-level comparison circuit that compares the external power supply voltage and a predetermined reference voltage, and a variable resistor circuit that includes a variable resistor connected to an output terminal of the boosting circuit. The variable resistor circuit controls a resistance value of the variable resistor based on a comparison result of the external voltage-level comparison circuit. | 04-24-2014 |
20140286113 | SEMICONDUCTOR DEVICE HAVING ROLL CALL CIRCUIT - Disclosed herein is an apparatus that includes: a plurality of memory banks each including a plurality of memory cells; a plurality of redundant circuits each allocated to an associated one of the plurality of memory banks to replace a defective memory cell among the plurality of memory cells included in the associated memory bank; a plurality of roll call circuits allocated to an associated one of the plurality of memory banks to generate a roll call data when an address corresponding to the defective memory cell is supplied; and a plurality of data buses commonly allocated to the plurality of memory banks. The roll call circuits output the roll call data to the plurality of data buses in parallel. | 09-25-2014 |
Patent application number | Description | Published |
20130155575 | CAPACITOR, AND MANUFACTURING METHOD AND MANUFACTURING PROGRAM THEREOF - A capacitor includes: an anode part that is drawn from an anode body of a capacitor element to an element end-face, to be formed over the element end-face; a cathode part that is drawn from a cathode body of the capacitor element to the element end-face, to be formed over the element end-face; an anode terminal member that is disposed in a sealing member; a cathode terminal member that is disposed in the sealing member; an anode current collector plate that is connected to the anode part, and is also connected to the anode terminal member; and a cathode current collector plate that is connected to the cathode part, and is also connected to the cathode terminal member. | 06-20-2013 |
20130250475 | CAPACITOR AND METHOD FOR MANUFACTURING THE SAME - A capacitor includes a capacitor element that is a wound element or an element other than the wound element, and that includes electrode bodies each of which is in an anode side and a cathode side, and separators that intervenes between the electrode bodies; a sealing member that seals an opening of a case member accommodating the capacitor element; at least one electrode protrusion that protrudes from one of the electrode bodies on an element end-face of the capacitor element, at least one of current collector plate that is connected to the electric protrusion; and at least one terminal member that is disposed in the sealing member, and is superposed on the current collector plate, a side face part of the terminal member being welded to a side face part of the current collector plate. | 09-26-2013 |
20140113185 | ELECTRICITY STORAGE DEVICE AND METHOD FOR MANUFACTURING ELECTRICITY STORAGE DEVICE - An electricity storage device includes an electricity storage element that is constituted by an electrode body in a positive side and an electrode body in a negative side that face each other while holding a separator; a sealing member that seals a case member accommodating the electricity storage element; at least one electrode protrusion that is either of the electrode bodies, which protrudes from an element end-face of the electricity storage element, at least one current collector plate that is connected to the electrode protrusion; and a terminal member that is installed in the sealing member, a lateral face of the terminal member being connected to a lateral face of the current collector plate. | 04-24-2014 |