Patent application number | Description | Published |
20080258192 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - This disclosure concerns a semiconductor device comprising an insulating film provided on a semiconductor substrate; a lower contact formed in the insulating film; a ferroelectric capacitor including a first lower electrode provided on the lower contact and connected to the lower contact, a second lower electrode provided on the first lower electrode and made of SRO (Strontium Ruthenium Oxide), a ferroelectric film including crystals, and an upper electrode provided on the ferroelectric film, grain diameters of the crystals being set to 30 nm to 150 nm by forming the ferroelectric film on the second lower electrode; and a wiring connected to the upper electrode. | 10-23-2008 |
20080258193 | FERROELECTRIC MEMORY AND METHOD OF MANUFACTURING THE SAME - A ferroelectric memory that stores information by using a hysteresis characteristic of a ferroelectric, has a semiconductor substrate; a lower electrode formed above said semiconductor substrate; a ferroelectric film formed on said lower electrode; and an upper electrode formed on said ferroelectric film, wherein said upper electrode includes an AO | 10-23-2008 |
20090091876 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREOF - A semiconductor device has a semiconductor substrate, and a capacitor which is provided on the upper side of the semiconductor substrate and composed of a lower electrode, an upper electrode and a dielectric film, the dielectric film being placed in between the lower electrode and the upper electrode, the lower electrode including a noble metal film, and a plurality of conductive oxide films formed in an islands arrangement on the noble metal film. | 04-09-2009 |
20090127603 | SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor memory device according to an embodiment comprises: a field-effect transistor formed on a substrate; an interlayer insulation film formed on the substrate on which the field-effect transistor is formed; and a ferroelectric capacitor including a lower electrode connected via a plug to one of source/drain regions of the field-effect transistor, and formed on the interlayer insulation film, a ferroelectric film having a perovskite crystal structure used as a basic structure, and an upper electrode, wherein a lattice matching region in which a lattice of the ferroelectric film is matched with a lattice of the lower electrode is formed in a range of a predetermined thickness of the ferroelectric film from the lower electrode. | 05-21-2009 |
20090267123 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a semiconductor substrate; a plurality of transistors on the semiconductor substrate, each of the transistors has a source and drain region; an interlayer insulating film on the semiconductor substrate and the plurality of transistors; and at least three capacitors on the interlayer insulation film, each of them has a top electrode, a bottom electrode and an insulating film interposed therebetween; wherein the 1st and 2nd capacitors have an shared electrode, with the top electrodes of the 1st and 2nd capacitors, which has a 1st longer direction, the 2nd and 3rd capacitors have an shared electrode, with the bottom electrodes of the 2nd and 3rd capacitors, which has a 2nd longer direction different from the 1st direction. | 10-29-2009 |
20100330769 | Semiconductor device and method of manufacturing thereof - A semiconductor device has a semiconductor substrate, and a capacitor which is provided on the upper side of the semiconductor substrate and composed of a lower electrode, an upper electrode and a dielectric film, the dielectric film being placed in between the lower electrode and the upper electrode, the lower electrode including a noble metal film, and a plurality of conductive oxide films formed in an islands arrangement on the noble metal film. | 12-30-2010 |
20110140238 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - According to an embodiment, there is provided a method for manufacturing a semiconductor device having a ferroelectric capacitor including a lower electrode, an upper electrode, and a dielectric film provided between the lower electrode and the upper electrode. The method includes firstly forming a conductive film on the lower electrode. Next, it includes forming an SRO film on the conductive film. Then, it includes performing a first thermal treatment crystallizing the SRO film. Then, it includes forming a first PZT film on the SRO film by the sputtering method and performing a second thermal treatment crystallizing the first PZT film. Then, it includes forming the second PZT film on the first PZT film by the CVD method. | 06-16-2011 |
20120007196 | MAGNETORESISTIVE RANDOM ACCESS MEMORY AND METHOD OF MANUFACTURING THE SAME - According to one embodiment, a magnetoresistive random access memory includes a magnetoresistive element in a memory cell, the magnetoresistive element including a first metal magnetic layer, a second metal magnetic layer, and an insulation layer interposed between the first and second metal magnetic layers. An area of each of the first and second metal magnetic layers is smaller than an area of the insulation layer. | 01-12-2012 |
20120112297 | MAGNETIC RANDOM ACCESS MEMORY AND METHOD OF FABRICATING THE SAME - According to one embodiment, a magnetic random access memory including a magneto resistive element, including a free layer including first metal atoms, a first metal layer on the free layer and including a first metal, a first interfacial magnetic layer on the first metal layer, a nonmagnetic layer provided on the first interfacial magnetic layer, a second interfacial magnetic layer on the nonmagnetic layer, a second metal layer on the second interfacial magnetic layer and including a second metal, and a pinned layer provided on the second metal layer and including the second metal atoms. | 05-10-2012 |
20120217476 | SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - According to one embodiment, a memory device with magnetroresistive effect element is disclosed. The element includes first metal magnetic film (MMF) with nonmagnetic element and axis of easy magnetization perpendicular (EMP), first insulating film, first intermediate magnetic film between the first MMF and the first insulating film, second MMF on the first insulating film and including nonmagnetic elements, the second MMF having axis of EMP, second intermediate magnetic film between the first insulating film and the second MMF, and diffusion preventing film including metal nitride having barrier property against diffusion of the nonmagnetic elements between the first MMF and the first intermediate magnetic film. | 08-30-2012 |
20120241879 | MAGNETIC RANDOM ACCESS MEMORY AND METHOD OF FABRICATING THE SAME - According to one embodiment, a semiconductor device, includes a magneto resistive element including a first magnetic layer, a first interface magnetic layer, a nonmagnetic layer, a second interface magnetic layer and a second magnetic layer as a stacked structure in order; and a metal layer including first metal atoms, second metal atoms and boron atoms, the metal layer being provided at least one region selected from under the first magnetic, between the first magnetic layer and the first interface magnetic layer, between the second interface magnetic layer and the second magnetic layer, and upper the second magnetic layer. | 09-27-2012 |
20120326251 | SEMICONDUCTOR MEMORY DEVICE - According to one embodiment, a semiconductor memory device includes plural magneto-resistance elements being two-dimensionally arrayed on a semiconductor substrate. In the semiconductor memory device, each of the magneto-resistance elements includes: a first magnetic layer formed on the semiconductor substrate; a non-magnetic layer formed on the first magnetic layer; and a second magnetic layer formed on the non-magnetic layer, and an insulating film buried between the magneto-resistance elements adjacent to each other, a powder made of a metallic material or a magnetic material being dispersed in the insulating film. | 12-27-2012 |
20120326252 | SEMICONDUCTOR MEMORY DEVICE - According to one embodiment, a semiconductor memory device includes plural magneto-resistance elements. In the semiconductor memory device, each of the magneto-resistance elements includes: a first magnetic layer formed on a semiconductor substrate, the first magnetic layer having an easy axis of magnetization perpendicular to a film surface thereof; a non-magnetic layer formed on the first magnetic layer; a second magnetic layer formed on the non-magnetic layer, the second magnetic layer having an easy axis of magnetization perpendicular to a film surface thereof; and a sidewall film provided so as to cover a sidewall of each of the magneto-resistance elements with a protective film interposed therebetween, the sidewall film providing a tensile stress to the magneto-resistance element along the easy axis of magnetization. | 12-27-2012 |
20130001715 | MAGNETORESISTIVE ELEMENT AND MANUFACTURING METHOD OF THE SAME - In accordance with an embodiment, a magnetoresistive element includes a lower electrode, a first magnetic layer on the lower electrode, a first interfacial magnetic layer on the first magnetic layer, a nonmagnetic layer on the first interfacial magnetic layer, a second interfacial magnetic layer on the nonmagnetic layer, a second magnetic layer on the second interfacial magnetic layer; and an upper electrode layer on the second magnetic layer. Either the first magnetic and interfacial magnetic layers or the second magnetic and interfacial magnetic layers constitute a storage layer. The other layers of the first magnetic and interfacial magnetic layers and the second magnetic and interfacial magnetic layers constitute a reference layer. The lower electrode includes an alloy layer or mixture layer of a precious metal and a transition element or a rare earth element, or comprises a conductive oxide layer. | 01-03-2013 |
20130001716 | MAGNETORESISTIVE ELEMENT AND MANUFACTURING METHOD OF THE SAME - In accordance with an embodiment, a magnetoresistive element includes a lower electrode, a first magnetic layer on the lower electrode, a first diffusion prevention layer on the first magnetic layer, a first interfacial magnetic layer on the first metal layer, a nonmagnetic layer on the first interfacial magnetic layer, a second interfacial magnetic layer on the nonmagnetic layer, a second diffusion prevention layer on the second interfacial magnetic layer, a second magnetic layer on the second diffusion prevention layer, and an upper electrode layer on the second magnetic layer. The ratio of a crystal-oriented part to the other part in the second interfacial magnetic layer is higher than the ratio of a crystal-oriented part to the other part in the first interfacial magnetic layer. | 01-03-2013 |
20130005148 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - According to one embodiment, a method of manufacturing a semiconductor device, the method includes forming a pillar on a base layer, forming a insulating layer on the base layer to cover the pillar by using GCIB method, where a lowermost portion of an upper surface of the insulating layer is lower than an upper surface of the pillar, and polishing the insulating layer and the pillar to expose a head of the pillar by using CMP method, where an end point of the polishing is the lowermost portion of the upper surface of the insulating layer. | 01-03-2013 |
20130056349 | SPUTTERING TARGET AND METHOD OF MANUFACTURING MAGNETIC MEMORY USING THE SAME - Provided are a sputtering target including a target main body | 03-07-2013 |
20140042568 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - A nonvolatile semiconductor memory device is provided with an MRAM chip including a magnetoresistive effect element having a reference layer whose magnetizing direction is set, a memory layer whose magnetizing direction is variable, and a nonmagnetic layer between these layers, and an enclosure having a thermal insulation area that covers part or the whole of the MRAM chip and prevents thermal fluctuation of the magnetization of the reference layer or memory layer. | 02-13-2014 |
20140070289 | FERROELECTRIC MEMORY AND MANUFACTURING METHOD THEREOF - According to one embodiment, a ferroelectric memory includes a gate insulation film formed on a semiconductor substrate, a ferroelectric film formed on the gate insulation film, and a control electrode formed on the ferroelectric film. The ferroelectric film is a film containing a metal, which is hafnium or zirconium, and oxygen, and contains an element other than the metal at a concentration lower than a concentration of the metal. | 03-13-2014 |
20140070290 | FERROELECTRIC MEMORY AND MANUFACTURING METHOD OF THE SAME - According to one embodiment, a ferroelectric memory includes a semiconductor layer, an interfacial insulating film formed on the semiconductor layer, a ferroelectric film formed on the interfacial insulating film, and a gate electrode formed on the ferroelectric film, wherein the ferroelectric film is a film which includes a metal that is hafnium (Hf) or zirconium (Zr) and oxygen as the main components and to which an element selected from the group consisting of silicon (Si), magnesium (Mg), aluminum (Al). | 03-13-2014 |
20140085971 | MAGNETORESISTIVE EFFECT ELEMENT - According to one embodiment, a magnetoresistive effect element includes the following structure. A first ferromagnetic layer has a variable magnetization direction. A second ferromagnetic layer has an invariable magnetization direction. A tunnel barrier layer is formed between the first and second ferromagnetic layers. An energy barrier between the first ferromagnetic layer and the tunnel barrier layer is higher than an energy barrier between the second ferromagnetic layer and the tunnel barrier layer. The second ferromagnetic layer contains a main component and an additive element. The main component contains at least one of Fe, Co, and Ni. The additive element contains at least one of Mg, Al, Ca, Sc, Ti, V, Mn, Zn, As, Sr, Y, Zr, Nb, Cd, In, Ba, La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, Hf, Ta, and W. | 03-27-2014 |
20140117478 | SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - According to one embodiment, a memory device with magnetroresistive effect element is disclosed. The element includes first metal magnetic film (MMF) with nonmagnetic element and axis of easy magnetization perpendicular (EMP), first insulating film, first intermediate magnetic film between the first MMF and the first insulating film, second MMF on the first insulating film and including nonmagnetic elements, the second MMF having axis of EMP, second intermediate magnetic film between the first insulating film and the second MMF, and diffusion preventing film including metal nitride having barrier property against diffusion of the nonmagnetic elements between the first MMF and the first intermediate magnetic film. | 05-01-2014 |
20140269033 | MAGNETIC MEMORY - According to one embodiment, a magnetic memory includes magnetoresistive effect elements each including a first magnetic layer, a tunnel barrier layer, and a second magnetic layer which are successively stacked, and a ferroelectric capacitor provided above the magnetoresistive effect elements via an insulating layer, and including a lower electrode, a ferroelectric film, and an upper electrode which are successively stacked. | 09-18-2014 |
20140284592 | MAGNETORESISTIVE EFFECT ELEMENT AND MANUFACTURING METHOD THEREOF - According to one embodiment, a magnetoresistive effect element includes a first ferromagnetic layer, a tunnel barrier provided on the first ferromagnetic layer, and a second ferromagnetic layer provided on the tunnel barrier. The tunnel barrier includes a nonmagnetic mixture containing MgO and a metal oxide with a composition which forms, in a solid phase, a single phase with MgO. | 09-25-2014 |
20140284732 | MAGNETORESISTIVE EFFECT ELEMENT AND MANUFACTURING METHOD THEREOF - According to one embodiment, a magnetoresistive effect element includes a first ferromagnetic layer, a tunnel barrier formed on the first ferromagnetic layer, and a second ferromagnetic layer formed on the tunnel barrier layer. The tunnel barrier includes a nonmagnetic oxide having a spinel structure. Oxides forming the spinel structure are combined such that a single phase is formed by a solid phase in a component ratio region including a component ratio corresponding to the spinel structure and having a width of not less than 2%. | 09-25-2014 |