Patent application number | Description | Published |
20140032860 | SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD FOR OPERATING SAME - First data to be written which is output from a function module ( | 01-30-2014 |
20140082427 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MICROCONTROLLER - To have a problem of occurrence of the same failure in failure detection of a microcontroller. A microcontroller has a CPU and a data access control circuit. The data access control circuit performs two types of accesses: an individual access in which a data access of the CPU is performed for each thread, and a shared access in which a data access of the CPU is performed by executing two threads. The data access control circuit detects a failure of the CPU by making a comparison between the command and the address, respectively, in the shared access generated by executing the two threads. | 03-20-2014 |
20140210393 | CAPACITOR PRECHARGE CIRCUIT, MOTOR DRIVE SYSTEM, ELECTRIC POWER STEERING SYSTEM AND AIRBAG SYSTEM - A loss (generation of heat) is reduced in a capacitor precharge circuit, thereby reducing the size of the circuit. | 07-31-2014 |
20140362933 | ELECTRONIC CONTROL DEVICE - By reducing the serial transmission amount of pulses between a driving IC and a control IC, the transmission times of various commands other than the transmission time of the pulses can be secured, so that the improvement of reliability and high performance of the entirety of an electronic control device can be realized. The serial transmission between the driving IC and the control IC is started at the time when the edges of the pulses are detected. | 12-11-2014 |
20150046759 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A micro controller with fault detection function is provided, in which duplex processing by a program is realized without complicating the program. Peripheral circuits are provided with registers and execute processing based on a command. A central processing unit executes twice processing by the same program that accesses the register. A duplex access control circuit is configured with a peripheral bus access unit, a buffer, and a comparator unit. The peripheral bus access unit controls the access to the register by the central processing unit in the first program execution. The buffer stores the access information to the register in the first program execution. The comparator unit compares the access information in the second program execution with the access information stored in the access information storage unit. In the case of disagreement, an error signal is outputted to the central processing unit. | 02-12-2015 |