Kanamitsu, JP
Hideharu Kanamitsu, Nagano JP
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20130063240 | TRANSFORMER - A transformer includes: a core portion, which forms a magnetic circuit; a coil bobbin, which has a winding core portion to be wound by a winding wire, and which is attached on the core portion; a primary winding wire, which has a plurality of first divided winding wire portions divided in parallel; and a secondary winding wire, which has a plurality of second divided winding wire portions divided in parallel, wherein the plurality of first divided winding wire portions and the plurality of second divided winding wire portions are layered on the winding core portion, wherein at least one of the first divided winding wire portions becomes a first layer which is closest to the winding core portion, and at least one of the other of the first divided winding wire portions is interposed between two of the second divided winding wire portions. | 03-14-2013 |
20130162157 | Switching Power Supply Device and Light-Emitting Diode Lighting Device - Implemented are a switching power supply device and a light-emitting diode lighting device in which a variation in load current can be suppressed against a wide range of variation in AC voltage. The configuration of the switching power supply device and the light-emitting diode lighting device includes: a rectifier unit which rectifies AC input voltage and outputs pulsating-current voltage; a power converting unit which receives the pulsating-current voltage and supplies a predetermined load current to a load; a current detecting unit which detects the load current; a drive control unit which controls the power converting unit to regulate the load current to a constant level; and an input voltage detecting unit which detects a variation in the AC input voltage. The drive control unit controls the power converting unit depending on the variation in the AC input voltage detected by the input voltage detecting unit. | 06-27-2013 |
Hideharu Kanamitsu, Fukuroi-Shi JP
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20140292219 | POWER-SUPPLY DEVICE AND ILLUMINATION DEVICE - A power-supply device includes a rectifying unit configured to rectify a phase-controlled AC voltage; a current limiting unit including a current limiting resistor, which limits an input current flowing from the rectifying unit at rise of a rectified voltage outputted from the rectifying unit; and an adjustment unit configured to cause the current limiting unit to limit the input current flowing from the rectifying unit until a predetermined time period has elapsed after an input of the AC voltage to the rectifying unit is started. | 10-02-2014 |
Hiromoto Kanamitsu, Funabashi-Shi JP
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20110317292 | PIEZOELECTRIC ACTUATOR AND LENS BARREL - A piezoelectric actuator includes: a plurality of first piezoelectric elements; a first member that is interposed between opposing faces of the plurality of the first piezoelectric elements and that is driven in a first direction by the plurality of the first piezoelectric elements; a second piezoelectric element that is disposed in the first member; a second member that is disposed in contact with the second piezoelectric element and that is driven in a second direction intersecting the first direction by the second piezoelectric element; and a third member that comes in contact with the second member and that is moved relative to the first member by driving the second member. | 12-29-2011 |
20140104711 | PIEZOELECTRIC ACTUATOR AND LENS BARREL - A piezoelectric actuator includes: a plurality of first piezoelectric elements; a first member that is interposed between the plurality of first piezoelectric elements and that is driven in a first direction by the plurality of first piezoelectric elements; a second piezoelectric element that is disposed on the first member; and a second member that is disposed in contact with the second piezoelectric element and that is driven in a second direction intersecting the first direction by the second piezoelectric element. | 04-17-2014 |
Kenji Kanamitsu, Kanagawa JP
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20120017948 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - Suppressed is damage of a semiconductor wafer due to charging of a cleaning liquid used in a single wafer type wafer cleaning step. | 01-26-2012 |
Kenji Kanamitsu, Tokyo JP
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20100019324 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE - By ion-implanting an inert gas, for example, nitrogen into a polycrystalline silicon film in an nMIS forming region from an upper surface of the polycrystalline silicon film down to a predetermined depth, an upper portion of the polycrystalline silicon film is converted to an amorphous form to form an amorphous/polycrystalline silicon film. And then, an n-type impurity, for example, phosphorous is ion-implanted into the amorphous/polycrystalline silicon film to form an n-type amorphous/polycrystalline silicon film, the n-type amorphous/polycrystalline silicon film is processed to form a gate electrode having a gate length shorter than 0.1 μm, a sidewall formed of an insulating film is formed on a side wall of the gate electrode, and a source/drain diffusion layer is formed. Thereafter, a cobalt silicide (CoSi | 01-28-2010 |
20110237036 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE - By ion-implanting an inert gas, for example, nitrogen into a polycrystalline silicon film in an nMIS forming region from an upper surface of the polycrystalline silicon film down to a predetermined depth, an upper portion of the polycrystalline silicon film is converted to an amorphous form to form an amorphous/polycrystalline silicon film. And then, an n-type impurity, for example, phosphorous is ion-implanted into the amorphous/polycrystalline silicon film to form an n-type amorphous/polycrystalline silicon film, the n-type amorphous/polycrystalline silicon film is processed to form a gate electrode having a gate length shorter than 0.1 μm, a sidewall formed of an insulating film is formed on a side wall of the gate electrode, and a source/drain diffusion layer is formed. Thereafter, a cobalt silicide (CoSi | 09-29-2011 |
Kenji Kanamitsu, Hitachinaka JP
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20080293230 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE - A silicon-rich oxide (SRO) film is arranged over an uppermost third-level wiring in a semiconductor device. Then, a silicon oxide film and a silicon nitride film lying over the third-level wiring are dry-etched to expose part of the third-level wiring to thereby form a bonding pad and to form an opening over the fuse. In this procedure, the SRO film serves as an etch stopper. This optimizes the thickness of the dielectric films lying over the fuse. | 11-27-2008 |
20090029524 | METHOD OF MANUFACTURING A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING A TRENCH - A semiconductor integrated circuit device and a method of manufacturing the same. The surface of a substrate of an active region surrounded by an element isolation trench is horizontally flat in the center portion of the active region but falls toward the side wall of the element isolation trench in the shoulder portion of the active region. This inclined surface contains two inclined surfaces having different inclination angles. The first inclined surface near the center portion of the active region is relatively steep and the second inclined surface near the side wall of the element isolation trench is gentler than the first inclined surface. The surface of the substrate in the shoulder portion of the active region is wholly rounded and has no angular portion. | 01-29-2009 |
Michitaro Kanamitsu, Ome JP
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20080266937 | SEMICONDUCTOR DEVICE - A semiconductor device of the present invention has a memory cell array having plural CMOS static memory cells provided at intersecting portions of plural word lines and plural complementary bit lines. In the memory cell array, a switch MOSFET which is in an OFF state in a first operation mode and in an ON state in a second operation mode different from the first operation mode and first-conductivity-type and second-conductivity-type MOSFETs having a diode configuration are provided in parallel between a first source line to which sources of first-conductivity-type MOSFETs constituting first and second CMOS inverter circuits constituting the plural static memory cells are connected and a first power supply line corresponding to the first source line. A second source line to which sources of the second conductivity-type MOSFETs constituting the first and second CMOS inverter circuits are connected is connected to the second power supply line corresponding thereto. | 10-30-2008 |
Norimasa Kanamitsu, Takarazuka-Shi JP
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20090170835 | ISOINDOLINE DERIVATIVES - Provided is a novel isoindoline compound of the formula (I): | 07-02-2009 |
Shingo Kanamitsu, Kawasaki JP
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20150258226 | SUBSTRATE STORING CASE, SUBSTRATE CLEANING APPARATUS AND SUBSTRATE STORING CASE CLEANING APPARATUS - The substrate storing case includes a base being made of quartz glass, and having a supporting part that is formed on an upper surface thereof and supports a substrate. The substrate storing case includes a top cover being made of quartz glass, and being in contact with the base to cover the substrate on the upper surface of the base. The substrate includes a first absorptive member that absorbs infrared rays and generates heat. The base or the top cover has an intake port that is in communication with a space enclosed by the upper surface of the base and the top cover and is capable of being opened and closed, and an outlet port that is in communication with the space and is capable of being opened and closed. | 09-17-2015 |
Shingo Kanamitsu, Kawasaki-Shi JP
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20090098472 | Pattern Evaluation Method - In a pattern evaluation method of determining whether a pattern formed on a photomask is acceptable, an aberration parameter of an image quality evaluation apparatus for determining a pattern image intensity in transferring a pattern formed on a photomask onto a wafer is acquired. An acceptance criterion value used in determining whether an abnormal pattern of the photomask including the effect of aberration of the image quality evaluation apparatus is acceptable is set through a lithographic simulation using the acquired aberration parameter. Then, using the image quality evaluation apparatus, an image intensity of the abnormal pattern of the photomask and an image intensity of a normal pattern corresponding to the abnormal pattern are obtained. It is determined whether the difference between the two acquired image intensities is within the set acceptance criterion value. | 04-16-2009 |
20100112464 | DEFECT CORRECTION METHOD FOR EUV MASK - According to an aspect of the present invention, there is provided a method for correcting a defect in an EUV mask, the method including: preparing an EUV mask including an absorption layer and an anti-reflection layer forming a pattern; recognizing a defect region in the pattern; defining a first region and a second region on the defect region, the second region extending from a desired pattern edge by a given distance, the first region being defined on the rest; removing the first region of the anti-reflection layer and the absorption layer by irradiating a beam in a first atmosphere; removing the second region of the anti-reflection layer and the absorption layer by irradiating the beam in a second atmosphere; and oxidizing an exposed side surface of the desired pattern edge of the absorption layer. | 05-06-2010 |
20140170565 | PATTERN FORMING METHOD AND METHOD FOR MANUFACTURING TEMPLATE FOR IMPRINT - In one embodiment, a pattern forming method includes irradiating a predetermined region of a mask member, provided on a substrate, with an ion beam to inject ions, forming a self-assembled material layer having a first polymer and a second polymer on the mask member, microphase-separating the self-assembled material layer, to form first polymer section containing the first polymer and second polymer section containing the second polymer, the second polymer section being provided on the predetermined regions, removing one of the first polymer section and the second polymer section and transferring a pattern shape of the other to the mask member, and processing the substrate with the mask member used as a mask. | 06-19-2014 |
Shingo Kanamitsu, Kanagawa JP
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20130244141 | PHOTOMASK AND PATTERN FORMING METHOD - According to one embodiment, a photomask includes a mask substrate transparent to light, a light shielding pattern formed on the mask substrate, and a thin film portion that is provided at a part of the light shielding pattern and is thinned to have a higher light transmittance than the light shielding pattern, in which the thin film portion is arranged with respect to a light shielding pattern that is sensitive to a focus shift so that a sensitivity becomes stable and is not arranged with respect to a light shielding pattern whose sensitivity to a focus shift is stable. | 09-19-2013 |
Shingo Kanamitsu, Kanagawa-Ken JP
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20100051056 | FOREIGN OBJECT REMOVAL METHOD AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A tip of a carbon nanotube is lowered toward a recess where a foreign object exists to cause the tip of the carbon nanotube to contact a bottom face of the recess. Subsequently, the carbon nanotube is further lowered to cause the carbon nanotube to sag, and a side face of the carbon nanotube is pressed against the bottom face of the recess. A force is applied to the foreign object by moving the carbon nanotube on the bottom face of the recess in a state where the side face is pressed against the bottom face of the recess. | 03-04-2010 |
20100092876 | METHOD FOR REPAIRING PHOTO MASK, SYSTEM FOR REPAIRING PHOTO MASK AND PROGRAM FOR REPAIRING PHOTO MASK - There is provided a method for repairing a photo mask in this invention, including, obtaining a first image being a photo mask image including a defect area of the photo mask by a repair apparatus, obtaining a second image being a wafer printing image of the photo mask including the defect area by an inspection apparatus, superimposing the first image and the second image to identify a position of the defect area in the first image, and repairing the defect area by the repair apparatus. | 04-15-2010 |
20100186768 | FOREIGN MATTER REMOVING METHOD FOR LITHOGRAPHIC PLATE AND METHOD FOR MANUFACTURING LITHOGRAPHIC PLATE - A method for removing foreign matter attached to a photomask, includes: irradiating the foreign matter with an electron beam in an etching gas atmosphere in which the foreign matter or a bottom surface of the photomask is etched by irradiation with the electron beam; or irradiating the foreign matter with the electron beam in a deposition gas atmosphere in which a solid material is generated by irradiation with the electron beam to deposit the solid material on the foreign matter, and applying a force to the solid material with an AFM probe. | 07-29-2010 |
20110290134 | IMPRINT MASK, METHOD FOR MANUFACTURING THE SAME, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - According to one embodiment, an imprint mask includes a quartz plate. The quartz plate has a plurality of concave sections formed in part of an upper surface on the quartz plate, and impurities are contained in a portion between the concave sections in the quartz plate. | 12-01-2011 |
20130001753 | TEMPLATE SUBSTRATE AND METHOD FOR MANUFACTURING SAME - According to one embodiment, a template substrate includes a substrate and a mask. The substrate includes a mesa region formed in a central portion of an upper surface of the substrate. The mesa region is configured to protrude more than a region of the substrate around the mesa region. An impurity is introduced into an upper layer portion of a partial region of a peripheral portion of the mesa region. The mask film is provided on the upper surface of the substrate. | 01-03-2013 |
20140256158 | IMPRINT MASK, METHOD FOR MANUFACTURING THE SAME, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - According to one embodiment, an imprint mask includes a quartz plate. The quartz plate has a plurality of concave sections formed in part of an upper surface on the quartz plate, and impurities are contained in a portion between the concave sections in the quartz plate. | 09-11-2014 |
20150072524 | METHOD OF REPAIRING DEFECT AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - According to one embodiment, in a method of repairing a defect on a template substrate for imprint lithography using a charged particle beam, a drift correction mark to correct drift of the charged particle beam is formed on the template substrate. The defect on the template substrate is repaired while correcting the drift of the charged particle beam with reference to the drift correction mark. The drift correction mark is removed. | 03-12-2015 |
20150092045 | Surface State Evaluation Apparatus and Surface State Evaluation Method - According to one embodiment, a surface state evaluation apparatus includes an imaging unit and a processing unit. The imaging unit is configured to image a first region and a second region of a surface of a sample. A plurality of liquid droplets are provided in the first region, and a plurality of liquid droplets are provided in the second region. The processing unit is configured to evaluate a state of the surface based on a result of comparing a first image of the first region imaged by the imaging unit and a second image of the second region imaged by the imaging unit. | 04-02-2015 |
Yasuji Kanamitsu, Nara JP
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20100080979 | POLYPROPYLENE RESIN COMPOSITION EXPANSION-MOLDED ARTICLE USING THE RESIN COMPOSITION, AND PROCESS FOR PRODUCTION OF THE EXPANSION-MOLDED ARTICLE - [Problems] To provide: a polypropylene resin composition which can produce an expansion-molded article showing excellent low-temperature impact properties even when expanded at an increased expansion rate; an expansion-molded article using the polypropylene resin composition, which has excellent low-temperature impact properties, is light in weight, and has good appearance; and a process for producing the expansion-molded article. | 04-01-2010 |