Patent application number | Description | Published |
20100006625 | COMPOSITION AND METHODS OF FORMING SOLDER BUMP AND FLIP CHIP USING THE SAME - Provided are a composition for an anisotropic conductive adhesive, a method of forming a solder bump and a method of forming a flip chip using the same. The composition for an anisotropic conductive adhesive includes a low melting point solder particle and a thermo-curable polymer resin. The anisotropic conductive adhesive includes forming a mixture by mixing a polymer resin and a curing agent, and mixing a deforming agent, a catalyst or a reductant with the mixture. | 01-14-2010 |
20100073238 | MICROSTRIP PATCH ANTENNA WITH HIGH GAIN AND WIDE BAND CHARACTERISTICS - Provided is a microstrip patch antenna. The microstrip patch antenna includes a dielectric layer, a feed circuit disposed in the dielectric layer, at least one slot disposed in the dielectric layer and vertically spaced apart from the feed circuit, and a patch antenna disposed outside the dielectric layer and vertically spaced apart from the at least one slot. | 03-25-2010 |
20110018670 | ELECTRONIC DEVICE INCLUDING LTCC INDUCTOR - Provided is an electronic device that includes an LTCC inductor including a first sheet disposed on a substrate and including a first conductive pattern, a second sheet disposed on the first sheet and including a second conductive pattern, and a via electrically connecting the first conductive pattern to the second conductive pattern, and a spacer disposed on a lower surface of the first sheet to provide an air gap between the substrate and the first sheet, wherein the first conductive pattern is exposed out of the lower surface of the first sheet. | 01-27-2011 |
20110090651 | PACKAGE STRUCTURE - Provided is a package structure. The package structure includes a first substrate, a first device, a second substrate, a first via contact, and at least one second device. The first device is formed on the first substrate. The second substrate has an air gap over the first substrate and covers the first device. The first via contact is connected to the first device through the second substrate. At least one second device is electrically connected to the first via contact, and is stacked on the second substrate. | 04-21-2011 |
20110115036 | DEVICE PACKAGES AND METHODS OF FABRICATING THE SAME - Provided is a method for fabricating a device package. The method includes: preparing a substrate where respectively corresponding device structures and input and output pads are disposed on an active surface; preparing a carrier substrate where a metal lid corresponding to the device structure is disposed on one surface; and contacting the active surface of the substrate with the metal lid of the carrier substrate to cover and seal the device structure corresponding to the metal lid. | 05-19-2011 |
20110227228 | FILLING COMPOSITION, SEMICONDUCTOR DEVICE INCLUDING THE SAME, AND METHOD OF FABRICATING THE SEMICONDUCTOR DEVICE - Provided is a filling composition. The filling composition includes: a first particle including Cu and/or Ag; a second particle electrically connecting the first particles; and a resin containing a high molecular compound, a hardener, and a reducer, in which the first and second particles are dispersed, wherein the hardener includes amine and/or anhydride, and the reducer includes carboxyl. | 09-22-2011 |
20120288983 | METHOD FOR MANUFACTURING DYE SENSITIZED SOLAR CELL MODULE - Disclosed is a method for manufacturing a dye sensitized solar cell module. The method includes putting at least one or more heating-wires on an upper portion of an electrode of each solar cell sub-module; applying a metal paste on the upper portion of the electrode including at least one or more heating-wires; and heating and curing the metal paste by after overlapping the electrodes of a plurality of solar cell sub-modules each other, allowing a current to flow to at least one or more heating-wires. | 11-15-2012 |
Patent application number | Description | Published |
20080285978 | OPTICAL HYBRID MODULE - Provided is an optical hybrid module in which an optical device, a filter, an amplifier and an antenna are hybrid-integrated, which includes: a silicon optical bench disposed on a substrate and having an optical fiber and an optical device; an amplifier disposed on the substrate and connected to the optical device disposed on the silicon optical bench to amplify a signal transmitted from the optical device; and an antenna disposed on the substrate to be connected to the amplifier and transmitting a signal amplified by the amplifier. Thus, a foot-print module may be embodied by disposing an antenna and a filter on a single- or multi-layer substrate and providing a bias required for the optical device and the amplifier through a solder ball. Also, due to the antenna and filter disposed on the substrate, an expensive connector is not needed, and thus a production costs can be reduced. | 11-20-2008 |
20080297299 | VERTICALLY FORMED INDUCTOR AND ELECTRONIC DEVICE HAVING THE SAME - Provided are an inductor, which is vertically formed, and an electronic device having the inductor, and more particularly, an inductor capable of minimizing loss of a surface area and accomplishing high efficiency impedance by vertically forming the inductor in a plurality of insulating layers, and an electronic device having the same. The inductor includes a plurality of conductive lines disposed in the insulating layers; and vias vertically formed in the insulating layers to electrically connect the plurality of conductive lines. When a board or an electronic device including an inductor proposed by the present invention is manufactured, the inductor can occupy a minimum area in the electronic device or board while providing high inductance. In particular, the surface area of the electronic device or board occupied by the inductor can be remarkably decreased to reduce manufacturing costs. | 12-04-2008 |
20090261481 | WAFER LEVEL PACKAGE AND METHOD OF FABRICATING THE SAME - Provided are a wafer level package in which a communication line can be readily formed between an internal device and the outside of the package, and a method of fabricating the wafer level package. The wafer level package includes a first substrate having a cavity in which a first internal device is disposed, an Input/Output (I/O) pad formed on the first substrate and electrically connected with the first internal device, a second substrate disposed over the first substrate and from which a part corresponding to the I/O pad is removed, and a solder bonding the first and second substrates. According to the wafer level package and the method of fabricating the same, upper and lower substrates are sawed to different cutting widths, or a hole is formed in the upper substrate, such that a communication line of an internal device can be readily formed without a via process which penetrates a substrate. Therefore, in comparison with a conventional wafer level package fabricated using the via process, it is possible to simplify a fabrication process and reduce production cost. | 10-22-2009 |
20100320596 | METHOD FOR FABRICATING SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR PACKAGE USING THE SAME - Provided is a method for fabricating semiconductor package and a semiconductor package fabricated using the same. The method for fabricating semiconductor package dopes a mixture including the polymer material and the solder particle on the substrate in which the terminal is formed and applies heat, and thus the solder particle flows (or diffuses) toward the terminal in the heated polymer resin to adhere to the exposed surface of the terminal, i.e., the side surface and upper surface of the terminal, thereby forming the solder layer. The solder layer improves the adhesive strength between the terminal of the semiconductor chip and the terminal of the substrate in the subsequent flip chip bonding process. | 12-23-2010 |
20120154072 | FBAR DUPLEXER MODULE AND FABRICATION METHOD THEREOF - Disclosed is a fabrication method for miniaturizing a film bulk acoustic wave resonator (FBAR) duplexer module including two FBAR filters, a tuning inductor, and a phase shifter. An exemplary embodiment of the present disclosure provides a method of miniaturizing a FBAR duplexer module, including forming a tuning inductor in a multilayer printed circuit board (PCB), forming a phase shifter in the multilayer PCB, and forming at least one of a transmitting FBAR filter and a receiving FBAR filter in the multilayer PCB. | 06-21-2012 |
20120161326 | COMPOSITION FOR FILLING THROUGH SILICON VIA (TSV), TSV FILLING METHOD AND SUBSTRATE INCLUDING TSV PLUG FORMED OF THE COMPOSITION - Provided is a composition for filling a Through Silicon Via (TSV) including: a metal powder; a solder powder; a curable resin; a reducing agent; and a curing agent. A TSV filling method using the composition and a substrate including a TSV plug formed of the composition are also provided. | 06-28-2012 |
20120164787 | VACUUM WAFER LEVEL PACKAGING METHOD FOR MICRO ELECTRO MECHANICAL SYSTEM DEVICE - Disclosed is a vacuum wafer level packaging method for a micro electro mechanical system device, including: forming a plurality of via holes on an upper wafer for protecting a micro electro mechanical system (MEMS) wafer; forming at least one metal layer on inner walls of the plurality of via holes and regions extended from the plurality of via holes; arranging and bonding the upper wafer and the MEMS wafer at atmospheric pressure; applying solder paste to the regions extended from the plurality of via holes; filling a solder in the plurality of via holes by increasing the temperature of a high-vacuum chamber to melt the solder paste; and changing the solder in the plurality of via holes to a solid state by lowering the temperature of the high-vacuum chamber. | 06-28-2012 |
20130146342 | PATTERN-FORMING COMPOSITION AND PATTERN-FORMING METHOD USING THE SAME - The present invention relates to a pattern-forming composition used to form a conductive circuit pattern. The pattern-forming composition comprises Cu powders, a solder for electrically coupling the Cu powders, a polymer resin, a curing agent and a reductant. According to the present invention, a circuit pattern having superior conductivity can be formed at low cost. | 06-13-2013 |
Patent application number | Description | Published |
20120153778 | PIEZOELECTRIC MICRO ENERGY HARVESTER AND MANUFACTURING METHOD THEREOF - Disclosed is a piezoelectric micro energy harvester and manufacturing method thereof, the method including: forming an insulation film on a substrate; patterning the insulation film and forming an electrode pad pattern, a center electrode pattern, and a side electrode pattern; forming an open cavity at an inside of the substrate for suspension of the center electrode pattern and the side electrode pattern; disposing a conductive film on the electrode pad pattern, the center electrode pattern, and the side electrode pattern and forming electrode pads, a center electrode, and a side electrode; and forming a piezoelectric film so as to cover a space between the center electrode and the side electrode and upper surfaces of the center electrode and the side electrode. | 06-21-2012 |
20140054262 | PIEZOELECTRIC MICRO ENERGY HARVESTER AND MANUFACTURING METHOD THEREOF - Disclosed is a piezoelectric micro energy harvester and manufacturing method thereof, the method including: forming an insulation film on a substrate; patterning the insulation film and forming an electrode pad pattern, a center electrode pattern, and a side electrode pattern; forming an open cavity at an inside of the substrate for suspension of the center electrode pattern and the side electrode pattern; disposing a conductive film on the electrode pad pattern, the center electrode pattern, and the side electrode pattern and forming electrode pads, a center electrode, and a side electrode; and forming a piezoelectric film so as to cover a space between the center electrode and the side electrode and upper surfaces of the center electrode and the side electrode. | 02-27-2014 |
Patent application number | Description | Published |
20120222738 | CONDUCTIVE COMPOSITION, SILICON SOLAR CELL INCLUDING THE SAME, AND MANUFACTURING METHOD THEREOF - A conductive composition for a front electrode busbar of a silicon solar cell includes a metallic powder, a solder powder, a curable resin, a reducing agent, and a curing agent. A method of manufacturing a front electrode busbar of a silicon solar cell includes applying the composition to the front surface of the silicon solar cell wherein its front electrode finger line is formed. A substrate includes a front electrode busbar of a silicon solar cell, formed with a conductive composition. A silicon solar cell includes one or more electrodes containing a conductive composition including a conductive powder, a curable resin, a reducing agent, and a curing agent. A method of manufacturing the silicon solar cell includes forming a first electrode array with a first conductive composition, forming a second electrode, and forming a third electrode with a third conductive composition. | 09-06-2012 |
20130074918 | VACUUM WINDOW GLAZING INCLUDING SOLAR CELL AND MANUFACTURING METHOD THEREOF - Disclosed are vacuum window glazing including a solar cell function and a manufacturing method thereof. The vacuum window glazing includes a first sheet glass, a second sheet glass that is vacuum-bonded to the first sheet glass; a vacuum layer that is formed between the first sheet glass and the second sheet glass; and a solar cell panel that is formed on a surface of the second sheet glass in a direction of the vacuum layer. By this configuration, power can be produced through the solar cell formed within the vacuum window glazing while more increasing the heat insulation effect of the vacuum window glazing, and the cooling and heating efficiency of the building can be greatly improved using the outer wall covered with glass. | 03-28-2013 |
20130087884 | SILICON INTERPOSER INCLUDING BACKSIDE INDUCTOR - Disclosed is a silicon interposer that can reduce the entire area of a semiconductor package and increase the degree of integration by forming inductors at a lower part in addition to an upper part of a silicon substrate. The silicon interposer includes a silicon substrate, an upper inductor layer formed at the upper part of the silicon substrate and a lower inductor layer formed at the lower part of the silicon substrate. | 04-11-2013 |
20130200135 | COMPOSITION AND METHODS OF FORMING SOLDER BUMP AND FLIP CHIP USING THE SAME - Provided are a composition for an anisotropic conductive adhesive, a method of forming a solder bump and a method of forming a flip chip using the same. The composition for an anisotropic conductive adhesive includes a low melting point solder particle and a thermo-curable polymer resin. The anisotropic conductive adhesive includes forming a mixture by mixing a polymer resin and a curing agent, and mixing a deforming agent, a catalyst or a reductant with the mixture. | 08-08-2013 |
20140317915 | COMPOSITION AND METHODS OF FORMING SOLDER BUMP AND FLIP CHIP USING THE SAME - Provided are a composition for an anisotropic conductive adhesive, a method of forming a solder bump and a method of forming a flip chip using the same. The composition for an anisotropic conductive adhesive includes a low melting point solder particle and a thermo-curable polymer resin. The anisotropic conductive adhesive includes forming a mixture by mixing a polymer resin and a curing agent, and mixing a deforming agent, a catalyst or a reductant with the mixture. | 10-30-2014 |
20140317918 | COMPOSITION AND METHODS OF FORMING SOLDER BUMP AND FLIP CHIP USING THE SAME - Provided are a composition for an anisotropic conductive adhesive, a method of forming a solder bump and a method of forming a flip chip using the same. The composition for an anisotropic conductive adhesive includes a low melting point solder particle and a thermo-curable polymer resin. The anisotropic conductive adhesive includes forming a mixture by mixing a polymer resin and a curing agent, and mixing a deforming agent, a catalyst or a reductant with the mixture. | 10-30-2014 |
20140318615 | CONDUCTIVE COMPOSITION, SILICON SOLAR CELL INCLUDING THE SAME, AND MANUFACTURING METHOD THEREOF - A conductive composition for a front electrode busbar of a silicon solar cell includes a metallic powder, a solder powder, a curable resin, a reducing agent, and a curing agent. A method of manufacturing a front electrode busbar of a silicon solar cell includes applying the composition to the front surface of the silicon solar cell wherein its front electrode finger line is formed. A substrate includes a front electrode busbar of a silicon solar cell, formed with a conductive composition. A silicon solar cell includes one or more electrodes containing a conductive composition including a conductive powder, a curable resin, a reducing agent, and a curing agent. A method of manufacturing the silicon solar cell includes forming a first electrode array with a first conductive composition, forming a second electrode, and forming a third electrode with a third conductive composition. | 10-30-2014 |