Patent application number | Description | Published |
20080204388 | Liquid crystal display device having time controller and source driver - A liquid crystal display (LCD) apparatus includes a time controller and a plurality of source drivers. The time controller may receive first data, and output a plurality of clock signals and a plurality of pieces of second data to display the first data. The plurality of source drivers may receive the plurality of pieces of second data and the plurality of clock signals from the time controller, convert the plurality of pieces of second data to a plurality of pieces of analog data, and output the plurality of pieces of analog data to a display panel. The time controller may be connected to the plurality of source drivers in a point-to-point fashion. The second data have a packet data format. | 08-28-2008 |
20080204444 | TIMING CONTROLLER TO REDUCE FLICKER AND METHOD OF OPERATING DISPLAY DEVICE INCLUDING THE SAME - A timing controller to reduce a flicker in a display device is provided. The timing controller includes a line pattern detector and a frame pattern detector. The line pattern detector divides received data into a plurality of unit blocks and detects a line polarity of each of a plurality of horizontal lines included in each of the unit blocks. The frame pattern detector generates a polarity control signal to control a data inversion method based on a frame image pattern detected based on line polarities of the respective horizontal lines. | 08-28-2008 |
20080224976 | Method and apparatus for temporally/spatially randomly dithering and liquid crystal display using the same - A method of temporally and/or spatially randomly dithering, to facilitate converting an input M-bit subpixel signal into an (M−N)-bit subpixel signal, may include spatially and/or temporally randomly generating a dithering mask pattern satisfying a condition that a spatial mean and/or a temporal mean of an image signal before dithering matches a spatial mean and/or a temporal mean of the image signal after dithering, respectively, and converting the M-bit subpixel signal into the (M−N)-bit subpixel signal using the dithering mask pattern. | 09-18-2008 |
20080224983 | METHOD OF COMPENSATING FOR KICK-BACK VOLTAGE AND LIQUID CRYSTAL DISPLAY USING THE SAME - A method and apparatus of compensating for a kick-back voltage to reduce the generation of flicker in a liquid crystal display (LCD). The method of compensating for a kick-back voltage includes correcting input pixel data using a kick-back correction function that meets a condition on which a response characteristic of a voltage detected from a pixel electrode of a liquid crystal cell for a positive input pixel signal and a response characteristic of a voltage detected from the pixel electrode of the liquid crystal cell for a negative input pixel signal become symmetrical without causing a saturation state on a basis of a kick-back voltage measured from an LCD panel to generate corrected pixel data, and driving the LCD panel using the corrected pixel data. | 09-18-2008 |
20080225054 | DITHERING SYSTEM AND METHOD FOR USE IN IMAGE PROCESSING - A dithering system includes a linear transformer, a dither data generator, an adder and a shifter. The transformer linearly transforms M bit input data using a linear function having a predetermined gradient in order to generate and output M bit transform data. The dither data generator generates and outputs M−N bit dither data. The adder adds the M bit transform data and the M−N bit dither data to generate and output M bit correction data. The shifter cuts off the bottom M−N bits of the M bit correction data in order to generate and output the N bit output data. The dithering system and associated dithering method widely disperses an error generated due to a physical limit of a data bit that can be expressed by a low gray scale system throughout the entirety of the gray scales when high gray scale image data is converted to low gray scale image data. This is done without using a lookup table which avoids using valuable chip area. In addition, by utilizing a plurality of adders and shifters rather than a multiplier and divider, the number of required logic gates is remarkably reduced as well as reducing associated power requirements. | 09-18-2008 |
20080297390 | Digital-to-analog converter and method thereof - An integrated circuit may include an operation amplifier, a first capacitor, a plurality of second capacitors, and/or a switching circuit. The operational amplifier may have a first input terminal, a second input terminal, and/or an output terminal. The first capacitor may have a first terminal and a second terminal. The second terminal of the first capacitor may be connected to the first input terminal of the operational amplifier. The plurality of second capacitors may each have a first terminal and a second terminal. The second terminal of each of the second capacitors may be connected to the second input terminal of the operational amplifier. The switching circuit may include a plurality of switches configured to switch in response to a plurality of switching signals. The switching circuit may be configured to transmit a reference voltage to the first terminal of the first capacitor and the first terminals of the second capacitors and/or connect the first input terminal of the operational amplifier to the output terminal of the operational amplifier during a first period. The switching circuit maybe configured to isolate the first terminal of the first capacitor from the reference voltage, transmit a voltage selected from at least two selection voltages to the first terminals of the second capacitors, and/or connect the first terminal of the first capacitor to the output terminal of the operational amplifier during a second period. | 12-04-2008 |
20090085846 | IMAGE PROCESSING DEVICE AND METHOD PERFORMING MOTION COMPENSATION USING MOTION ESTIMATION - An image processing device is provided. The image processing device includes a calculator and a controller. The calculator performs a block matching algorithm based on a difference between first image data of a macroblock and second image data of each of a plurality of blocks in a search range. The controller generates a motion vector used for motion compensation based on a result of the block matching algorithm and alternately changes a scan direction of the second image data at an interval of one horizontal period in a frame. The image processing device shares the second image data, which is repeatedly used during the block matching algorithm, in a horizontal direction. | 04-02-2009 |
20090128584 | Apparatuses and methods for converting sub-pixel data using pipe-lined dithering modules - A sub-pixel data conversion apparatus may include: a gamma correction block that converts input sub-pixel data to first sub-pixel data; and a dithering process block that generates a first dithering mask pattern and that performs a first dithering operation on the first sub-pixel data to a second sub-pixel data based on the generated first dithering mask pattern. A sub-pixel data gamma correction method may include setting error data for gamma correction on sub-pixel data and extracting error data corresponding to input sub-pixel data, adding the extracted error data and the input sub-pixel data, and converting the input sub-pixel data to first sub-pixel data based on a result of the addition. A sub-pixel data dithering method may include: generating a first dithering mask pattern and performing a first dithering operation; and generating a second dithering mask pattern and performing a second dithering operation. | 05-21-2009 |
20090207118 | DATA DRIVING UNIT AND LIQUID CRYSTAL DISPLAY - A data driving unit and a liquid crystal display (LCD) are provided. The data driving unit includes a first buffer, a second buffer, a charge sharing switch connected between an output terminal of the first buffer and an output terminal of the second buffer, and a controller configured to compare a previous line-time data pattern with a current line-time data pattern and generate a control signal for controlling a switching operation of the charge sharing switch according to a comparison result. | 08-20-2009 |
20090252230 | Motion estimation device and video encoding device including the same - In a motion estimation device and a video encoding device including the same, a motion estimation device provides a motion vector by performing a motion estimation algorithm, and includes a motion estimation unit including a plurality of processing elements that perform a calculating operation on pixel data of a block of a current frame and reference data in a search area of a reference frame and that output a plurality of operation results on a plurality of candidate blocks in the search area, in parallel; and a comparison and selection unit that compares the operation results provided from the motion estimation unit to each other, and that generates and outputs a motion vector corresponding to the block of the current frame. | 10-08-2009 |
20100238186 | Display Controllers Including Memory Controllers - A display controller is provided. The display controller includes an external memory and a timing controller which compresses current frame data to generate front first in-first out (FIFO) input data, temporarily stores the front FIFO input data and writes the front FIFO input data to the external memory in a burst mode, and reads data from the external memory in the burst mode, temporarily stores the read data as back FIFO output data, and decodes the back FIFO output data to output previous frame data. | 09-23-2010 |
20120127214 | LIGHT EMITTING DIODE DRIVING CIRCUIT, AND DISPLAY DEVICE HAVING THE SAME - A light-emitting-diode (LED) driving circuit and a display device include a current driving circuit, a level detector, a comparing circuit, a digital control circuit, and a power supply circuit. The level detector detects a minimum detection voltage signal having a minimum voltage level among voltage signals of first terminals of respective LED strings. The comparing circuit generates a first comparison output signal and a second comparison output signal based on a headroom-control reference voltage and the minimum detection voltage signal. The digital control circuit adjusts a duty ratio of a gate control signal in a digital mode based on the first comparison output signal, the second comparison output signal and a control clock signal. Therefore, the LED driving circuit has a small area in a semiconductor integrated circuit. | 05-24-2012 |
20120299974 | TIMING CONTROLLER AND A DISPLAY DEVICE INCLUDING THE SAME - A timing controller that includes a noise detection circuit and a setting control unit. The noise detection circuit includes a detection unit and a reset signal generating unit. The detection unit outputs a detection signal having a first logic level based on at least one of a plurality of reference data toggling asynchronous with a clock signal. The reset signal generating unit outputs a reset signal having a second logic level based on the detection signal. The setting control unit stores setting data and initializes the setting data in response to the reset signal having the first logic level, and the setting data are used to process red, green and blue (RGB) image data. | 11-29-2012 |
20130057763 | DISPLAY DRIVER, OPERATING METHOD THEREOF, HOST FOR CONTROLLING THE DISPLAY DRIVER, AND SYSTEM HAVING THE DISPLAY DRIVER AND THE HOST - An operation method of a display driver includes generating a count value by counting a period of a synchronization signal related to a synchronization packet received from a host, receiving a mode change command from the host, the mode change command indicating a change from a video mode transmitting first image data to a display by bypassing a frame memory to a command mode transmitting second image data to the display through the frame memory, and generating an internal synchronization signal having a period substantially equal to the period of the synchronization signal by using the count value based on the mode change command after a last pulse of the synchronization signal is generated. A time interval between the last pulse and a first pulse of the internal synchronization signal is equal to the period of the synchronization signal. | 03-07-2013 |
20150016748 | Image Processing Apparatus, Image Processing System, and Image Processing Method - Image processing apparatus, an image processing system, and an image processing method. The image processing apparatus includes: an input image processing unit for outputting global information of sample data obtained by sampling first image data and dividing and outputting the first image data into an N (where N is a positive integer equal to or greater than 2) number of split image data; and a frame rate conversion unit including an N number of frame rate converters, wherein each of the N number of frame rate converters converts a frame rate of corresponding split image data among the N number of split image data synchronized with the global information and outputs the frame rate converted split image data as split display data, wherein the split display data is to be displayed on one of an N number of display regions. | 01-15-2015 |
20150029201 | DISPLAY DRIVER, OPERATING METHOD THEREOF, HOST FOR CONTROLLING THE DISPLAY DRIVER, AND SYSTEM HAVING THE DISPLAY DRIVER AND THE HOST - An operation method of a display driver includes generating a count value by counting a period of a synchronization signal related to a synchronization packet received from a host, receiving a mode change command from the host, the mode change command indicating a change from a video mode transmitting first image data to a display by bypassing a frame memory to a command mode transmitting second image data to the display through the frame memory, and generating an internal synchronization signal having a period substantially equal to the period of the synchronization signal by using the count value based on the mode change command after a last pulse of the synchronization signal is generated. A time interval between the last pulse and a first pulse of the internal synchronization signal is equal to the period of the synchronization signal. | 01-29-2015 |