| Patent application number | Description | Published |
|---|
| 20120284218 | NEURON DEVICE AND NEURAL NETWORK - A neuron device includes a bottom electrode, a top electrode, and a layer of metal oxide variable resistance material sandwiched between the bottom electrode and the top electrode, in which the neuron device is switched to a normal state upon application of reset pulse, and is switched to an excitation state upon application of stimulus pulses. The neuron device has a comprehensive response to different amplitude, different width of a stimulus voltage pulse and different number of a sequence of stimulus pulses, and provides functionalities of a weighting section and a computing section. The neuron device has a simple structure, excellent scalability, quick speed, low operation voltage, and is compatible with the conventional silicon-based CMOS fabrication process, and thus suitable for mass production. The neuron device is capable of performing many biological functions and complex logic operations. | 11-08-2012 |
| 20120298199 | SOLAR CELL AND MANUFACTURING METHOD THEREOF - A solar cell includes a cathode component, an anode component, sealant for assembling the cathode component and the anode component to form a closed space, and electrolyte accommodated in the closed space, in which the cathode component contains a lower transparent conductive substrate, a nano-oxide semiconductor thin film formed on the lower transparent conductive substrate, and dye attached to a nano-particle surface of the nano-oxide semiconductor thin film; and the anode component contains an upper transparent conductive substrate, and an anode electrode layer formed on the upper transparent conductive substrate, the nano-oxide semiconductor thin film and the anode electrode layer being arranged opposite to each other and contacting with the electrolyte, in which the anode component further contains a CdTe layer which is patterned to have an opening, and the anode electrode layer is located in the opening of the CdTe layer. | 11-29-2012 |
| 20120299608 | METHOD OF TESTING RELIABILITY OF SEMICONDUCTOR DEVICE - The invention provides a method of testing reliability of a semiconductor device, wherein the semiconductor device has negative bias temperature instability NBTI. The method comprises steps of: measuring a NBTI curve of a first set of semiconductor devices; measuring 1/f noise power spectrum density and drain current at a predetermined frequency for the first set of the semiconductor devices, under a condition that the first set of the semiconductor devices are biased at a gate electric field; measuring an equivalent oxide thickness EOT of gate dielectric of the first set of the semiconductor devices; measuring 1/f noise power spectrum density and drain current at the predetermined frequency for a second set of semiconductor devices, under a condition that the second set of the semiconductor devices are biased at the gate electric field; measuring an EOT of gate dielectric of the second set of the semiconductor devices; and evaluating a degradation characteristic of the second set of the semiconductor devices by using the NBTI curve of a first set of the semiconductor devices. The method saves the time required for testing the reliability of a large numbers of semiconductor devices, and will not cause damages to the second set of semiconductor devices. | 11-29-2012 |
| 20130033922 | RESISTIVE-SWITCHING DEVICE CAPABLE OF IMPLEMENTING MULTIARY ADDITION OPERATION AND METHOD FOR MULTIARY ADDITION OPERATION - The present disclosure provides a resistive-switching device capable of implementing multiary addition operation and a method for implementing multiary addition operation using the resistive-switching device. The resistive-switching device has a plurality of resistance values each corresponding to a respective data value stored by the resistive-switching device and ranging from a high resistance value to a low resistance value. The data value stored by the resistive-switching device is increased by ‘1’ successively with a series of set pulses having a same pulse width and a same voltage amplitude being applied thereto. The data value stored by the resistive-switching device is set to ‘0’ with a reset pulse being applied thereto, and meanwhile a data value stored by a higher-bit resistive-switching device is increased by ‘1’ with a set pulse being applied thereto. In this way, multiary addition operation is implemented. The operation of the resistive-switching device can implement data storage and the multiary addition operation simultaneously, and thus substantially simplifies the circuit structure. As a result, the data storage can be integrated with calculation. | 02-07-2013 |
| 20130094281 | METHOD FOR MEASURING DATA RETENTION CHARACTERISTIC OF RESISTIVE RANDOM ACCESS MEMORY DEVICE - A method for measuring data retention characteristic of an RRAM device includes: a) controlling a temperature of a sample stage to maintain the RRAM device at a predetermined temperature; b) setting the RRAM device to a high-resistance state or a low-resistance state; c) measuring data retention time by applying a predetermined voltage to the RRAM device so that a resistive state failure of the RRAM device occurs; d) repeating the steps a)-c) to perform a plurality of measurements; e) calculating a resistive state failure probability F(t) of the RRAM device from the data retention time in the plurality of measurements; and f) fitting the resistive state failure probability F(t), and calculating predicted data retention time t | 04-18-2013 |
| 20130119337 | RESISTIVE-SWITCHING DEVICE CAPABLE OF IMPLEMENTING MULTIARY ADDITION OPERATION AND METHOD FOR MULTIARY ADDITION OPERATION - A resistive-switching random access memory device includes a memory cell disposed between a bit line and a word line, the memory cell having a resistive-switching element ( | 05-16-2013 |
| 20130128653 | RESISTIVE RADOM ACCESS MEMORY DEVICE, METHOD FOR MANUFACTURING THE SAME, AND METHOD FOR OPERATING THE SAME - A resistive random access memory device, a method for manufacturing the resistive random access memory device, and a method for operating the resistive random access memory device are disclosed. The resistive random access memory device includes a resistive switching memory element including two electrodes and a layer of variable-resistance material between the two electrodes, wherein the layer of variable-resistance material exhibits bipolar resistive switching behavior; and a Schottky diode including a metal layer and a p-doped semiconductor layer which contact each other, wherein the metal layer of the Schottky diode is coupled to one of the two electrodes of the resistive switching memory element. The present disclosure provides the resistive random access memory device operating in bipolar resistive switching scheme. | 05-23-2013 |
| 20140347913 | RESISTIVE SWITCHING MEMORY DEVICE AND METHOD FOR OPERATING THE SAME - A resistive switching memory device and a method for operating the same are disclosed. The device includes a plurality of resistive switching memory units arranged in a matrix, each of which includes a switching element and a resistive switching device, and the switching element being connected to a word line at its control terminal, to the resistive switching device at one terminal, and to a bit line at the other terminal; a word line decoder adapted to decode an input address signal to switch on the switching element in at least one of resistive switching memory units; and a driving circuit adapted to apply a voltage pulse whose front edge changes slowly across the resistive switching device by the bit line synchronously with the switching-on of the switching element. Using the scheme of the above embodiments, the durability characteristic of the resistive switching device can be improved, such as degradation of high-low resistance value window and the failure of the device with transition times can be reduced. | 11-27-2014 |
