Patent application number | Description | Published |
20080224677 | DEAD TIME TRIMMING IN A CO-PACKAGE DEVICE - A method of obtaining an optimized dead time for a synchronous switching power supply comprising a control IC and two series-connected switches, comprising packaging the control IC and the series-connected switches in a co-packaged module; providing a dead time delay circuit within the control IC circuit which has variable dead time; testing the switching power supply; varying the dead time in a defined sequence during the step of testing; monitoring a parameter during testing of the switching power supply as the dead time is varied; determining an optimal dead time based upon monitoring the parameter; and setting the dead time at the optimal dead time. | 09-18-2008 |
20080265851 | POWER SWITCH-MODE CIRCUIT WITH DEVICES OF DIFFERENT THRESHOLD VOLTAGES - The high side or low side FET of a buck converter, or both, are replaced by plural parallel devices of different threshold voltage and are turned on and off in a sequence which offers the best turn on and turn off characteristics related to high and low threshold voltages. The parallel devices can have the same or different active areas. | 10-30-2008 |
20080298101 | INTELLIGENT DEAD TIME CONTROL - A circuit for reducing switching losses in a synchronous rectifier of a switching stage including a high-side control transistor and a low-side synchronous transistor coupled at a switching node, the switching stage receiving an input voltage and providing a controlled output voltage at an output node. The circuit including a first circuit portion for sensing waveshape edges of a first signal at a gate terminal of the low-side synchronous transistor and a first voltage to determine a delay between the waveshape edge of the first signal and the waveshape edge of the first voltage; and a second circuit portion for calibrating the first signal and the first voltage to align the waveshape edge of the first signal and the waveshape edge of the first voltage, with an optional offset to achieve minimal power loss. | 12-04-2008 |
20090051225 | GATE DRIVING SCHEME FOR DEPLETION MODE DEVICES IN BUCK CONVERTERS - A circuit for driving a switching stage including control and sync switches series connected at a switching node, at least one of the control and sync switches being a normal ON depletion mode device, the circuit comprising a gate driver including first and second switching stages for generating gate drive signals for the sync and control switches, respectively, the first switching stage having a first driver output node and the second switching stage having a second driver output node, a signal from the first node driving the sync switch and a signal from the second node driving the control switch and a circuit connected to the first and second switching stages, the circuit including a first circuit providing a first voltage source, the first circuit being coupled to the first switching stage and to the sync switch, a first bias voltage from the first voltage source being switched by the first switching stage, the first switching stage having a first state wherein the sync switch is on, and a second state wherein the first bias voltage is switched to the gate of the sync switch to turn the sync switch off and a second circuit including a first energy storage device for charging with a second bias voltage, the second switching circuit having a first state, wherein the control switch is on when the sync switch is off and having a second state wherein the control switch is switched off when the sync switch is on by switching the second bias voltage to the gate of the control switch. | 02-26-2009 |
20090096289 | INTERPOSER FOR AN INTEGRATED DC-DC CONVERTER - An interposer electrical interface for placing a DC-DC converter in close proximity with an IC powered by the converter, the DC-DC converter including at least one switching node power supply stage, the at least one switching node power supply stage providing regulated power to the IC, the close proximity of the DC-DC converter and IC allowing for high efficiency in provision of the regulated power from the DC-DC converter to the IC, the interposer electrical interface comprising at least one electrical energy storage element. | 04-16-2009 |
20090278513 | Enhancement mode III-nitride switch with increased efficiency and operating frequency - According to one exemplary embodiment, an efficient and high speed E-mode III-N/Schottky switch includes a silicon transistor coupled with a D-mode III-nitride device, where the silicon transistor causes the D-mode III-nitride device to operate in an enhancement mode. The E-mode III-N/Schottky switch further includes a Schottky diode coupled across the silicon transistor so as to improve efficiency, recovery time, and speed of the E-mode III-N/Schottky switch. An anode of the Schottky diode can be coupled to a source of the silicon transistor and a cathode of the Schottky diode can be coupled to a drain of the silicon transistor. The Schottky diode can be integrated with the silicon transistor. In one embodiment the III-nitride device is a GaN device. | 11-12-2009 |
20110074375 | Gate Driver in Buck Converters - A circuit for driving a switching stage including control and sync switches series connected at a switching node, at least one of the control and sync switches being a normal ON depletion mode device, the circuit comprising a gate driver including first and second switching stages for generating gate drive signals for the sync and control switches, respectively, the first switching stage having a first driver output node and the second switching stage having a second driver output node, a signal from the first node driving the sync switch and a signal from the second node driving the control switch and a circuit connected to the first and second switching stages, the circuit including a first circuit providing a first voltage source, the first circuit being coupled to the first switching stage and to the sync switch, a first bias voltage from the first voltage source being switched by the first switching stage, the first switching stage having a first state wherein the sync switch is on, and a second state wherein the first bias voltage is switched to the gate of the sync switch to turn the sync switch off and a second circuit including a first energy storage device for charging with a second bias voltage, the second switching circuit having a first state, wherein the control switch is on when the sync switch is off and having a second state wherein the control switch is switched off when the sync switch is on by switching the second bias voltage to the gate of the control switch. | 03-31-2011 |
20110284862 | III-nitride switching device with an emulated diode - Some exemplary embodiments of a III-nitride switching device with an emulated diode have been disclosed. One exemplary embodiment comprises a GaN switching device fabricated on a substrate comprising a high threshold GaN transistor coupled across a low threshold GaN transistor, wherein a gate and a source of the low threshold GaN transistor are shorted with an interconnect metal to function as a parallel diode in a reverse mode. The high threshold GaN transistor is configured to provide noise immunity for the GaN switching device when in a forward mode. The high threshold GaN transistor and the low threshold GaN transistor are typically fabricated on the same substrate, and with significantly different thresholds. As a result, the superior switching characteristics of III-nitride devices may be leveraged while retaining the functionality and the monolithic structure of the inherent body diode in traditional silicon FETs. | 11-24-2011 |
20120062199 | III-Nitride Power Converter Circuit - An integrated circuit that includes a power stage and a driver stage, all stages using III-nitride power devices. | 03-15-2012 |
20120062281 | Power Converter with Split Power Supply - A power converter driver that is supplied with two different voltages. | 03-15-2012 |
20120223321 | III-Nitride Transistor Stacked with FET in a Package - One exemplary disclosed embodiment comprises a three-terminal stacked-die package including a field effect transistor (FET), such as a silicon FET, stacked atop a III-nitride transistor, such that a drain of the FET resides on and is electrically coupled to a source of the III-nitride transistor. A first terminal of the package is coupled to a gate of the FET, a second terminal of the package is coupled to a drain of the III-nitride transistor. A third terminal of the package is coupled to a source of the FET. In this manner, devices such as cascoded switches may be packaged in a stacked-die form, resulting in reduced parasitic inductance and resistance, improved thermal dissipation, smaller form factor, and lower manufacturing cost compared to conventional packages. | 09-06-2012 |
20120223322 | III-Nitride Transistor Stacked with Diode in a Package - One exemplary disclosed embodiment comprises a two-terminal stacked-die package including a diode, such as a silicon diode, stacked atop a III-nitride transistor, such that a cathode of the diode resides on and is electrically coupled to a source of the III-nitride transistor. A first terminal of the package is coupled to a drain of the III-nitride transistor, and a second terminal of the package is coupled to an anode of the diode. In this manner, devices such as cascoded rectifiers may be packaged in a stacked-die form, resulting in reduced parasitic inductance and resistance, improved thermal dissipation, smaller form factor, and lower manufacturing cost compared to conventional packages. | 09-06-2012 |
20120241756 | High Voltage Composite Semiconductor Device with Protection for a Low Voltage Device - There are disclosed herein various implementations of composite semiconductor devices including a voltage protected device. In one exemplary implementation, a normally OFF composite semiconductor device comprises a normally ON III-nitride power transistor having a first output capacitance, and a low voltage (LV) device cascoded with the normally ON III-nitride power transistor to form the normally OFF composite semiconductor device, the LV device having a second output capacitance. A ratio of the first output capacitance to the second output capacitance is set based on a ratio of a drain voltage of the normally ON III-nitride power transistor to a breakdown voltage of the LV device so as to provide voltage protection for the LV device. | 09-27-2012 |
20120241819 | Composite Semiconductor Device with Turn-On Prevention Control - There are disclosed herein various implementations of composite III-nitride semiconductor devices having turn-on prevention control. In one exemplary implementation, a normally OFF composite semiconductor device comprises a normally ON III-nitride power transistor and a low voltage (LV) device cascoded with the normally ON III-nitride power transistor to form the normally OFF composite semiconductor device. The LV device is configured to have a noise-resistant threshold voltage to provide the turn-on prevention control for the normally OFF composite semiconductor device by preventing noise current from flowing through a channel of the normally ON III-nitride power transistor in a noisy system. | 09-27-2012 |
20130234208 | Composite Semiconductor Device with Active Oscillation Prevention - There are disclosed herein various implementations of composite semiconductor devices with active oscillation control. In one exemplary implementation, a normally OFF composite semiconductor device comprises a normally ON III-nitride power transistor and a low voltage (LV) device cascoded with the normally ON III-nitride power transistor to form the normally OFF composite semiconductor device. The LV device may be configured to include one or both of a reduced output resistance due to, for example, a modified body implant and a reduced transconductance due to, for example, a modified oxide thickness to cause a gain of the composite semiconductor device to be less than approximately 10,000. | 09-12-2013 |
20140192441 | DC/DC Converter with III-Nitride Switches - Disclosed is a buck converter for converting a high voltage at the input of the buck converter to a low voltage at the output of the buck converter. The buck converter includes a control circuitry configured to control a duty cycle of a control switch, the control switch being interposed between the input and the output of the buck converter. | 07-10-2014 |
20140312429 | Power Semiconductor Device with Oscillation Prevention - There are disclosed herein various implementations of composite semiconductor devices with active oscillation control. In one exemplary implementation, a normally OFF composite semiconductor device comprises a normally ON III-nitride power transistor and a low voltage (LV) device cascoded with the normally ON III-nitride power transistor to form the normally OFF composite semiconductor device. The LV device may be configured to include one or both of a reduced output resistance due to, for example, a modified body implant and a reduced transconductance due to, for example, a modified oxide thickness to cause a gain of the composite semiconductor device to be less than approximately 10,000. | 10-23-2014 |