Patent application number | Description | Published |
20110082427 | BIORESORBABLE EMBOLIZATION MICROSPHERES - The present disclosure is generally directed to an embolic material which, in some embodiments, may be in the form of a microsphere or a plurality of microspheres. The embolic material generally comprises carboxymethyl chitosan (CCN) crosslinked with carboxymethyl cellulose (CMC). In some embodiments, the embolic material may further comprise a therapeutic agent, such as doxorubicin. | 04-07-2011 |
20140099374 | BIORESORBABLE EMBOLIZATION MICROSPHERES - The present disclosure is generally directed to an embolic material which, in some embodiments, may be in the form of a microsphere or a plurality of microspheres. The embolic material generally comprises carboxymethyl chitosan (CCN) crosslinked with carboxymethyl cellulose (CMC). In some embodiments, the embolic material may further comprise a therapeutic agent, such as doxorubicin. | 04-10-2014 |
20140171907 | LIQUID EMBOLIC MATERIAL INCLUDING CARBOXYMETHYL CHITOSAN CROSSLINKED WITH CARBOXYMETHYL CELLULOSE - A liquid embolic material may include a mixture of a first solution comprising between about 1.2% and about 2.5% weight per volume (w/v) carboxymethyl chitosan (CCN) in a first solvent and a second solution comprising between about 1.2% and about 2.5% w/v oxidized carboxymethyl cellulose (OCMC) in a second solvent. The liquid embolic material may be used to embolize a targeted embolization location by mixing the first solution and the second solution to form a liquid embolic material (or hydrogel precursor material), introducing the hydrogel precursor material to a targeted embolization location within a body of a patient, and allowing the CCN and the OCMC to react to form the hydrogel material and embolize the targeted embolization location. | 06-19-2014 |
Patent application number | Description | Published |
20140049016 | STABILIZER ARRANGEMENT FOR A CHASSIS OF A MOTOR VEHICLE - A stabilizer arrangement for a chassis of a motor vehicle, including at least one element, which entirely or partially compensates for vehicle movements, in the region of a wheel suspension connected to the stabilizer arrangement, wherein the element is activatable via flexible lines wherein the flexible lines can be guided by a central control unit via openings arranged in the stabilizer bearing substantially below the stabilizer, as seen in the vertical direction of the vehicle, to the element interacting with a stabilizer. | 02-20-2014 |
20140125028 | STABILIZER ARRANGEMENT FOR A CHASSIS OF A MOTOR VEHICLE - A stabilizer arrangement for a chassis of a motor vehicle, having at least one actuator which compensates for vehicle movements entirely or partially in the region of a wheel suspension which is connected to the stabilizer arrangement, wherein the actuator can be actuated via flexible lines. The actuator is connected to a central control unit via flexible lines to be routed from the central control unit, via openings which are arranged in a stabilizer bearing, to the actuator which interacts with a stabilizer, wherein the flexible lines are arranged around the stabilizer in a helical manner, and operation of the actuator causes a change in the diameter of the helix or the helix shape of the flexible lines which are laid in a helical manner. | 05-08-2014 |
Patent application number | Description | Published |
20110021234 | METHOD AND SYSTEM FOR CONTROLLING A MOBILE COMMUNICATION DEVICE IN A MOVING VEHICLE - Disclosed herein is a method and system for detecting, monitoring and/or controlling one or more of mobile services for a mobile communication device (also referred to herein as a Controllable Mobile Device or CMD), and in particular, when the device is being used and the vehicle, operated by the user of the device, is moving. The present method and system determines whether the vehicle is being operated by a user that may also have access to a mobile communication device which, if used concurrently while the vehicle is in operation, may lead to unsafe operation of the vehicle. If the mobile services control system determines that a vehicle operator has potentially unsafe access to a mobile communication device, the mobile services control system may restrict operator access to one or more services that would otherwise be available to the operator via the mobile communication device. | 01-27-2011 |
20120244883 | METHOD AND SYSTEM FOR CONTROLLING A MOBILE COMMUNICATION DEVICE IN A MOVING VEHICLE - A method and system is disclosed for performing a wireless location of a mobile communication device for detecting, monitoring and/or controlling one or more interactive mobile services capable of being activated by a user of the mobile device. When the mobile device is operated by the user, a wireless location is performed for determining whether such an interactive service, requested by the user, can be provided to the user. In one embodiment, a determination is made as to whether the mobile device resides in a container, e.g., a vehicle, for determining whether the interactive mobile service can be accessed by the user. | 09-27-2012 |
20130084847 | METHOD AND SYSTEM FOR CONTROLLING A MOBILE COMMUNICATION DEVICE - Disclosed herein is a method and system for detecting, monitoring and/or controlling one or more of mobile services for a mobile communication device (also referred to herein as a Controllable Mobile Device or CMD), and in particular, when the device is being used and the vehicle, operated by the user of the device, is moving. The present method and system determines whether the vehicle is being operated by a user that may also have access to a mobile communication device which, if used concurrently while the vehicle is in operation, may lead to unsafe operation of the vehicle. If the mobile services control system determines that a vehicle operator has potentially unsafe access to a mobile communication device, the mobile services control system may restrict operator access to one or more services that would otherwise be available to the operator via the mobile communication device. | 04-04-2013 |
20140364108 | METHOD AND SYSTEM FOR CONTROLLING A MOBILE COMMUNICATION DEVICE IN A MOVING VEHICLE - A method and system is disclosed for performing a wireless location of a mobile communication device for detecting, monitoring and/or controlling one or more interactive mobile services capable of being activated by a user of the mobile device. When the mobile device is operated by the user, a wireless location is performed for determining whether such an interactive service, requested by the user, can be provided to the user. In one embodiment, a determination is made as to whether the mobile device resides in a container, e.g., a vehicle, for determining whether the interactive mobile service can be accessed by the user. | 12-11-2014 |
Patent application number | Description | Published |
20080239860 | Apparatus and Method for Providing Multiple Reads/Writes Using a 2Read/2Write Register File Array - An apparatus and method are provided for reading a plurality of consecutive entries and writing a plurality of consecutive entries with only one read address and one write address using a 2Read/2Write register file. In one exemplary embodiment, a 64 entry register file array is partitioned into four sub-arrays. Each sub-array contains sixteen entries having one or more 2Read/2Write SRAM cells. The apparatus and method provide a mechanism to write the consecutive entries by only having a 4 to 16 decode of one address. In addition, the apparatus and method provide a mechanism for reading data from the register file array using a starting read word address and two read word lines generated based on the starting read word address. The two read word lines are used to access the two read ports of the entries in the sub-arrays. | 10-02-2008 |
20110185159 | PROCESSOR INCLUDING AGE TRACKING OF ISSUE QUEUE INSTRUCTIONS - An information handling system includes a processor with an instruction issue queue (IQ) that may perform age tracking operations. The issue queue IQ maintains or stores instructions that may issue out-of-order in an internal data store IDS. The IDS organizes instructions in a queue position (QPOS) addressing arrangement. An age matrix of the IQ maintains a record of relative instruction aging for those instructions within the IDS. The age matrix updates latches or other memory cell data to reflect the changes in IDS instruction ages during a dispatch operation into the IQ. During dispatch of one or more instructions, the age matrix may update only those latches that require data change to reflect changing IDS instruction ages. The age matrix employs row and column data and clock controls to individually update those latches requiring update. The issue queue may selectively clock a row and a column of cells of the age matrix that correspond to a dispatched instruction's queue position while leaving other cells unclocked to conserve power. | 07-28-2011 |
20120110536 | STATISTICAL METHOD FOR HIERARCHICALLY ROUTING LAYOUT UTILIZING FLAT ROUTE INFORMATION - An integrated circuit design is routed by first creating temporary routes in a flattened layout, generating blockage information for sub-blocks in the layout based on the temporary routes, and establishing a routing order for cells using a depth-first search. Cells in the original layout are then routed according to the routing order using the blockage information. The temporary routes are sorted into internal routes, terminal routes, and spanning routes. Blockage information for each sub-block includes a first cellview equal to the internal routes, a second cellview equal to the terminal routes plus the spanning routes, and a third cellview equal to the total tracks in the sub-block minus the first and second cellviews. The invention is particularly suited for routing a hierarchical integrated circuit design. By examining the complete hierarchy, the invention ensures that enough metal will be remaining at upper level sub-blocks to complete the routing automatically. | 05-03-2012 |
20120260069 | Processor Including Age Tracking of Issue Queue Instructions - An information handling system includes a processor with an instruction issue queue (IQ) that may perform age tracking operations. The issue queue IQ maintains or stores instructions that may issue out-of-order in an internal data store (IDS). The IDS organizes instructions in a queue position (QPOS) addressing arrangement. An age matrix of the IQ maintains a record of relative instruction aging for those instructions within the IDS. The age matrix updates latches or other memory cell data to reflect the changes in IDS instruction ages during a dispatch operation into the IQ. During dispatch of one or more instructions, the age matrix may update only those latches that require data change to reflect changing IDS instruction ages. The age matrix employs row and column data and clock controls to individually update those latches requiring update. | 10-11-2012 |
Patent application number | Description | Published |
20090013825 | PREPERATION OF COLLOIDAL NONOSILVER - In present invention, colloidal nanosilver has been prepared with high affect on bacteria, viruses, and fungi. The average size of nano particles are less than 10 nm. In the present invention colloidal nanosilver is subject to synthesis by a very simple method and in a short time. Nanosilver colloid prepared by use of different surfactant like LABS, Tween 20, Tween 60, Tween 80, SDS. | 01-15-2009 |
20090028947 | USING OF NANOSILVER IN POULTRY, LIVESTOCK AND AQUATICS INDUSTRY - Nanosilver material is disclosed. Said material is nano silver based disinfectant and disease preventer for poultry, livestock and aquatics. The material contains silver nano particle and pure water and can be used as a surface disinfectant, water disinfectant and therapentic material for poultry, livestock and aquatic disease caused by bacteria's viruses, fungi and other monocellular microorganism. | 01-29-2009 |
20090075818 | Nanosilver for preservation and treatment of diseases in agriculture field. - A nano silver active material disclosed for use in agriculture. The active material prevents and treats major diseases in agricultural field. | 03-19-2009 |
Patent application number | Description | Published |
20100327916 | FREQUENCY SYNTHESIZER NOISE REDUCTION - A method for reducing noise in a frequency synthesizer includes selecting a design variable k, calibrating a feedback time delay (T | 12-30-2010 |
20110003571 | LOW POWER LO DISTRIBUTION USING A FREQUENCY-MULTIPLYING SUBHARMONICALLY INJECTION-LOCKED OSCILLATOR - A local oscillator communicates a signal of relatively low frequency across an integrated circuit to the location of a mixer. Near the mixer, a frequency-multiplying SubHarmonically Injection-Locked Oscillator (SHILO) receives the signal and generates therefrom a higher frequency signal. If the SHILO outputs I and Q quadrature signals, then the I and Q signals drive the mixer. If the SHILO does not generate quadrature signals, then a quadrature generating circuit receives the SHILO output signal and generates therefrom I and Q signals that drive the mixer. In one advantageous aspect, the frequency of the signal communicated over distance from the local oscillator to the SHILO is lower than the frequency of the I and Q signals that drive the mixer locally. Reducing the frequency of the signal communicated over distance can reduce power consumption of the LO signal distribution system by more than fifty percent as compared to conventional systems. | 01-06-2011 |
20110092169 | LR POLYPHASE FILTER - An LR polyphase filter implemented with inductors and resistors and capable of operating at high frequencies is described. In one design, the LR polyphase filter includes first and second paths, with each path including an inductor coupled to a resistor. The first and second paths receive a first input signal and provide first and second output signals, respectively, which may be in quadrature. For a differential design, the polyphase filter further includes third and fourth paths, which receive a second input signal and provide third and fourth output signals, respectively. The four output signals may be 90° out of phase. The first and second input signals are for a differential input signal. The first and third output signals are for a first differential output signal, and the second and fourth output signals are for a second differential output signal. Each inductor may be implemented with a transmission line. | 04-21-2011 |
20110133781 | LOW POWER COMPLEMENTARY LOGIC LATCH AND RF DIVIDER - A quadrature output high-frequency RF divide-by-two circuit includes a pair of differential complementary logic latches. The latches are interconnected to form a toggle flip-flop. Each latch includes a tracking cell and a locking cell. In a first embodiment, the locking cell includes two complementary logic inverters and two transmission gates. When the locking cell is locked, the two gates are enabled such that the locked (i.e., latched) signal passes through both transmission gates and both inverters. In one advantageous aspect, the tracking cell only involves two transmission gates. Due to the circuit topology, the first embodiment is operable from a low supply voltage at a high operating frequency while consuming a low amount of supply current. In a second and third embodiment, the tracking cell involves a pair of inverters. The sources of the transistors of the inverters are, however, coupled together thereby resulting in performance advantages over conventional circuits. | 06-09-2011 |
Patent application number | Description | Published |
20100289544 | Receiver With Enhanced Clock And Data Recovery - A receiver device implements enhanced data reception with edge-based clock and data recovery such as with a flash analog-to-digital converter architecture. In an example embodiment, the device implements a first phase adjustment control loop, with for example, a bang-bang phase detector, that detects data transitions for adjusting sampling at an optimal edge time with an edge sampler by adjusting a phase of an edge clock of the sampler. This loop may further adjust sampling in received data intervals for optimal data reception by adjusting the phase of a data clock of a data sampler such a flash ADC. The device may also implement a second phase adjustment control loop with, for example, a baud-rate phase detector, that detects data intervals for further adjusting sampling at an optimal data time with the data sampler. | 11-18-2010 |
20110304374 | METHODS AND APPARATUS FOR A GRAY-CODED PHASE ROTATING FREQUENCY DIVIDER - Methods and apparatus for a gray-coded phase rotating frequency divider. A phase selector is provided that includes two or more selectors, each selector configured to receive multiple clock phases and output a respective clock phase based on one or more selection bits that are part of a selection input, and a gray code generator configured to generate a gray coded output that forms the selection input so that when the gray coded output changes state only selection bits associated with a single selector change. A method includes grouping a plurality of clock phases into two or more groups, for each group, selecting a respective clock phase based on one or more selection bits that are part of a selection input, and generating a gray coded output that forms the selection input so that when the gray coded output changes state only selection bits associated with a single group change. | 12-15-2011 |
20120083205 | NFC DEVICE HAVING A DIFFERENTIAL INPUT ENVELOPE DETECTOR - A differential input envelope detector receives an unamplified Near Field Communication (NFC) input signal from an NFC antenna and downconverts an NFC intelligence signal to baseband. In one example, the NFC input signal includes the NFC intelligence signal modulated onto a carrier. The differential input envelope detector downconverts and outputs the downconverted NFC intelligence signal onto an output node in such a way that the fundamental and odd harmonics of the carrier are canceled on the output node. There is substantially no signal of the frequency of the carrier present on the output node and this facilitates filtering of the downconverted NFC intelligence signal from interference and data recovery. An NFC data recovery circuit receives the downconverted NFC intelligence signal from the envelope detector output node. The NFC data recovery circuit can be a low power digital circuit involving an ultra-low power ADC and subsequent low power digital processing circuitry. | 04-05-2012 |
20120120992 | LO GENERATION AND DISTRIBUTION IN A MULTI-BAND TRANSCEIVER - A VCO of a PLL outputs a first differential signal of frequency FVCO. A first divide-by-two circuit local to the VCO divides the first differential signal and outputs a first quadrature signal of frequency FVCO/2. Two of the component signals of the first quadrature signal are routed to a second divide-by-two circuit local to a first mixer of a first device. The second divide-by-two circuit outputs a second quadrature signal of frequency FVCO/4 to the first mixer. All four signals of the first quadrature signal of frequency FVCO/2 are routed through phase mismatch correction circuitry to a second mixer of a second device. In one example, FVCO is a tunable frequency of about ten gigahertz, the first device is an IEEE802.11b/g transmitter or receiver that transmits or receives in a first band, and the second device is an IEEE802.11a transmitter or receiver that transmits or receives in a second band. | 05-17-2012 |
20120242378 | FREQUENCY DIVIDER CIRCUIT - A frequency divider circuit is described. The frequency divider circuit includes a first cross-coupling. The first cross-coupling includes a first cross-coupled transistor with a first gate. The first gate is separately biased. The first cross-coupling also includes a second cross-coupled transistor with a second gate. The second gate is separately biased. The first gate is coupled to the second cross-coupled transistor and the second gate is coupled to the first cross-coupled transistor. | 09-27-2012 |
20130106634 | NFC TRANSCEIVER | 05-02-2013 |
20130107913 | CLOCK AND DATA RECOVERY FOR NFC TRANSCEIVERS | 05-02-2013 |
20130109304 | ADAPTIVE SIGNAL SCALING IN NFC TRANSCEIVERS | 05-02-2013 |
20130109305 | ADAPTIVE NFC TRANSCEIVERS | 05-02-2013 |
20130109306 | NFC TRANSCEIVER UTILIZING COMMON CIRCUITRY FOR ACTIVE AND PASSIVE MODES | 05-02-2013 |
20140029143 | RECEIVER HAVING A WIDE COMMON MODE INPUT RANGE - In one embodiment, a differential amplifier is provided. Gates of a first differential pair of transistors, of a first conductivity type, and a second pair or transistors, of a second conductivity type are coupled to first and second input terminals of the differential amplifier. A first pair of adjustable current sources are configured to adjust respective tail currents of the first differential pair of transistors in response to a first bias current control signal. A second pair of adjustable current sources are configured to adjust respective tail currents of the second differential pair of transistors in response to the first bias current control signal. A third pair of adjustable current sources are configured to adjust respective currents through the second differential pair of transistors in response to a second bias current control signal. | 01-30-2014 |
20140029653 | LO GENERATION AND DISTRIBUTION IN A MULTI-BAND TRANSCEIVER - A VCO of a PLL outputs a first differential signal of frequency FVCO. A first divide-by-two circuit local to the VCO divides the first differential signal and outputs a first quadrature signal of frequency FVCO/2. Two of the component signals of the first quadrature signal are routed to a second divide-by-two circuit local to a first mixer of a first device. The second divide-by-two circuit outputs a second quadrature signal of frequency FVCO/4 to the first mixer. All four signals of the first quadrature signal of frequency FVCO/2 are routed through phase mismatch correction circuitry to a second mixer of a second device. In one example, FVCO is a tunable frequency of about ten gigahertz, the first device is an IEEE802.11b/g transmitter or receiver that transmits or receives in a first band, and the second device is an IEEE 802.11a transmitter or receiver that transmits or receives in a second band. | 01-30-2014 |
20140091843 | PLESIOCHRONOUS CLOCK GENERATION FOR PARALLEL WIRELINE TRANSCEIVERS - A method for plesiochronous clock generation for parallel wireline transceivers, includes: inputting, into at least one decoder, at least one digital frequency mismatch number; decoding, with the at least one decoder, the at least one digital frequency mismatch number to obtain at least one digital frequency divider number that represents a transmit frequency associated with at least one signal; inputting the at least one digital frequency divider number into at least one fractional-N phase lock loop; and utilizing, by the at least one fractional-N phase lock loop, the at least one digital frequency divider number and an analog reference signal produced by a reference oscillator to produce a resultant signal at the transmit frequency; wherein the at least one decoder and the at least one fractional-N phase lock loop are contained on a single integrated circuit. | 04-03-2014 |
20150092898 | Receiver with enhanced clock and data recovery - A receiver device implements enhanced data reception with edge-based clock and data recovery such as with a flash analog-to-digital converter architecture. In an example embodiment, the device implements a first phase adjustment control loop, with for example, a bang-bang phase detector, that detects data transitions for adjusting sampling at an optimal edge time with an edge sampler by adjusting a phase of an edge clock of the sampler. This loop may further adjust sampling in received data intervals for optimal data reception by adjusting the phase of a data clock of a data sampler such a flash ADC. The device may also implement a second phase adjustment control loop with, for example, a baud-rate phase detector, that detects data intervals for further adjusting sampling at an optimal data time with the data sampler. | 04-02-2015 |
20150180642 | DATA RECEIVERS AND METHODS OF IMPLEMENTING DATA RECEIVERS IN AN INTEGRATED CIRCUIT - A data receiver implemented in an integrated circuit is described. The data receiver comprises an input receiving a data signal; a first equalization circuit coupled to receive the data signal, wherein the first equalization circuit is used to receive the data of the data signal; and a second equalization circuit coupled to receive the data signal, wherein the second equalization circuit is used to adjust a clock phase offset. | 06-25-2015 |
Patent application number | Description | Published |
20160038056 | DETECTING TEMPERATURE SENSITIVITY OF A PATIENT'S AIRWAY - According to one embodiment of the present invention, an airflow perturbation device for detecting airway sensitivity to temperature comprises a pneumotachometer including a flow sensor to measure airflow through the apparatus; a perturbation mechanism to periodically alter air flow resistance in the apparatus; an air cooler; a pressure sensor to measure a difference in air pressure across the pneumotachometer and perturbation mechanism; and a computing system comprising at least one processor configured to receive data from the flow sensor and pressure sensor; and determine an airflow resistance based on the received data. Embodiments of the present invention further include a method for detecting airway sensitivity to temperature in substantially the same manners described above. | 02-11-2016 |
20160038057 | MEASURING RESPIRATORY MECHANICS PARAMETERS USING PERTURBATIONS - According to one embodiment of the present invention, a method of determining respiratory parameters comprises determining a ratio of pressure changes to flow changes induced in the breathing of a patient by an airflow perturbation device at each of a plurality of perturbation frequencies to form a dataset. Resistance, compliance, and inertance parameters of a model of a respiratory system are determined by comparing a predicted frequency dependence of the model to the dataset. Embodiments of the present invention further include a system and computer program product for determining respiratory parameters in substantially the same manners described above. | 02-11-2016 |
20160038697 | MEASURING RESPIRATORY MECHANICS PARAMETERS OF VENTILATED PATIENTS - An airflow perturbation device for measuring respiratory resistance of a patient breathing with the use of a ventilator comprises a sealed housing having a first port and a second port each configured to couple to a ventilator hose, a perturbation mechanism to periodically alter air flow resistance between the first port and the second port, a pneumotachometer comprising a flow sensor to measure airflow between the first port and the second port, a pressure sensor to measure a difference in air pressure between the first port and the second port, and a computing system comprising at least one processor configured to receive data from the flow sensor and pressure sensor. The computing system determines an airflow resistance based on the received data. Embodiments of the present invention further include a method and computer program product for measuring respiratory resistance of a ventilated patient in substantially the same manners described above. | 02-11-2016 |