Patent application number | Description | Published |
20080278277 | Digitally controllable on-chip resistors and methods - A digitally controllable resistor includes a substrate and at least one digitally controllable resistance stage formed on the substrate. Each of the stage(s) can include a first resistor connected in series with a switch and a second resistor connected in parallel with the first resistor and the switch. Each stage can also include a control line connected to the switch for opening and closing the switch in response to a control bit associated therewith. Multiple resistance stages can be connected in series and the digitally controllable variable resistor can be integrated onto a substrate. | 11-13-2008 |
20110136455 | Signal Processing Device and Method - A processing device ( | 06-09-2011 |
20120313672 | Down-Conversion using Square Wave Local Oscillator Signals - In a method of frequency down-converting an input signal to an output signal, a first local oscillator signal is generated as a square wave having a duty cycle of 1/3 or 2/3, and the input signal is mixed with the first oscillator signal to achieve a first down-converted signal, A second local oscillator signal is generated as a modified square wave having the same period time and a duty cycle of 2/3, of which one part has a positive amplitude and another part has a negative amplitude. The input signal is mixed with the second oscillator signal to achieve a second down-converted signal. The first oscillator signal has a delay of 1/4 of the period time to achieve a phase shift of π/2 between the oscillator signals, and at least one down-converted signal is multiplied by a pre-calculated factor. The resulting down-converted signals are added to achieve the output signal. | 12-13-2012 |
20130009688 | MIXER ARRANGEMENT - A mixer arrangement for generating an analog output signal mixing an analog input signal with a discrete-time mixing signal. The mixer arrangement comprises a plurality of unit elements. Each unit element is adapted to be in an enabled mode in a first state of an enable signal supplied to the unit element, and in a disabled mode in a second state of the enable signal. Each unit element is adapted to generate the output signal of the unit element based on the analog input signal of the mixer arrangement in the enabled mode but not in the disabled mode. The unit elements are connected for generating a common output signal as the sum of the output signals from the unit elements. The arrangement is adapted to generate the analog output signal of the mixer arrangement based on the common output signal. A corresponding method is also disclosed. | 01-10-2013 |
20130194978 | Transceiver and Communication Device - A transceiver comprises a receiver, a transmitter, a signal transmission arrangement, a first signal transferring element, and a transformer having magnetically-connected first and second windings. The first signal transferring element is between the transmitter output and the signal transmission arrangement, which is arranged to transmit signals from the transmitter and to receive signals and provide them to the receiver. The first winding of the transformer is connected in parallel with the first signal transferring element, which has input and output impedances so that signals from the transmitter output reach the signal transmission arrangement, while signals from the signal transmission arrangement do not reach the transmitter output. As such, the first signal transferring element is arranged to transfer signals from the transmitter to the signal transmission arrangement such that the transmitter contribution to the signal in the first winding is suppressed. | 08-01-2013 |
20130314164 | Low-Noise Amplifier with Impedance Boosting Circuit - A low-noise amplifier ( | 11-28-2013 |
20140009245 | Transceiver Front-End - A transceiver front-end of a communication device comprises a frequency blocking arrangement, which may be either a transmit frequency blocking arrangement or a receive frequency blocking arrangement. The frequency blocking arrangement has a blocking frequency interval associated with one of a transmit frequency and receive frequency, and a non-blocking frequency interval associated with the other of the transmit frequency and receive frequency. The frequency blocking arrangement is configured to block passage of signals in the blocking frequency interval between said signal transmission and reception node and either said receiver node or said transmitter node. The frequency blocking arrangement comprises a network of passive components comprising at least one transformer and a filter arrangement adapted to have a higher impedance value in the blocking frequency interval than in the non-blocking frequency interval. | 01-09-2014 |
20140364073 | TRANSCEIVER, METHOD, COMPUTER PROGRAM AND COMMUNICATION DEVICE - A transceiver is disclosed comprising a transmitter; a receiver; and a signal transmission arrangement. The transmitter comprises a power amplifier, and the signal transmission arrangement is arranged to transmit signals provided from the transmitter through its power amplifier, and arranged to receive signals and provide them to the receiver. The transceiver further comprises an auxiliary power amplifier which has controllable phase shift and gain; a first impedance element; a second impedance element; and a controller. The auxiliary power amplifier has its input connected to the input of the power amplifier of the transmitter, the first impedance element is connected between an output of the auxiliary power amplifier and an input of the receiver, the second impedance element is connected between an output of the power amplifier of the transmitter and the input of the receiver, and the controller is arranged to control the auxiliary power amplifier to provide a signal that has a phase and amplitude in relation to the output of the power amplifier of the transmitter and the impedances of the first and second impedance elements such that the transmitter contribution at the input of the receiver is suppressed. A method, computer program and communication device is also disclosed. | 12-11-2014 |
20140370833 | DOWN-CONVERSION CIRCUIT WITH INTERFERENCE DETECTION - A down-conversion circuit for a receiver circuit is disclosed. It comprises a first mixer arranged to down-convert an RF signal with a first LO signal (LO | 12-18-2014 |
20140378077 | DOWN-CONVERSION CIRCUIT - A down-conversion circuit for a receiver circuit is disclosed, the down-conversion circuit comprises a first passive switching mixer arranged to down-convert a received radio frequency, RF, signal with a first local oscillator, LO, signal (LO | 12-25-2014 |