Patent application number | Description | Published |
20120257756 | Methods, Systems, and Apparatuses for Optimal Group Key Management for Secure Multicast Communication - Apparatuses, systems, and methods for optimal group key (OGK) management that may achieve non-colluding and/or the storage-communication optimality are disclosed. In some embodiments, a group controller (GC) is responsible for key generation and distribution and the group data are encrypted by a group key. When joining the group, in some embodiments, each group member (GM) is assigned a unique n-bit ID and a set of secrets, in which each bit is one-to-one mapped to a unique secret. Whenever GMs are revoked from the group, in some embodiments, the GC will multicast an encrypted key-update message. Only the remaining GMs may be able to recover the message and update GK as well as their private keys. The disclosed OGK scheme can achieve storage-communication optimality with constant message size and immune to collusion attack and also may outperform existing group key management schemes in terms of communication and storage efficiency. | 10-11-2012 |
20120258777 | Systems and Apparatuses for a Secure Mobile Cloud Framework for Mobile Computing and Communication - Systems and apparatuses for a secure mobile cloud framework (referred to as MobiCloud) for mobile computing and communication are disclosed. Embodiments of MobiCloud transfer each mobile node from a traditional strictly layer-structured communication node into a service node (SN). Each SN may be used as a service provider or a service broker according its capability. Each SN may be incorporated as a virtualized component of the MobiCloud. In some embodiments, MobiCloud mirrors an SN to one or multiple virtual images in the Cloud for addressing communication and computation deficiencies of mobile devices. Virtual images can create a visualized MANET routing and communication layer that can maximally assist the mobile nodes to enable pervasive computing services for each mobile device owner. A secure data processing framework is disclosed for the MobiCloud. | 10-11-2012 |
20140289513 | Enabling Comparable Data Access Control for Lightweight Mobile Devices in Clouds - A new efficient framework based on a Constant-size Ciphertext Policy Comparative Attribute-Based Encryption (CCP-CABE) approach. CCP-CABE assists lightweight mobile devices and storing privacy-sensitive sensitive data into cloudbased storage by offloading major cryptography-computation overhead into the cloud without exposing data content to the cloud. CCP-CABE extends existing attribute-based data access control solutions by incorporating comparable attributes to incorporate more flexible security access control policies. CCP-CABE generates constant-size ciphertext regardless of the number of involved attributes, which is suitable for mobile devices considering their limited communication and storage capacities. | 09-25-2014 |
20150040228 | SELECTION OF A COUNTERMEASURE - Examples disclose a method, executable by a processor, to assign a metric of vulnerability to a virtual machine. Based on the metric of vulnerability, the method places the virtual machine into a detection phase. Additionally, the examples disclose the method is to receive an alert corresponding to the virtual machine and based this received alert, the method implements a countermeasure. | 02-05-2015 |
20160044035 | Systems and Apparatuses for a Secure Mobile Cloud Framework for Mobile Computing and Communication - Systems and apparatuses for a secure mobile cloud framework (referred to as MobiCloud) for mobile computing and communication are disclosed. Embodiments of MobiCloud transfer each mobile node from a traditional strictly layer-structured communication node into a service node (SN). Each SN may be used as a service provider or a service broker according its capability. Each SN may be incorporated as a virtualized component of the MobiCloud. In some embodiments, MobiCloud mirrors an SN to one or multiple virtual images in the Cloud for addressing communication and computation deficiencies of mobile devices. Virtual images can create a visualized MANET routing and communication layer that can maximally assist the mobile nodes to enable pervasive computing services for each mobile device owner. A secure data processing framework is disclosed for the MobiCloud. | 02-11-2016 |
Patent application number | Description | Published |
20090212374 | SPACE EFFICIENT INTEGRATRED CIRCUIT WITH PASSIVE DEVICES - A multimodal integrated circuit (IC) is provided, comprising, first ( | 08-27-2009 |
20100244178 | FIELD EFFECT TRANSISTOR GATE PROCESS AND STRUCTURE - A Schottky gate ( | 09-30-2010 |
20100295100 | INTEGRATED CIRCUIT HAVING A BULK ACOUSTIC WAVE DEVICE AND A TRANSISTOR - A bulk GaN layer is on a first surface of a substrate, wherein the bulk GaN layer has a GaN transistor region and a bulk acoustic wave (BAW) device region. A source/drain layer is over a first surface of the bulk GaN layer in the GaN transistor region. A gate electrode is formed over the source/drain layer. A first BAW electrode is formed over the first surface of the bulk GaN layer in the BAW device region. An opening is formed in a second surface of the substrate, opposite the first surface of the substrate, which extends through the substrate and exposes a second surface of the bulk GaN layer, opposite the first surface of the bulk GaN layer. A second BAW electrode is formed within the opening over the second surface of the bulk GaN layer. | 11-25-2010 |
20130092947 | SEMICONDUCTOR DEVICE AND METHOD OF MAKING - In some embodiments, a metal insulator semiconductor heterostructure field effect transistor (MISHFET) is disclosed that has a source, a drain, an insulation layer, a gate dielectric, and a gate. The source and drain are on opposing sides of a channel region of a channel layer. The channel region is an upper portion of the channel layer. The channel layer comprises gallium nitride. The insulation layer is over the channel layer and has a first portion and a second portion. The first portion is nearer the drain than the source and has a first thickness. The second portion is nearer the source than drain and has the first thickness. The insulation layer has an opening through the insulation layer. The opening is between the first portion and the second portion. | 04-18-2013 |
20130099324 | GAN-ON-SI SWITCH DEVICES - A low leakage current switch device ( | 04-25-2013 |
20130341678 | Semiconductor Device with Selectively Etched Surface Passivation - A semiconductor device includes a semiconductor substrate configured to include a channel, a gate supported by the semiconductor substrate to control current flow through the channel, a first dielectric layer supported by the semiconductor substrate and including an opening in which the gate is disposed, and a second dielectric layer disposed between the first dielectric layer and a surface of the semiconductor substrate in a first area over the channel. The second dielectric layer is patterned such that the first dielectric layer is disposed on the surface of the semiconductor substrate in a second area over the channel. | 12-26-2013 |
20130341679 | Semiconductor Device with Selectively Etched Surface Passivation - A semiconductor device includes a semiconductor substrate configured to include a channel, first and second ohmic contacts supported by the semiconductor substrate, in ohmic contact with the semiconductor substrate, and spaced from one another for current flow between the first and second ohmic contacts through the channel, and first and second dielectric layers supported by the semiconductor substrate. At least one of the first and second ohmic contacts extends through respective openings in the first and second dielectric layers. The second dielectric layer is disposed between the first dielectric layer and a surface of the semiconductor substrate, and the second dielectric layer includes a wet etchable material having an etch selectivity to a dry etchant of the first dielectric layer. | 12-26-2013 |
20140103532 | CHIP-LEVEL HUMIDITY PROTECTION - An electronic apparatus includes a semiconductor substrate, a device structure supported by the semiconductor substrate, and a guard ring surrounding the device structure. The guard ring includes a plurality of conductive structures spaced apart from one another, supported by the semiconductor substrate, and coupled to a voltage source to establish an operating voltage for the guard ring. | 04-17-2014 |
20140264360 | TRANSISTOR WITH CHARGE ENHANCED FIELD PLATE STRUCTURE AND METHOD - Transistors and methods of fabricating are described herein. These transistors include a field plate ( | 09-18-2014 |
20150132932 | SEMICONDUCTOR DEVICE WITH SELECTIVELY ETCHED SURFACE PASSIVATION - A semiconductor device includes a semiconductor substrate configured to include a channel, a gate supported by the semiconductor substrate to control current flow through the channel, a first dielectric layer supported by the semiconductor substrate and including an opening in which the gate is disposed, and a second dielectric layer disposed between the first dielectric layer and a surface of the semiconductor substrate in a first area over the channel. The second dielectric layer is patterned such that the first dielectric layer is disposed on the surface of the semiconductor substrate in a second area over the channel. | 05-14-2015 |
20150357452 | Semiconductor Device with Selectively Etched Surface Passivation - A semiconductor device includes a semiconductor substrate configured to include a channel, first and second ohmic contacts supported by the semiconductor substrate, in ohmic contact with the semiconductor substrate, and spaced from one another for current flow between the first and second ohmic contacts through the channel, and first and second dielectric layers supported by the semiconductor substrate. At least one of the first and second ohmic contacts extends through respective openings in the first and second dielectric layers. The second dielectric layer is disposed between the first dielectric layer and a surface of the semiconductor substrate, and the second dielectric layer includes a wet etchable material having an etch selectivity to a dry etchant of the first dielectric layer. | 12-10-2015 |
Patent application number | Description | Published |
20110266613 | SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE - A semiconductor component that includes gate electrodes and shield electrodes and a method of manufacturing the semiconductor component. A semiconductor material has a device region, a gate contact region, a termination region, and a drain contact region. One or more device trenches is formed in the device region and one or more termination trenches is formed in the edge termination region. Shield electrodes are formed in portions of the device trenches that are adjacent their floors. A gate dielectric material is formed on the sidewalls of the trenches in the device region and gate electrodes are formed over and electrically isolated from the shield electrodes. A gate electrode in at least one of the trenches is connected to at least one shield electrode in the trenches. | 11-03-2011 |
20120313161 | SEMICONDUCTOR DEVICE WITH ENHANCED MOBILITY AND METHOD - In one embodiment, a vertical insulated-gate field effect transistor includes a feature embedded within a control electrode. The feature is placed within the control electrode to induce stress within predetermined regions of the transistor. | 12-13-2012 |
20130248982 | SEMICONDUCTOR DEVICE WITH ENHANCED MOBILITY AND METHOD - In one embodiment, a vertical insulated-gate field effect transistor includes a feature embedded within a control electrode. The feature is placed within the control electrode to induce stress within predetermined regions of the transistor. | 09-26-2013 |
20150054068 | SEMICONDUCTOR DEVICE WITH ENHANCED MOBILITY AND METHOD - In one embodiment, a vertical insulated-gate field effect transistor includes a feature embedded within a control electrode. The feature is placed within the control electrode to induce stress within predetermined regions of the transistor. | 02-26-2015 |
Patent application number | Description | Published |
20120288948 | CONTROLLED TUNNEL GAP DEVICE FOR SEQUENCING POLYMERS - The invention includes compositions, devices, and methods for analyzing a polymer and/or polymer unit. The polymer may be a homo- or hetero-polymer such as DNA, RNA, a polysaccharide, or a peptide. The device includes electrodes that form a tunnel gap through which the polymer can pass. The electrodes are functionalized with a reagent attached thereto, and the reagent is capable of forming a transient bond to a polymer unit. When the transient bond forms between the reagent and the unit, a detectable signal is generated and used to analyze the polymer. | 11-15-2012 |
20160097759 | CONTROLLED TUNNEL GAP DEVICE FOR SEQUENCING POLYMERS - The invention includes compositions, devices, and methods for analyzing a polymer and/or polymer unit. The polymer may be a homo or hetero-polymer such as DNA, RNA, a polysaccharide, or a peptide. The device includes electrodes that form a tunnel gap through which the polymer can pass. The electrodes are functionalized with a reagent attached thereto, and the reagent is capable of forming a transient bond to a polymer unit. When the transient bond forms between the reagent and the unit, a detectable signal is generated and used to analyze the polymer. | 04-07-2016 |
Patent application number | Description | Published |
20110101425 | SEMICONDUCTOR DEVICE WITH INCREASED SNAPBACK VOLTAGE - Methods and apparatus are provided for fabricating a semiconductor device structure. The semiconductor device structure comprises a buried region having a first conductivity type, a first region having a second conductivity type overlying the buried region, a source region having the first conductivity type overlying the first region, and a drain region having the first conductivity type overlying the first region. The semiconductor device structure further comprises a second region having the first conductivity type overlying the buried region, the second region abutting the buried region to form an electrical contact with the buried region, and a first resistance configured electrically in series with the second region and the buried region. The combined series resistance of the first resistance and the second region is greater than a resistance of the buried region. | 05-05-2011 |
20110241083 | SEMICONDUCTOR DEVICE AND METHOD - Transistors ( | 10-06-2011 |
20110241092 | ELECTRONIC DEVICE WITH CAPCITIVELY COUPLED FLOATING BURIED LAYER - Transistors ( | 10-06-2011 |
20130092947 | SEMICONDUCTOR DEVICE AND METHOD OF MAKING - In some embodiments, a metal insulator semiconductor heterostructure field effect transistor (MISHFET) is disclosed that has a source, a drain, an insulation layer, a gate dielectric, and a gate. The source and drain are on opposing sides of a channel region of a channel layer. The channel region is an upper portion of the channel layer. The channel layer comprises gallium nitride. The insulation layer is over the channel layer and has a first portion and a second portion. The first portion is nearer the drain than the source and has a first thickness. The second portion is nearer the source than drain and has the first thickness. The insulation layer has an opening through the insulation layer. The opening is between the first portion and the second portion. | 04-18-2013 |
20130099324 | GAN-ON-SI SWITCH DEVICES - A low leakage current switch device ( | 04-25-2013 |
Patent application number | Description | Published |
20130266746 | PAPER SUBSTRATE CONTAINING A WETTING AGENT AND HAVING IMPROVED PRINTABILITY - The present invention relates to a sizing composition that, when applied to paper substrate, creates a substrate, preferably suitable for inkjet printing, having increased print density, and print mottle, as well as print sharpness, low HST, and/or image dry time, the substrate preferably having high brightness and reduced color-to-color bleed as well. In addition, the present invention relates to a method of reducing the HST of a paper substrate by applying the sizing composition to at least one surface thereof. Further, the application relates to methods of making and using the sizing composition, as well as methods of making and using the paper containing the sizing composition. | 10-10-2013 |
20130273270 | PAPER SUBSTRATE CONTAINING A WETTING AGENT AND HAVING IMPROVED PRINT MOTTLE - The present invention relates to a sizing composition that, when applied to paper substrate, creates a substrate, preferably suitable for inkjet printing, having increased print density, enhanced print mottle, as well as print sharpness, low HST, and/or image dry time, the substrate preferably having high brightness and reduced color-to-color bleed as well. In addition, the present invention relates to a method of reducing the HST of a paper substate by applying the sizing composition to at least one surface thereof. Further, the application relates to methods of making and using the sizing composition, as well as methods of making and using the paper containing the sizing composition. | 10-17-2013 |
20140299286 | PAPER SUBSTRATES CONTAINING HIGH SURFACE SIZING AND LOW INTERNAL SIZING AND HAVING HIGH DIMENSIONAL STABILITY - This invention relates to a paper substrate containing high surface sizing and low internal sizing and having high dimensional stability, as well as methods of making and using the composition. | 10-09-2014 |
20150050434 | PAPER SUBSTRATE HAVING ENHANCED PRINT DENSITY - The present invention relates to a sizing composition that, when applied to paper substrate, creates a substrate, preferably suitable for inkjet printing, having increased print density, print sharpness, low HST, and/or image dry time, the substrate preferably having high brightness and reduced color-to-color bleed as well. In addition, the present invention relates to a method of reducing the HST of a paper substrate by applying the sizing composition to at least one surface thereof. Further, the application relates to methods of making and using the sizing composition, as well as methods of making and using the paper containing the sizing composition. | 02-19-2015 |