Patent application number | Description | Published |
20120074538 | PACKAGE STRUCTURE WITH ESD AND EMI PREVENTING FUNCTIONS - A package structure with ESD (electrostatic discharge) and EMI (electromagnetic interference) preventing functions includes: a carrier having first and second ground structures electrically insulated from one another; a semiconductor component disposed on one surface of the carrier and electrically connected to the first ground structure; and a lid member disposed to cover the carrier and the semiconductor component and electrically connected to the second ground structure. The semiconductor component and the lid member are electrically connected with the first ground structure and the second ground structure, respectively, such that electrostatic charges and electromagnetic waves can be conducted away individually without damaging the semiconductor component, thereby improving yield and reducing the risk of short circuits. | 03-29-2012 |
20120133032 | PACKAGE HAVING ESD AND EMI PREVENTING FUNCTIONS AND FABRICATION METHOD THEREOF - A package having ESD (electrostatic discharge) and EMI (electromagnetic interference) preventing functions includes: a substrate unit having a ground structure and an I/O structure disposed therein; at least a semiconductor component disposed on a surface of the substrate unit and electrically connected to the ground structure and the I/O structure; an encapsulant covering the surface of the substrate unit and the semiconductor component; and a metal layer disposed on exposed surfaces of the encapsulant and side surfaces of the substrate unit and electrically insulated from the ground structure, thereby protecting the semiconductor component against ESD and EMI so as to improve the product yield and reduce the risk of short circuits. | 05-31-2012 |
20120170162 | SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF - A semiconductor package is provided, which includes a substrate unit having conductive pads and ESD protection pads formed on a bottom surface thereof; an encapsulant covering a top surface of the substrate unit; and a metal layer disposed on a top surface of the encapsulant and having connecting extensions formed on side surfaces of the substrate unit and the encapsulant for electrically connecting the ESD protection pads, wherein portions of the side surfaces of the substrate unit corresponding in position to the conductive pads are exposed from the metal layer so as to ensure that solder bumps subsequently formed to connect the conductive pads of the semiconductor package to a circuit board are not in contact with the metal layer, thereby effectively avoiding the risk of short circuits. | 07-05-2012 |
20120228769 | CARRIER-FREE SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF - A carrier-free semiconductor package includes a circuit structure having an insulating layer and a circuit layer embedded in the insulating layer and having a plurality of conductive traces and RF (radio frequency) traces, a chip disposed on a first surface of the insulating layer and electrically connected to the conductive traces, an encapsulant covering the chip and the circuit layer, a ground layer formed on a second surface of the insulating layer opposite to the first surface, and a plurality of solder balls disposed on the conductive traces or terminals on the conductive traces, wherein portions of the solder balls electrically connect the ground layer so as to allow the RF traces and the ground layer to form a microstrip line having an RF function, thus obtaining a single-layer carrier-free semiconductor package having low cost and simplified RF design. | 09-13-2012 |
20120235259 | SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME - A semiconductor package and a method of fabricating the same. The semiconductor package includes: a substrate having a plurality of semiconductor components disposed thereon; an encapsulant covering the substrate and the semiconductor components; and a metal layer formed on the exposed surfaces of the encapsulant, wherein the encapsulant is formed with a trench for dividing into a plurality of package units on the substrate to allow each of the package units to have at least one of the semiconductor components, and the metal layer is formed in the trench to encompass the encapsulant on the periphery of the semiconductor components, thereby preventing interference of electromagnetic waves between the semiconductor components. | 09-20-2012 |
20140080265 | FABRICATION METHOD OF CARRIER-FREE SEMICONDUCTOR PACKAGE - A carrier-free semiconductor package includes a circuit structure having an insulating layer and a circuit layer embedded in the insulating layer and having a plurality of conductive traces and RF (radio frequency) traces, a chip disposed on a first surface of the insulating layer and electrically connected to the conductive traces, an encapsulant covering the chip and the circuit layer, a ground layer formed on a second surface of the insulating layer opposite to the first surface, and a plurality of solder balls disposed on the conductive traces or terminals on the conductive traces, wherein portions of the solder balls electrically connect the ground layer so as to allow the RF traces and the ground layer to form a microstrip line having an RF function, thus obtaining a single-layer carrier-free semiconductor package having low cost and simplified RF design. | 03-20-2014 |
20140203395 | SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME - A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes: a substrate having a plurality of conductive lands and a plurality of bonding pads surrounding the conductive lands formed on a surface thereof; a plurality of passive devices mounted on the conductive lands; an insulation layer formed on the surface and having a portion of the passive devices embedded therein; a semiconductor chip mounted on a top surface of the insulation layer; a plurality of bonding wires electrically connecting the semiconductor chip and the bonding pads; an encapsulant formed on the surface of the substrate to encapsulate the insulation layer, the bonding wires and the semiconductor chip, wherein a region of the semiconductor chip projected onto the substrate covers a portion of an outermost one of the passive devices. Therefore, the mounting density of the passive devices is improved. | 07-24-2014 |
20140312473 | SHIELD, PACKAGE STRUCTURE AND SEMICONDUCTOR PACKAGE HAVING THE SHIELD AND FABRICATION METHOD OF THE SEMICONDUCTOR PACKAGE - A fabrication method of a semiconductor package is disclosed, which includes the steps of: providing a substrate having at least a carrying region and a cutting region defined on a surface thereof, wherein the cutting region surrounds the carrying region; disposing at least an electronic element on the carrying region of the substrate; disposing a shield having a recess portion and at least a positioning member extending outwards, on the carrying region of the substrate with the electronic element received in the recess portion and the positioning member extending outwards to the cutting region; and performing a cutting process along the cutting region to remove portions of the positioning member and the substrate. Therefore, the shield is precisely positioned on the substrate. | 10-23-2014 |