Patent application number | Description | Published |
20090321148 | TOUCH PANEL DEVICE AND CIRCUITRY THEREOF - A touch panel circuitry, which is coupled to a controller, comprises a plurality of electrode strips and a plurality of conductive traces. The electrode strip configured to provide touch signals has two strip ends. The conductive trace is configured for electrically coupling the two strip ends of the corresponding electrode strip so as to form a closed loop circuit. Each conductive trace is also connected to the controller to transmit signals generated by the corresponding electrode strip. | 12-31-2009 |
20100039396 | TOUCH SENSING APPARATUS AND SENSING SIGNAL PROCESSING METHOD THEREOF - A touch sensing apparatus for accelerating a sensing signal processing operation is provided. The touch sensing apparatus includes a plurality of sets of horizontal sensing lines, a plurality of sets of vertical sensing lines, a plurality of processing circuits, and a plurality of sensing units. The plurality of sensing units output a plurality of sets of horizontal and vertical sensing signals via the plurality of sets of horizontal and vertical sensing lines respectively. Each processing circuit is coupled to corresponding sets of horizontal and vertical sensing lines. Furthermore, disclosed is a sensing signal processing method essentially including scanning the plurality of sets of horizontal sensing lines in synchronization for synchronously fetching the plurality of sets of horizontal sensing signals during a first interval, and scanning the plurality of sets of vertical sensing lines in synchronization for synchronously fetching the plurality of sets of vertical sensing signals during a second interval. | 02-18-2010 |
20100046850 | Multipoint Tracking Method and Related Device - Multipoint tracking is performed by receiving raw data of an image, calculating line average values for a plurality of lines of the raw data, filtering the raw data according to the line average values to generate filtered data, performing a dilation algorithm on the filtered data to generate dilated data, performing an erosion algorithm on the dilated data to generate eroded data, performing edge detection on the eroded data for identifying touch regions of the raw data, performing a labeling algorithm on the touch regions, calculating centers of gravity for the touch regions, and generating a multipoint tracking result according to the centers of gravity. | 02-25-2010 |
20100088595 | Method of Tracking Touch Inputs - For a multitouch input configuration, tracking touch inputs includes calculating a first center position corresponding to two touch points along a first axis for a first frame, detecting variation of the first center position from the first frame to a second frame, and determining a gesture type according to the variation of the first center position. | 04-08-2010 |
Patent application number | Description | Published |
20130166248 | Monitor Test Key of Epi Profile - A method and apparatus for estimating a height of an epitaxially grown semiconductor material in other semiconductor devices. The method includes epitaxially growing first, second, and third portions of semiconductor material on a first semiconductor device, measuring a height of the third portion of semiconductor material and a height of the first or second portion of semiconductor material, measuring a first saturation current through the first and second portions of semiconductor material, measuring a second saturation current through the first and third portions of semiconductor material, and preparing a model of the first saturation current relative to the height of the first or second portion of semiconductor material and the second saturation current relative to an average of the height of the first and third portions of semiconductor material. The model is used to estimate the height of an epitaxially grown semiconductor material in the other semiconductor devices. | 06-27-2013 |
20130175584 | FinFETs and the Methods for Forming the Same - A method includes providing a plurality of semiconductor fins parallel to each other, and includes two edge fins and a center fin between the two edge fins. A middle portion of each of the two edge fins is etched, and the center fin is not etched. A gate dielectric is formed on a top surface and sidewalls of the center fin. A gate electrode is formed over the gate dielectric. The end portions of the two edge fins and end portions of the center fin are recessed. An epitaxy is performed to form an epitaxy region, wherein an epitaxy material grown from spaces left by the end portions of the two edge fins are merged with an epitaxy material grown from a space left by the end portions of the center fin to form the epitaxy region. A source/drain region is formed in the epitaxy region. | 07-11-2013 |
20130175638 | FINFETS AND THE METHODS FOR FORMING THE SAME - A method includes forming a gate stack including a gate electrode on a first semiconductor fin. The gate electrode includes a portion over and aligned to a middle portion of the first semiconductor fin. A second semiconductor fin is on a side of the gate electrode, and does not extend to under the gate electrode. The first and the second semiconductor fins are spaced apart from, and parallel to, each other. An end portion of the first semiconductor fin and the second semiconductor fin are etched. An epitaxy is performed to form an epitaxy region, which includes a first portion extending into a first space left by the etched first end portion of the first semiconductor fin, and a second portion extending into a second space left by the etched second semiconductor fin. A first source/drain region is formed in the epitaxy region. | 07-11-2013 |
20130334615 | FinFETs and the Methods for Forming the Same - A method includes forming a gate stack including a gate electrode on a first semiconductor fin. The gate electrode includes a portion over and aligned to a middle portion of the first semiconductor fin. A second semiconductor fin is on a side of the gate electrode, and does not extend to under the gate electrode. The first and the second semiconductor fins are spaced apart from, and parallel to, each other. An end portion of the first semiconductor fin and the second semiconductor fin are etched. An epitaxy is performed to form an epitaxy region, which includes a first portion extending into a first space left by the etched first end portion of the first semiconductor fin, and a second portion extending into a second space left by the etched second semiconductor fin. A first source/drain region is formed in the epitaxy region. | 12-19-2013 |
20140239414 | FinFETs and the Methods for Forming the Same - A method includes providing a plurality of semiconductor fins parallel to each other, and includes two edge fins and a center fin between the two edge fins. A middle portion of each of the two edge fins is etched, and the center fin is not etched. A gate dielectric is formed on a top surface and sidewalls of the center fin. A gate electrode is formed over the gate dielectric. The end portions of the two edge fins and end portions of the center fin are recessed. An epitaxy is performed to form an epitaxy region, wherein an epitaxy material grown from spaces left by the end portions of the two edge fins are merged with an epitaxy material grown from a space left by the end portions of the center fin to form the epitaxy region. A source/drain region is formed in the epitaxy region. | 08-28-2014 |
20150087090 | MONITOR TEST KEY OF EPI PROFILE - A method and apparatus for estimating a height of an epitaxially grown semiconductor material in other semiconductor devices. The method includes epitaxially growing first, second, and third portions of semiconductor material on a first semiconductor device, measuring a height of the third portion of semiconductor material and a height of the first or second portion of semiconductor material, measuring a first saturation current through the first and second portions of semiconductor material, measuring a second saturation current through the first and third portions of semiconductor material, and preparing a model of the first saturation current relative to the height of the first or second portion of semiconductor material and the second saturation current relative to an average of the height of the first and third portions of semiconductor material. The model is used to estimate the height of an epitaxially grown semiconductor material in the other semiconductor devices. | 03-26-2015 |
Patent application number | Description | Published |
20120072874 | DISSECTION SPLITTING WITH OPTICAL PROXIMITY CORRECTION AND MASK RULE CHECK ENFORCEMENT - The present disclosure provides one embodiment of an integrated circuit (IC) design method. The method includes receiving an IC design layout having a plurality of main features; applying a main feature dissection to the main features of the IC design layout and generating sub-portions of the main features; performing an optical proximity correction (OPC) to the main features; performing a mask rule check (MRC) to a main feature of the IC design layout; and modifying one of the sub-portions of the main feature if the main feature fails the MRC. | 03-22-2012 |
20120115073 | SUB-RESOLUTION ROD IN THE TRANSITION REGION - The present disclosure provides a photomask. The photomask includes a first integrated circuit (IC) feature formed on a substrate; and a second IC feature formed on the substrate and configured proximate to the first IC feature. The first and second IC features define a dense pattern having a first pattern density. The second IC feature is further extended from the dense pattern, forming an isolated pattern having a second pattern density less than the first pattern density. A transition region is defined from the dense pattern to the isolated pattern. The photomask further includes a sub-resolution rod (SRR) formed on the substrate, disposed in the transition region, and connected with the first IC feature. | 05-10-2012 |
20140208283 | DUMMY SHOULDER STRUCTURE FOR LINE STRESS REDUCTION - Semiconductor integrated circuit line structures for improving a process window in the vicinity of dense-to-isolated pattern transition areas and a technique to implement the line structures in the layout process are described in this disclosure. The disclosed structure includes a semiconductor substrate, and a material layer above the substrate. The material layer has a closely spaced dense line structure, an isolated line structure next to the dense line structure, and a dummy line shoulder structure formed in the vicinity of the dense line and the isolated line structures. One end of the dummy line shoulder structure connects to the isolated line structure and another end extends away from the isolated line structure in an orientation substantially perpendicular to the isolated line structure. | 07-24-2014 |
20140256144 | SEMICONDUCTOR FIN FORMATION METHOD AND MASK SET - A mask set and method for forming FinFET semiconductor devices provides a complementary set of fin-cut masks that are used in DPT (double patterning technology) to remove fins from non-active areas of a semiconductor device, after the fins are formed. Adjacent fins, or adjacent groups of fins, are removed using pattern features from different ones of the multiple fin-cut masks. | 09-11-2014 |
Patent application number | Description | Published |
20090102781 | Method for processing images in liquid crystal display - A method for processing images in a liquid crystal display is provided. The method includes the steps of: acquiring a backlight index according to an image; adjusting a backlight according to the backlight index; acquiring a reference gray level according to the adjusted backlight, wherein the reference gray level lies in between a first gray level boundary and a second gray level boundary; transferring a gray level of the image into a corresponding output gray level according to the backlight index when the gray level of the image lying in between the reference gray level and the first gray level boundary; and transferring the gray level of the image into another corresponding output gray level according to a linear relationship when the gray level of the image lying in between the reference gray level and the second gray level boundary. | 04-23-2009 |
20090256850 | Method for Processing Display Data - A method for processing display data includes: storing an image data in a plurality of first-type memories by taking scanning line data as a unit; providing one of the scanning line data stored in a particular memory of the first-type memories to one of a plurality of second-type memories, the particular memory being one of the first-type memories, which are not receiving and storing the image data; and outputting the scanning line data stored in the second-type memories. Time periods for outputting the scanning line data of the image data from the second-type memories are not overlapped. | 10-15-2009 |
20090267968 | Gamma Curve Compensating Method, Gamma Curve Compensating Circuit and Display System using the same - An exemplary gamma curve compensating method is used in a displaying process of a display system for inserting a plurality of grey-scale images to adjust the displaying quality of the display system. A grey-scale luminance of each grey-scale image is one of the grey-scales. The gamma curve compensating method includes: providing a plurality of look-up tables (LUTs) according to the different grey-scales; selecting a specific grey-scale of the different grey-scales as a grey-scale luminance of one of the grey-scale images and accordingly selecting a specific LUT of the LUTs corresponding to the specific grey-scale; and performing a gamma-curve compensating based on the specific LUT to keep the gamma curve of the display system invariable in the displaying process. A gamma curve compensating circuit and a display system for performing the gamma curve compensating method are also provided in the present invention. | 10-29-2009 |
20110080396 | DRIVING METHOD FOR REDUCING IMAGE STICKING - A driving method with reducing image sticking effect is disclosed. The driving method includes applying a voltage on the data lines for trapping impurities crossing the data lines and lowering the degree of the image sticking effect, and applying different asymmetric waveforms to different data lines for trapping impurities crossing the data lines and lowering the degree of the image sticking effect. | 04-07-2011 |
20110115780 | DRIVING METHOD FOR REDUCING IMAGE STICKING - A driving method with reducing image sticking effect is disclosed. The driving method includes applying a voltage on the data lines for trapping impurities crossing the data lines and lowering the degree of the image sticking effect, and applying different asymmetric waveforms to different data lines for trapping impurities crossing the data lines and lowering the degree of the image sticking effect. | 05-19-2011 |
20110227892 | DRIVING APPARATUS FOR DRIVING A DISPLAY PANEL AND SOURCE DRIVER THEREOF - A driving apparatus for driving a display panel includes a timing controller and a plurality of source drivers. The timing controller has a first output port and a second output port. The first output port is employed to output a first clock signal and plural first data signals. The second output port is employed to output a second clock signal and plural second data signals. Each source driver includes at least two operation mode control ends for receiving an operation mode control signal having at least two bits for setting at least first to third operation modes. If the operation mode control signal sets the source driver to operate in the first operation mode, the source driver is electrically connected to both the first and second output ports, for driving the display panel according to the first data signals, the second data signals, the first clock and the second clock. | 09-22-2011 |
20110273226 | GATE DRIVING CIRCUIT - An exemplary gate driving circuit is adapted for receiving an external gate power supply voltage and an external control signal, sequentially generating multiple internal shift data signal groups and thereby sequentially outputting multiple gate signals. Each of the internal shift data signal groups includes multiple sequentially-generated internal shift data signals. The gate driving circuit includes multiple gate signal generating modules. Each of the gate signal generating modules includes a voltage modulation circuit and a gate output buffer circuit. The voltage modulation circuit modulates the external gate power supply voltage according to a corresponding one of the internal shift data signal groups and the external control signal, and thereby a modulated voltage signal is obtained. The gate output buffer circuit includes a plurality of parallel-coupled output stages. The output stages output the modulated voltage signal as a part of the gate signals during the output stages being sequentially enabled. | 11-10-2011 |
20110285693 | DRIVING METHOD FOR REDUCING IMAGE STICKING - A driving method with reducing image sticking effect is disclosed. The driving method includes applying a voltage on the data lines for trapping impurities crossing the data lines and lowering the degree of the image sticking effect, and applying different asymmetric waveforms to different data lines for trapping impurities crossing the data lines and lowering the degree of the image sticking effect. | 11-24-2011 |
20120086627 | Display Device with Bi-directional Shift Registers - A display device having bi-directional shift registers is disclosed. The display device includes a display panel which has N gate lines, a first set of dummy registers, a second set of dummy registers, a plurality of valid shift registers coupled between the two sets of dummy registers, and a first start pulse signal generator coupled to the first valid register for generating the first start pulse signal to the first valid register to enable the first gate line. The first valid register is coupled to the first set of dummy registers. The Nth valid register is coupled to the second set of dummy registers. | 04-12-2012 |
20120200551 | DRIVING METHOD FOR REDUCING IMAGE STICKING - A driving method with reducing image sticking effect is disclosed. The driving method includes applying a voltage on the data lines for trapping impurities crossing the data lines and lowering the degree of the image sticking effect, and applying different asymmetric waveforms to different data lines for trapping impurities crossing the data lines and lowering the degree of the image sticking effect. | 08-09-2012 |
20130127806 | DISPLAY PANEL AND METHOD FOR DRIVING THE SAME - A display panel includes a switch control circuit, a first pre-charge switch circuit and a second pre-charge switch circuit. The switch control circuit is used for comparing the most significant bits (MSBs) of data signals to generate switch control signals for controlling the first and second pre-charge switch circuits, such that data lines are pre-charged through the first and second pre-charge switch circuits respectively. A method for driving a display panel is also provided herein. | 05-23-2013 |
20140062986 | DRIVING CIRCUIT CHIP AND DRIVING METHOD FOR DISPLAY - A driving method for a display apparatus used in a driving circuit chip, includes: receiving first and second voltages; outputting the first and second voltages to a first input-stage circuit of a first amplifier and a second input-stage circuit of a second amplifier, respectively, in a first period; outputting the first and second voltages to the second input-stage circuit and the first input-stage circuit, respectively, in a second period; receiving a third voltage outputted from the first input-stage circuit and a fourth voltage outputted from the second input-stage circuit; outputting the third and fourth voltages to the first and second output-stage circuits, respectively, in the first period; and outputting the third and fourth voltages to the second and first output-stage circuits, respectively, in the second period. A driving circuit chip is also provided. | 03-06-2014 |
20140078190 | DISPLAY-DRIVING STRUCTURE AND SIGNAL TRANSMISSION METHOD THEREOF AND MANUFACTURING METHOD THEREOF - A display-driving structure for driving a display panel is disclosed. The display-driving structure includes a first circuit board, a second circuit board, a transmission wiring, a first circuit, a second circuit, first source driver circuits and second source driver circuits. The transmission wiring is connected between the first circuit board and the second circuit board. The first circuit is disposed on the first circuit board for generating a first signal. The second circuit is disposed on the second circuit board for generating a second signal. The first source driver circuits receive the first signal from the first circuit board, and further receive the second signal via the transmission wiring and the second circuit board. The second source driver circuits receive the second signal from the second circuit board, and further receive the first signal via the transmission wiring and the first circuit board. | 03-20-2014 |