Patent application number | Description | Published |
20110273075 | DISPLAY DEVICE - A display device is provided with a Cu alloy film having high adhesiveness to a transparent substrate and a low electrical resistivity. The Cu alloy film for the display device is directly brought into contact with the transparent substrate, and the Cu alloy film has the multilayer structure, which includes a first layer (Y) composed of a Cu alloy containing, in total, 2-20 atm % of at least one element selected from among a group composed of Zn, Ni, Ti, Al, Mg, Ca, W, Nb, and Mn, and a second layer (X) which is composed of pure Cu or substantially a Cu alloy having Cu as the main component and has an electrical resistivity lower than that of the first layer (Y). The first layer (Y) is brought into contact with the transparent substrate. | 11-10-2011 |
20120119207 | INTERCONNECTION STRUCTURE AND METHOD FOR MANUFACTURING THE SAME, AND DISPLAY DEVICE INCLUDING INTERCONNECTION STRUCTURE - Disclosed is an interconnection structure which, in a display device such as an organic EL display and a liquid crystal display, is capable of stably connecting a semiconductor layer directly to an Al-base film constituting, for example, a source electrode or a drain electrode; and which hardly causes galvanic corrosion between the semiconductor layer and the Al-base film in an electrolyte solution to be used in a wet process and is able to suppress stripping of the Al-base film. It is an interconnection structure including a semiconductor layer of a thin-film transistor and an Al alloy film connected directly to the semiconductor layer above a substrate in this order from the side of the substrate, wherein the semiconductor layer is composed of an oxide semiconductor, and the Al alloy film contains at least one of Ni and Co. | 05-17-2012 |
20120126227 | INTERCONNECTION STRUCTURE AND DISPLAY DEVICE INCLUDING INTERCONNECTION STRUCTURE - A novel interconnection structure which is excellent in adhesion and is capable of realizing low resistance and low contact resistance is provided. An interconnection structure including an interconnection film and a semiconductor layer of a thin film transistor above a substrate in this order from the side of a substrate, wherein the semiconductor layer is composed of an oxide semiconductor, is provided. | 05-24-2012 |
20120301732 | AL ALLOY FILM FOR USE IN DISPLAY DEVICE - Disclosed is an Al alloy film for use in a display device, which does not undergo the formation of hillocks even when exposed to high temperatures of about 450° C. to 600° C., and has excellent high-temperature heat resistance, low electrical resistance (wiring resistance) and excellent corrosion resistance under alkaline environments. Specifically disclosed is an Al alloy film for use in a display device, which comprises at least one element selected from a group X consisting of Ta, Nb, Re, Zr, W, Mo, V, Hf and Ti and at least one rare earth element, and which meets the following requirement (1) when heated at 450° C. to 600° C. (1) Precipitates each having an equivalent circle diameter of 20 nm or more are present at a density of 500,000 particles/mm | 11-29-2012 |
20130026470 | WIRING STRUCTURE, DISPLAY APPARATUS, AND SEMICONDUCTOR DEVICE - Disclosed is a wiring structure that attains excellent low-contact resistance even if eliminating a barrier metal layer that normally is disposed between a Cu alloy wiring film and a semiconductor layer, and wiring structure with excellent adhesion. The wiring structure is provided with a semiconductor layer, and a Cu alloy layer, on a substrate in this order from the substrate side. A laminated structure is included between the semiconductor layer, and the Cu alloy layer. The laminated structure is composed of a (N, C, F, O) layer which contains at least one element selected from among a group composed of nitrogen, carbon, fluorine, and oxygen, and a Cu—Si diffusion layer which includes Cu and Si, in this order from the substrate side. At least one element selected from among the group composed of nitrogen, carbon, fluorine, and oxygen that composes the (N, C, F, O) layer is bonded to Si in the semiconductor layer. The Cu alloy layer is a laminated structure containing a Cu—X alloy layer (a first layer) and a second layer. | 01-31-2013 |
20140167038 | THIN FILM TRANSISTOR, THIN FILM TRANSISTOR ARRAY PANEL, AND MANUFACTURING METHOD OF THIN FILM TRANSISTOR - The inventive concept relates to a thin film transistor and a thin film transistor array panel and, in detail, relates to a thin film transistor including an oxide semiconductor. A thin film transistor according to an exemplary embodiment of the inventive concept includes: a gate electrode; a gate insulating layer positioned on or under the gate electrode; a first semiconductor and a second semiconductor that overlap the gate electrode with the gate insulating layer interposed therebetween, the first semiconductor and the second semiconductor contacting each other; a source electrode connected to the second semiconductor; and a drain electrode connected to the second semiconductor and facing the source electrode, wherein the second semiconductor includes gallium (Ga) that is not included in the first semiconductor, and a content of gallium (Ga) in the second semiconductor is greater than 0 at. % and less than or equal to about 33 at. %. | 06-19-2014 |
20140346498 | THIN FILM TRANSISTOR, DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING A THIN FILM TRANSISTOR - A thin film transistor includes a gate electrode, a channel overlapped with the gate electrode, a source electrode contacting the channel, and a drain electrode spaced apart from the source electrode and contacting the channel. The channel includes indium-zinc-tin oxide sourced from a source including a single phase indium-zinc-tin oxide. | 11-27-2014 |
20150123116 | THIN FILM TRANSISTOR - Provided is a thin film transistor having an oxide semiconductor layer that has high mobility, excellent stress resistance, and good wet etching property. The thin film transistor comprises at least, a gate electrode, a gate insulating film, an oxide semiconductor layer, source-drain electrode and a passivation film, in this order on a substrate. The oxide semiconductor layer is a laminate comprising a first oxide semiconductor layer (IGZTO) and a second oxide semiconductor layer (IZTO). The second oxide semiconductor layer is formed on the gate insulating film, and the first oxide semiconductor layer is formed between the second oxide semiconductor layer and the passivation film. The contents of respective metal elements relative to the total amount of all the metal elements other than oxygen in the first oxide semiconductor layer are as follows; Ga: 5% or more; In: 25% or less (excluding 0%); Zn: 35 to 65%; and Sn: 8 to 30%. | 05-07-2015 |