Patent application number | Description | Published |
20090203927 | Homogeneous asymmetric hydrogenation catalyst - Provide that a useful catalyst for homogeneous hydrogenation, particularly a catalyst for homogeneous asymmetric hydrogenation for hydrogenation, particularly asymmetric hydrogenation, which is obtainable with comparative ease and is excellent in economically and workability, and a process for producing a hydrogenated compound of an unsaturated compound, particularly an optically active compound using said catalyst with a high yield and optical purity. | 08-13-2009 |
20110065929 | HOMOGENEOUS ASYMMETRIC HYDROGENATION CATALYST - Provide that a useful catalyst for homogeneous hydrogenation, particularly a catalyst for homogeneous asymmetric hydrogenation for hydrogenation, particularly asymmetric hydrogenation, which is obtainable with comparative ease and is excellent in economically and workability, and a process for producing a hydrogenated compound of an unsaturated compound, particularly an optically active compound using said catalyst with a high yield and optical purity. | 03-17-2011 |
20110201819 | METHOD FOR PRODUCING ALCOHOL COMPOUND - Disclosed is a practical method for efficiently producing an alcohol compound by hydrogenating an aldehyde by using a homogeneous copper catalyst which is an easily-available low-cost metal species. Specifically disclosed is a method for producing an alcohol compound, which is characterized in that a hydrogenation reaction of an aldehyde compound is performed in the presence of a homogeneous copper catalyst and a diphosphine compound. | 08-18-2011 |
20110201820 | METHOD FOR PRODUCING ALCOHOL COMPOUND - Disclosed is a practical method for efficiently producing an alcohol compound by hydrogenating an aldehyde by using a homogeneous copper catalyst which is an easily-available low-cost metal species. Specifically disclosed is a method for producing an alcohol compound, which is characterized in that a hydrogenation reaction of an aldehyde compound is performed in the presence of a homogeneous copper catalyst, a monophosphine compound and an alcohol selected from the group consisting of primary alcohols, secondary alcohols and mixtures of those. | 08-18-2011 |
Patent application number | Description | Published |
20090016087 | Switching power source - An error voltage Verr, as amplified by an amplifier, and an input voltage Vin, are multiplied together by a multiplier to generate a first threshold value signal Vth | 01-15-2009 |
20100110738 | Switching power supply apparatus - In a switching power supply apparatus, multiplier | 05-06-2010 |
20100246227 | Switching power supply - A switching power supply has a full-wave AC rectifier circuit; a chopper circuit including an inductor, a capacitor smoothing current from the inductor, and a switching device for on-off control of the current fed to the capacitor. The rectifier circuit further has an input voltage detector circuit detecting chopper circuit input voltage; an output voltage error detector circuit detecting an error between an output voltage from the chopper circuit and a set voltage; a current control signal generator circuit generating a current control signal in-phase with an input voltage detection signal having a waveform similar to the input voltage detection signal and an amplitude proportional to an output voltage error signal; a current detector circuit detecting inductor current flow; a frequency setting circuit; an oscillator circuit; and a switching control circuit switching the switching device based on oscillation circuit signal, the current control signal, and the current detection signal. | 09-30-2010 |
20110207267 | REVERSE BLOCK-TYPE INSULATED GATE BIPOLAR TRANSISTOR MANUFACTURING METHOD - A reverse block-type insulated gate bipolar transistor (IGBT) manufacturing method that, when manufacturing a reverse block-type IGBT having a separation layer formed along tapered surfaces of a V-shaped groove formed using anisotropic etching, can secure a highly reliable reverse pressure resistance, and suppress a leakage current when reverse biasing. When irradiating with a flash lamp for flash lamp annealing after implantation of ions into a second conductivity type separation layer and second conductivity type collector layer to form the second conductivity type collector layer and second conductivity type separation layer, the strongest portion of radiation energy is focused on a depth position from the upper portion to the central portion of a tapered side edge surface. | 08-25-2011 |
20130116438 | IRIDIUM COMPLEX AND METHOD FOR PRODUCING OPTICALLY ACTIVE COMPOUND - An object of the present invention is to provide a novel iridium complex, and to provide a novel catalyst having excellent performances in terms of enantioselectivity, catalytic activity, and the like. Provided is an iridium complex of the following general formula (1): | 05-09-2013 |
20130244089 | SECONDARY BATTERY DEVICE - According to one embodiment, a secondary battery device includes a secondary battery cell, a case configured to accommodate the secondary battery cell, and foam coating layers sandwiched between an outer surface of the secondary battery cell and an inner surface of the case and configured to hold the secondary battery cell. | 09-19-2013 |
20130344663 | REVERSE BLOCK-TYPE INSULATED GATE BIPOLAR TRANSISTOR MANUFACTURING METHOD - A reverse block-type insulated gate bipolar transistor (IGBT) manufacturing method that, when manufacturing a reverse block-type IGBT having a separation layer formed along tapered surfaces of a V-shaped groove formed using anisotropic etching, can secure a highly reliable reverse pressure resistance, and suppress a leakage current when reverse biasing. When irradiating with a flash lamp for flash lamp annealing after implantation of ions into a second conductivity type separation layer and second conductivity type collector layer to form the second conductivity type collector layer and second conductivity type separation layer, the strongest portion of radiation energy is focused on a depth position from the upper portion to the central portion of a tapered side edge surface. | 12-26-2013 |
Patent application number | Description | Published |
20080215955 | SEMICONDUCTOR STORAGE DEVICE - A semiconductor storage device includes: a memory configured to store data at a first address and store an error detecting code corresponding to the data at a second address which is set up in a predetermined relation with the first address and different from the first address; and an address storage portion configured to store information on address relation between the first address and the second address. | 09-04-2008 |
20090024887 | SEMICONDUCTOR STORAGE DEVICE, DATA WRITE METHOD AND DATA READ METHOD - A semiconductor storage device includes an arithmetic operation unit configured to perform an arithmetic operation of generating a different error detecting code depending on the information of a memory address, using the data and the information of the memory address in a memory cell into which the data is written, and a storage unit configured to store the data and the error detecting code in the memory cell. | 01-22-2009 |
20100137615 | Homogeneous Asymmetric Hydrogenation Process - Provide that a useful catalyst for homogeneous hydrogenation, particularly a catalyst for homogeneous asymmetric hydrogenation for hydrogenation, particularly asymmetric hydrogenation, which is obtainable with comparative ease and is excellent in economically and workability, and a process for producing a hydrogenated compound of an unsaturated compound, particularly an optically active compound using said catalyst with a high yield and optical purity. | 06-03-2010 |
20100168440 | Homogeneous Asymmetric Hydrogenation Process - Provide that a useful catalyst for homogeneous hydrogenation, particularly a catalyst for homogeneous asymmetric hydrogenation for hydrogenation, particularly asymmetric hydrogenation, which is obtainable with comparative ease and is excellent in economically and workability, and a process for producing a hydrogenated compound of an unsaturated compound, particularly an optically active compound using said catalyst with a high yield and optical purity. | 07-01-2010 |
20120069997 | ENCRIPTION DEVICE AND DECRYPTION DEVICE - According to one embodiment, an encryption device includes a storage unit, an input unit, first to fourth partial encryption units, a generation unit, and an output unit. The first partial encryption unit calculates first intermediate data from input plain data to store in the storage unit. The generation unit generates a round key, which is used in calculations for the first intermediate data and N-th intermediate data, from the secret key. The second partial encryption unit calculates (i+1)th intermediate data from i-th intermediate data (i is smaller than N) and the round key to store in the storage unit. The third partial encryption unit performs an arithmetic operation including predetermined conversion for mixing the N-th intermediate data, and calculates (N+1)th intermediate data to store in the storage unit. The fourth partial encryption unit obtains encrypted data by performing an arithmetic operation including inverse conversion of the conversion on the (N+1)th intermediate data. | 03-22-2012 |
20120069998 | ENCRYPTION DEVICE - According to one embodiment, in an encryption device, a segmentation unit segments masked plain data into pieces of first segmented data. A first processing unit generates pieces of second segmented data from the pieces of first segmented data. A nonlinear transform unit generates pieces of third segmented data transformed from the pieces of second segmented data. A data integration unit integrates fourth segmented data to generate masked encrypted data. An unmask processing unit generates encrypted data from the masked encrypted data. The exclusive OR of the pieces of second segmented data matches the exclusive OR of input data, subjected to nonlinear transform processing and calculated from the plain data, and the first mask. The exclusive OR of the pieces of third segmented data matches the exclusive OR of transform data, obtained when the nonlinear transform processing is performed on the input data, and the second mask. | 03-22-2012 |
20120131078 | ARITHMETIC DEVICE - According to one embodiment, a first shift amount calculation unit counts the number of continuous zeros from a less significant bit toward a more significant bit of an intermediate result of a computation of Montgomery multiplication result z and calculates a first shift amount. A second shift amount calculation unit counts the number of continuous zeros from a less significant bit toward a more significant bit of redundant-binary-represented integer x and calculates a second shift amount. An addition/subtraction unit calculates the intermediate result by adding/subtracting, with respect to the intermediate result which has been bit-shifted by the first shift amount, the integer p, and the integer y which has been bit-shifted by the second shift amount. An output unit outputs, as the Montgomery multiplication result z, the intermediate result when the sum of the first shift amounts is equal to the number of bits of the integer p. | 05-24-2012 |
20120307997 | ENCRYPTION DEVICE - According to an embodiment, an encryption device performs encryption processing using an encryption key and calculates encrypted data from plain data. The encryption device includes: a register; an input unit configured to receive plain data; a first partial encryption unit configured to calculate first intermediate data from the plain data; a second partial encryption unit configured to calculate (i+1)-th intermediate data based on i-th intermediate data and the encryption key; a first transform unit configured to: transform j-th intermediate data into j-th transformed data; and store the j-th transformed data in the register; and a second transform unit configured to transform the j-th transformed data into the j-th intermediate data; a third partial encryption unit configured to calculate encrypted data from the N-th intermediate data. The second partial encryption unit is configured to repeat processing to calculate (j+1)-th intermediate data while j is equal to from 1 to N−1. | 12-06-2012 |
20130202105 | ARITHMETIC DEVICE - According to an embodiment, an arithmetic device includes an arithmetic processing unit, an address generating unit, and a control unit. The arithmetic processing unit performs a plurality of arithmetic processing used in an encryption method. Based on an upper bit of the address of the first piece of data and based on an offset which is a value corresponding to a counter value and which is based on the address of the first piece of data, the address generating unit generates addresses of the memory device. The control unit controls the arithmetic processing unit in such a way that the arithmetic processing is done in a sequence determined in the encryption method, and that specifies an update of the counter value at a timing of modifying the type of data and at a timing of modifying data. | 08-08-2013 |
20130243191 | ENCRYPTION KEY GENERATING APPARATUS - According to an embodiment, an encryption key generating apparatus includes first to third calculators. The first calculator executes a first round operation to a first portion of first data. The second calculator executes the first round to a second portion of second data pieces. Each second data piece includes the first portion of the first data to which the first round operation has been completed and the second portion obtained by changing at least a part of the first data other than the first portion. At least a part of the second portion is different from that of each of the other second portions. The second calculator executes the first round operation to each second portion. The third calculator unit executes operations of the second and subsequent rounds to the second data pieces. | 09-19-2013 |
20150121042 | ARITHMETIC DEVICE - According to an embodiment, an arithmetic device includes an arithmetic processing unit, an address generating unit, and a control unit. The arithmetic processing unit performs a plurality of arithmetic processing used in an encryption method. Based on an upper bit of the address of the first piece of data and based on an offset which is a value corresponding to a counter value and which is based on the address of the first piece of data, the address generating unit generates addresses of the memory device. The control unit controls the arithmetic processing unit in such a way that the arithmetic processing is done in a sequence determined in the encryption method, and that specifies an update of the counter value at a timing of modifying the type of data and at a timing of modifying data. | 04-30-2015 |
Patent application number | Description | Published |
20080312145 | Agent for Regulating Bone Formation - The present invention provides preventive, ameliorating, and/or therapeutic agents for diseases caused by a disturbed balance between bone formation and bone resorption. The decoys of the present invention induce normal bone metabolism by inhibiting the differentiation-inducing factors of cells involved in bone metabolism. For example, bone resorption can be controlled by using a decoy of the present invention to inhibit NF-κB, a transcriptional regulatory factor that regulates osteoclast differentiation. This method uses a mechanism different from those of previous pharmaceutical agents; therefore, one can expect it to be effective for cases in which existing pharmaceutical agents were not effective. | 12-18-2008 |
20090142628 | Battery system cooled via coolant - The battery system cooled via coolant has a battery block | 06-04-2009 |
20090142650 | Battery system - A battery system includes: a battery block defining a cooling gap between battery cells composed of a plurality of rectangular/prismatic cells; and a gas blower forcibly blowing the gas through the gap in the block. The block, set in two separate arrays, is provided therebetween with an intermediate duct connected to each of the gaps. An outer duct is provided outside the block set in two separate arrays, and the plurality of gaps are parallel-connected between the outer duct and the intermediate duct. The gas blower forcibly blows the gas from the intermediate duct to the outer duct, and the gas forcibly blown is branched from the intermediate duct to be blown through each of the gaps to cool the cells. The gas having passed through the gaps and cooled the cells is collected at and exhausted from the outer duct. | 06-04-2009 |
20090142653 | Battery system with battery cells arranged in array alignment - A battery system includes a battery block, a cooling pipe, and a coolant feeding device. The battery block includes a plurality of rectangular batteries that have a width greater than a thickness and are securely arranged in array alignment by a battery holder. The cooling pipe cools the rectangular batteries of the battery block. The coolant feeding device feeds coolant to the cooling pipe. In the battery system, the cooling pipe is arranged on the surface of the battery block in a thermally-coupled state so that the rectangular batteries are cooled by the coolant, which is circulated through the cooling pipe. | 06-04-2009 |
20120046327 | METHOD FOR INHIBITING THE INDUCTION AND FORMATION OF OSTEOCLASTS - Methods for (i) inhibiting the induction and formation of osteoclasts, (ii) inhibiting RANKL expression in osteoblasts, (ii) inhibiting the activation of osteoclasts and (iv) inhibiting a decrease in bone density by administering to a warm-blooded animal in need thereof a pharmacologically effective amount of a compound selected from the group consisting of olmesartan and olmesartan medoxomil, a pharmacologically acceptable salt thereof or a pharmacologically acceptable ester thereof. | 02-23-2012 |
Patent application number | Description | Published |
20090100226 | Cache memory device and microprocessor - A cache controller is connected to a processor and a main memory. The cache controller is also connected to a cache memory that can read and write at a speed higher than the main memory. The cache memory is provided with a plurality of cache lines that include a tag area storing an address on the main memory, a capacity area storing a capacity value of a cache block, and a cache block. When a read request is executed from the processor to the main memory, the cache controller checks whether the requested data is present in the cache memory or not. A cache capacity determination unit determines a capacity value for the cache block and supplies to a capacity area. | 04-16-2009 |
20130252075 | BATTERY ASSEMBLY AND ELECTRICALLY CONDUCTIVE MEMBER - According to one embodiment, battery assembly includes casing, accumulators, and conductive member. The conductive member has two first walls, two second walls, and third wall. One of the first walls is connected to one of a cathode and an anode of one of the accumulators, and extended along a front surface of the casing. Other one of the first walls is connected to one of the cathode and the anode of other one of the accumulators, and extended along the front surface. The second walls are connected to the first walls via two first curve portions, respectively, and extended in direction crossing the front surface. The third wall is connected to the second walls via two second curve portions, respectively, and extended over between the two second walls in direction along the front surface at a position apart from the front surface. | 09-26-2013 |
Patent application number | Description | Published |
20080292100 | NON-LINEAR DATA CONVERTER, ENCODER AND DECODER - According to an aspect of the present invention, there is provided a non-linear data converter including: first to fourth converters that each performs a respective converting process on an input bit string to output respective output bit string; a generator that generates a random number bit string; and a selector that selects any one of the output bit strings from the first to fourth converters based on the random number bit string. Each of the converting processes is equivalent to performing a first mask process, a non-linear conversion predetermined for an encoding or a decoding and a second mask process. | 11-27-2008 |
20130238931 | NONVOLATILE SEMICONDUCTOR STORAGE DEVICE HAVING ENCRYPTING ARITHMETIC DEVICE - According to one embodiment, a nonvolatile semiconductor storage device includes an encrypting circuit for operating in a predetermined encrypting system, a memory cell array preliminarily storing complementary data to be used in the operation, and a page buffer having a first region for storing the data being read out from the memory cell array, and a second region used when executing the operation. | 09-12-2013 |
20150161060 | NONVOLATILE SEMICONDUCTOR STORAGE DEVICE HAVING ENCRYPTING ARITHMETIC DEVICE - According to one embodiment, a nonvolatile semiconductor storage device includes an encrypting circuit for operating in a predetermined encrypting system, a memory cell array preliminarily storing complementary data to be used in the operation, and a page buffer having a first region for storing the data being read out from the memory cell array, and a second region used when executing the operation. | 06-11-2015 |
Patent application number | Description | Published |
20110160626 | PELVIC FRAME AND WALKING ASSISTANCE DEVICE USING THE SAME - A pelvic frame ( | 06-30-2011 |
20110168485 | BELT BUCKLE DEVICE - In a belt buckle device including a tongue piece ( | 07-14-2011 |
20110172570 | WALKING ASSISTANCE DEVICE - In a walking assistance device configured to apply a walking assistance force to a femoral part of a user, a walking assistance force provided by a power generator mounted on a pelvic support assembly is transmitted to a femoral part of the user via a femoral support assembly. The femoral support assembly includes a swing arm ( | 07-14-2011 |
20110172571 | WALKING ASSISTANCE DEVICE - In a walking assistance device ( | 07-14-2011 |
20120095373 | WALKING ASSISTANCE DEVICE - A walking assistance device applies a walking assistance force from an electric motor to a femoral part of a user. The device comprises a communication unit and an operation switch enabling unit. The operation switch enabling unit disables an operation switch of the walking assistance device until the communication unit receives a signal from an external device even when a power switch is turned on, and enables the operation switch when the communication unit has received a signal from the external device while the power switch is turned on. Thus, unauthorized use of the walking assistance device is prevented, and operation of the walking assistance device is supervised with control parameters suited for the particular user. Also, the walking assistance device can be shared by a plurality of users, and each user can use the walking assistance device with pre-selected control parameters that optimally suit the particular user. | 04-19-2012 |
20120316476 | WALKING ASSISTANCE DEVICE - In a walking assistance device ( | 12-13-2012 |