Patent application number | Description | Published |
20090038493 | Printing in a medium - A method for transferring a pattern from an elastic stamp to a substrate in the presence of a third medium is described. A proximity contact is achieved between the stamp and the substrate. A layer of the third medium between the stamp and the substrate is controlled to a predetermined thickness. Stamps for carrying out this method are also described. | 02-12-2009 |
20090146133 | HYBRID SEMICONDUCTOR STRUCTURE - A method for the fabrication of a semiconductor structure that includes areas that have different crystalline orientation and semiconductor structure formed thereby. The disclosed method allows fabrication of a semiconductor structure that has areas of different semiconducting materials. The method employs templated crystal growth using a Vapor-Liquid-Solid (VLS) growth process. A silicon semiconductor substrate having a first crystal orientation direction is etched to have an array of holes into its surface. A separation layer is formed on the inner surface of the hole for appropriate applications. A growth catalyst is placed at the bottom of the hole and a VLS crystal growth process is initiated to form a nanowire. The resultant nanowire crystal has a second different crystal orientation which is templated by the geometry of the hole. | 06-11-2009 |
20090200540 | Metal-Oxide-Semiconductor Device Including a Multiple-Layer Energy Filter - A MOS device includes first and second source/drains spaced apart relative to one another. A channel is formed in the device between the first and second source/drains. A gate is formed in the device between the first and second source/drains and proximate the channel, the gate being electrically isolated from the first and second source/drains and the channel. The gate is configured to control a conduction of the channel as a function of a potential applied to the gate. The MOS device further includes an energy filter formed between the first source/drain and the channel. The energy filter includes a superlattice structure wherein a mini-band is formed. The energy filter is operative to control an injection of carriers from the first source/drain into the channel. The energy filter, in combination with the first source/drain, is configured to produce an effective zero-Kelvin first source/drain. | 08-13-2009 |
20090200605 | Metal-Oxide-Semiconductor Device Including an Energy Filter - A MOS device includes first and second source/drains spaced apart relative to one another. A channel is formed in the device between the first and second source/drains. A gate is formed in the device between the first and second source/drains and proximate the channel, the gate being electrically isolated from the first and second source/drains and the channel. The gate is configured to control a conduction of the channel as a function of a potential applied to the gate. The MOS device further includes an energy filter formed between the first source/drain and the channel. The energy filter includes an impurity band operative to control an injection of carriers from the first source/drain into the channel. | 08-13-2009 |
20090208882 | STAMP FOR PATTERNING, METHOD FOR MANUFACTURING SUCH STAMP AND METHOD FOR MANUFACTURING AN OBJECT USING THE STAMP - A stamp for patterning onto a receiving surface of an object ( | 08-20-2009 |
20090237758 | METHOD FOR PRINTING A BINARY HOLOGRAM ON A MANUFACTURED PRODUCT, AND OPTICAL LENS WITH A BINARY HOLOGRAM PRINTED THEREON - A method for printing a binary hologram on a manufactured product comprises the provision of a stamp with a pattern corresponding to the hologram ( | 09-24-2009 |
20100072460 | NANOELECTRONIC DEVICE - An electronic device and method of manufacturing the device. The device includes a semiconducting region, which can be a nanowire, a first contact electrically coupled to the semiconducting region, and at least one second contact capacitively coupled to the semiconducting region. At least a portion of the semiconducting region between the first contact and the second contact is covered with a dipole layer. The dipole layer can act as a local gate on the semiconducting region to enhance the electric properties of the device. | 03-25-2010 |
20100176089 | CONFINEMENT OF FLUIDS ON SURFACES - The invention is directed to a device for applying a fluid to a surface, the device comprising a first conduit for directing a flow of a first fluid towards the surface and a second conduit for directing a flow of a second fluid away from the surface, the first conduit being arranged relative to the second conduit such that in operation of the device the second fluid comprises substantially the first fluid, and wherein said first conduit comprises a first aperture and the second conduit comprises a second aperture, the first aperture arranged at a distance from the second aperture. | 07-15-2010 |
20110269302 | METHOD OF FABRICATING A SEMICONDUCTOR DEVICE - The invention relates to a method of fabricating a semiconductor device. The method includes: providing a semiconductor substrate and locally heating the semiconductor substrate by using a heated tip structure. Locally heating the semiconductor substrate is carried out to locally modify the electrical properties of the semiconductor substrate. The semiconductor substrate can be implanted with dopants, so that locally heating step causes a local activation of the implanted dopants. Furthermore, the semiconductor substrate can be provided with a dopant layer, so that locally heating step causes dopants to diffuse into the semiconductor substrate. | 11-03-2011 |
20110315953 | METHOD OF FORMING COMPOUND SEMICONDUCTOR - A method of forming a semiconductor is provided and includes patterning a pad and a nanowire onto a wafer, the nanowire being substantially perpendicular with a pad sidewall and substantially parallel with a wafer surface and epitaxially growing on an outer surface of the nanowire a secondary layer of semiconductor material, which is lattice mismatched with respect to a material of the nanowire and substantially free of defects. | 12-29-2011 |
20120280292 | SEMICONDUCTOR DEVICES WITH SCREENING COATING TO INHIBIT DOPANT DEACTIVATION - A semiconductor device and a method for fabricating the semiconductor device. The device includes: a doped semiconductor having a source region, a drain region, a channel between the source and drain regions, and an extension region between the channel and each of the source and drain regions; a gate formed on the channel; and a screening coating on each of the extension regions. The screening coating includes: (i) an insulating layer that has a dielectric constant that is no greater than about half that of the extension regions and is formed directly on the extension regions, and (ii) a screening layer on the insulating layer, where the screening layer screens the dopant ionization potential in the extension regions to inhibit dopant deactivation. | 11-08-2012 |