Patent application number | Description | Published |
20130035640 | FLUID DRUG DELIVERY SYSTEM AND METHOD FOR MANUFACTURING A DRUG DELIVERY SYSTEM - A fluid drug delivery system comprises a rigid shell having an inner sidewall, an opening and a passage as well as a collapsible cartridge with a distal end and a proximal end. The collapsible cartridge is arranged within the shell with its distal end being closer to the opening than the proximal end. It further comprises a first portion including the proximal end and a second portion including the distal end. The second portion is recoilable from the inner sidewall to urge a fluid, which comprises a drug and is contained in the collapsible cartridge, to the passage of the rigid shell. Further, the rigid shell and the collapsible cartridge are co-extruded. | 02-07-2013 |
20150126928 | DRUG DELIVERY DEVICE - The invention relates to a drug delivery device, comprising a control unit, a drive unit, a pressurizing medium container arranged to contain a pressurizing liquid, a drug container arranged to contain a drug and a discharge nozzle, wherein the drive unit when controlled and energized by the control unit is arranged to generate a pressure gradient in the pressurizing liquid thereby propagating the pressure to the drug container and at least partially displacing the drug from the drug container through the discharge nozzle, wherein the drive unit is arranged as an electro-osmotic actor. | 05-07-2015 |
20150126940 | DRUG DELIVERY DEVICE - The invention relates to a drug delivery device, comprising:
| 05-07-2015 |
20150148745 | STOPPER ARRANGEMENT FOR A DRUG DELIVERY DEVICE - The invention relates to a stopper arrangement for a drug delivery device, comprising a stopper, a linear actor coupled with one end to the stopper and with an opposite end to a coupling arrangement, wherein the stopper arrangement is configured to be disposed within a container of a drug delivery device, wherein a shape and/or material of the stopper and the coupling arrangement are configured such that a first frictional force between the coupling arrangement and the container is lower than a frictional force between the stopper and the container when the linear actor is contracting and that second frictional force between the coupling arrangement and the container is greater than the frictional force between the stopper and the container when the linear actor is expanding. | 05-28-2015 |
20150174330 | ARRANGEMENT AND METHOD FOR DETERMINING A STOPPER POSITION - The invention relates to an arrangement for determining a position (x) of a stopper relative to a container in a drug delivery device, comprising an acoustic source configured to emit an acoustic signal and an acoustic sensor configured to detect an acoustic signal, a processing unit for controlling the acoustic source and processing the detected acoustic signal for determining characteristics of the acoustic signal correlated with the position (x) of the stopper. Furthermore, the invention relates to a method for determining a position (x) of a stopper relative to a container in a drug delivery device, the method comprising the steps of emitting an acoustic signal from an acoustic source, detecting an acoustic signal caused by the emitted acoustic signal by means of an acoustic sensor, and processing the detected acoustic signal for determining characteristics of the acoustic signal correlated with the position (x) of the stopper by means of a processing unit. | 06-25-2015 |
Patent application number | Description | Published |
20090147578 | Combined volatile nonvolatile array - A memory circuit includes volatile memory cells coupled to bit lines, and nonvolatile memory cells coupled to the volatile memory cells via the bit lines but not via complement bit lines. | 06-11-2009 |
20090168517 | Read and volatile NV standby disturb - A method of operating a nonvolatile memory circuit having a plurality of transistors arranged in series between a voltage/current source node and recall sink node includes asserting a gate bias on an isolation transistor between the source node and a charge storage transistor during nonvolatile STANDBY. | 07-02-2009 |
20090168519 | Architecture of a nvDRAM array and its sense regime - A process of operating a memory array includes performing all volatile and nonvolatile operations on an nvDRAM cell array via a single data interface and using only DRAM-level signals on the data interface. | 07-02-2009 |
20090168520 | 3T high density NVDRAM cell - A memory circuit includes a single transistor storing both volatile and nonvolatile bit charges. | 07-02-2009 |
20090168521 | 5T high density NVDRAM cell - A memory circuit includes a high voltage region providing storage of a nonvolatile bit, and a low voltage region providing at least partial storage of a volatile bit. The high and low voltage regions are isolated from one another and formed by a plurality of transistors in series between a current source and a bit line. | 07-02-2009 |
20090168578 | Dummy cell for memory circuits - A memory cell array includes reference cells each associated with a plurality of data cells of the array. | 07-02-2009 |
20100219477 | METHOD FOR THE PRODUCTION OF MOS TRANSISTORS - The invention relates to a method for the production of both MOS transistors with extremely low leakage currents at the pn junctions and logic/switching transistors, whose gates are laterally defined by spacers in a p-substrate or a p-well in an n-substrate. The aim of the invention is to provide a method for the production of MOS transistors with extremely low leakage currents that allows for parallel logic/switching transistors. This is achieved by initially carrying out an LDD ion implantation via the edges of the gates in order to form an LDD region and subsequently removing the spacers by means of an anisotropic etching step exhibiting high selectivity in relation to the gate and substrate materials, including the covering layers thereof, or by covering the MOS transistors with an extremely low leakage currents prior to isotropic spacer production such that the spacers are formed exclusively on the edges of the gates of the logic/switching transistors, while the MOS transistors with an extremely low leakage current always remain connected solely via the LDD region, and there is no high dose implantation in the S/D regions of these MOS transistors with extremely low leakage currents. | 09-02-2010 |
20120113718 | 5T HIGH DENSITY NVDRAM CELL - A memory circuit includes a high voltage region providing storage of a nonvolatile bit, and a low voltage region providing at least partial storage of a volatile bit. The high and low voltage regions are isolated from one another and formed by a plurality of transistors in series between a current source and a bit line. | 05-10-2012 |
20160093385 | FLASH MEMORY ARRANGEMENT - A flash memory arrangement includes first memory cells for non-volatile memory of information and a read-write circuit. The read-write circuit includes a write latch, read amplifier, bit circuit pre-charge circuit, and databus interface, with the first memory cell being connected to a first bit circuit, word circuit, VSE circuit, and a select circuit, and the read-write circuit being connected to a column decoder, databus, and a read control signal circuit. A first memory column is arranged such that in a first partial matrix the first memory cell is arranged, in which a first select transistor, a memory transistor, and a second select transistor are arranged between the first bit circuit and a discharge hub. The second select transistor can be controlled by a global, non address-decoded read-write select circuit. At every bit circuit, a reference memory cell is arranged. A second partial matrix is provided equivalent to the first partial matrix. | 03-31-2016 |
Patent application number | Description | Published |
20100300731 | FLEXIBLE CIRCUIT BOARD MATERIAL AND METHOD FOR PRODUCING THE SAME - A method for producing a flexible circuit board material having a polymer substrate and a copper layer. The method includes depositing a layer of titanium oxide to be between the polymer substrate and the copper layer. The layer of titanium oxide and the copper layer are deposited using vacuum methods. | 12-02-2010 |
20100307812 | TRANSPARENT PLASTIC FILM FOR SHIELDING ELECTROMAGNETIC WAVES AND METHOD FOR PRODUCING A PLASTIC FILM OF THIS TYPE - The invention relates to a transparent plastic film for screening electromagnetic waves, comprising a transparent film substrate and a layer system that has at least one silver layer, as well as a method for producing a plastic film of this type, wherein the silver layer is embedded between two niobium oxide layers. | 12-09-2010 |
20110091662 | COATING METHOD AND DEVICE USING A PLASMA-ENHANCED CHEMICAL REACTION - The invention relates to a method and a device for the plasma-enhanced deposition of a layer on a substrate ( | 04-21-2011 |
20130149445 | METHOD FOR PRODUCING A STRONG BOND BETWEEN A POLYMER SUBSTRATE AND AN INORGANIC LAYER - The invention relates to a method for producing a firm bond between a polymer substrate and an inorganic layer, wherein the substrate surface is exposed to a precursor before the deposition of the inorganic layer which is to be produced by means of a PVD process. | 06-13-2013 |
20130287969 | METHOD FOR DEPOSITING A TRANSPARENT BARRIER LAYER SYSTEM - The invention relates to a method for producing a transparent barrier layer system, wherein in a vacuum chamber at least two transparent barrier layers and a transparent intermediate layer disposed between the two barrier layers are deposited on a transparent plastic film, wherein for deposition of the barrier layers aluminium is vaporised and simultaneously at least one first reactive gas is introduced into the vacuum chamber and wherein for deposition of the intermediate layer aluminium is vaporised and simultaneously at least one second reactive gas is introduced into the vacuum chamber, and a silicon-containing layer is deposited as intermediate layer by means of a PECVD process. | 10-31-2013 |
20130302536 | METHOD FOR DEPOSITING A TRANSPARENT BARRIER LAYER SYSTEM - The invention relates to a method for producing a transparent bather layer system, wherein in a vacuum chamber at least two transparent barrier layers and a transparent intermediate layer disposed between the two barrier layers are deposited on a transparent plastic film, wherein for deposition of the barrier layers aluminium is vaporised and simultaneously at least one first reactive gas is introduced into the vacuum chamber and wherein for deposition of the intermediate layer aluminium is vaporised and simultaneously at least one second reactive gas and a gaseous or vaporous organic component are introduced into the vacuum chamber. | 11-14-2013 |