Patent application number | Description | Published |
20140211522 | APPARATUS AND METHOD FOR CONTROLLING CIRCULATING CURRENT IN AN INVERTER SYSTEM - A power conversion system is disclosed that provides multiphase power, including phase voltages for each phase of the multiphase power. The system comprises a plurality of inverters that generate PWM output voltages based on PWM control signals. A plurality of inductive components is configured to receive the PWM output voltages to generate the phase voltages. The PWM output voltages cause circulating current flows through the inductive components. A voltage controller is employed that is responsive to the phase voltages to generate voltage modulation signals corresponding to the phase voltages. A plurality of current sharing channels are respectively associated with each of the plurality of inductive components and are configured generate current sharing modulation signals in response to the circulating current flows. The PWM control signals are generated based on modulation signals obtained by combining the current sharing modulation signals and voltage modulation signals. | 07-31-2014 |
20150021983 | AIRCRAFT UNIVERSAL POWER CONVERTER - A power supply system suitable for use by an aircraft is disclosed. The power system converts power from an unregulated DC power source to multiple AC and DC voltage outputs. The power supply system comprises an interleaved buck converter, and interleaved full-bridge converter, an interleaved inverter, and a control system. In one configuration, the interleaved inverter uses high-voltage DC generated by the interleaved four-bridge converter as its power input to generate a high-voltage AC output. | 01-22-2015 |
20150021994 | POWER CONVERTER HAVING EMI FILTER COMMON TO MULTIPLE CONVERTERS - A power supply system is disclosed that includes a first interleaved power supply, a second interleaved power supply, and a common electromagnetic interference filter. The common electromagnetic interference filter is configured to provide DC power from a DC power source to both the first interleaved power supply and the second interleaved power supply. In one example, the common electromagnetic interference filter comprises a localized filter stage configured to receive DC power from the DC power source, and a distributed filter stage configured to receive DC power from the localized filter stage. The distributed filter stage includes a first set of common mode capacitors electrically connected to and physically proximate input power lines of the first interleaved power supply, and a second set of common mode capacitors electrically connected to and physically proximate input power lines of the second interleaved power supply. | 01-22-2015 |
20150214832 | Three-Phase Inverter with a Repositioned Choke - A method and apparatus for converting direct current into alternating current. The direct current is converted into a number of alternating currents using a switch system. The number of alternating currents is filtered using a set of inductors and a set of capacitors. Higher-frequency electromagnetic interference is blocked using a choke located between the set of inductors and the set of capacitors. | 07-30-2015 |
20150214854 | Conversion System for Converting Direct Current into Alternating Current - A method and apparatus for converting direct current into alternating current. An initial voltage level of an input voltage source is changed using a dual converter to form a plurality of voltage sources. Each of the plurality of voltage sources has voltage levels different from the initial voltage level. An inverter is supplied direct current from the plurality of voltage sources formed by the dual converter. The direct current is converted into a number of alternating currents using the inverter. | 07-30-2015 |
Patent application number | Description | Published |
20130070121 | METHODS AND SYSTEMS FOR CODED ROLLING SHUTTER - Methods and systems for coded rolling shutter are provided. In accordance with some embodiments, methods and system are provided that control the readout timing and exposure length for each row of a pixel array in an image sensor, thereby flexibly sampling the three-dimensional space-time value of a scene and capturing sub-images that effectively encode motion and dynamic range information within a single captured image. | 03-21-2013 |
20140192235 | SYSTEMS, METHODS, AND MEDIA FOR RECONSTRUCTING A SPACE-TIME VOLUME FROM A CODED IMAGE - Systems, methods, and media for reconstructing a space-time volume from a coded image are provided. In accordance with some embodiments, systems for reconstructing a space-time volume from a coded image are provided, the systems comprising: an image sensor that outputs image data; and at least one processor that: causes a projection of the space-time volume to be captured in a single image of the image data in accordance with a coded shutter function; receives the image data; and performs a reconstruction process on the image data to provide a space-time volume corresponding to the image data. | 07-10-2014 |
20150341576 | METHODS AND SYSTEMS FOR CODED ROLLING SHUTTER - Methods and systems for coded rolling shutter are provided. In accordance with some embodiments, methods and system are provided that control the readout timing and exposure length for each row of a pixel array in an image sensor, thereby flexibly sampling the three-dimensional space-time value of a scene and capturing sub-images that effectively encode motion and dynamic range information within a single captured image. | 11-26-2015 |
Patent application number | Description | Published |
20150115267 | PLANAR METROLOGY PAD ADJACENT A SET OF FINS OF A FIN FIELD EFFECT TRANSISTOR DEVICE - Approaches for providing a substrate having a planar metrology pad adjacent a set of fins of a fin field effect transistor (FinFET) device are disclosed. Specifically, the FinFET device comprises a finned substrate, and a planar metrology pad formed on the substrate adjacent the fins in a metrology measurement area of the FinFET device. Processing steps include forming a first hardmask over the substrate, forming a photoresist over a portion of the first hardmask in the metrology measurement area of the FinFET device, removing the first hardmask in an area adjacent the metrology measurement area remaining exposed following formation of the photoresist, patterning a set of openings in the substrate to form the set of fins in the FinFET device in the area adjacent the metrology measurement area, depositing an oxide layer over the FinFET device, and planarizing the FinFET device to form the planar metrology pad in the metrology measurement area. | 04-30-2015 |
20150123212 | PLANAR METROLOGY PAD ADJACENT A SET OF FINS OF A FIN FIELD EFFECT TRANSISTOR DEVICE - Approaches for providing a planar metrology pad adjacent a set of fins of a fin field effect transistor (FinFET) device are disclosed. A previously deposited amorphous carbon layer can be removed from over a mandrel that has been previously formed on a subset of a substrate, such as using a photoresist. A pad hardmask can be formed over the mandrel on the subset of the substrate. This formation results in the subset of the substrate having the pad hardmask covering the mandrel thereon and the remainder of the substrate having the amorphous carbon layer covering the mandrel thereon. This amorphous carbon layer can be removed from over the mandrel on the remainder of the substrate, allowing a set of fins to be formed therein while the amorphous carbon layer keeps the set of fins from being formed in the portion of the substrate that it covers. | 05-07-2015 |
20150198435 | DECOUPLING MEASUREMENT OF LAYER THICKNESSES OF A PLURALITY OF LAYERS OF A CIRCUIT STRUCTURE - Measurement of thickness of layers of a circuit structure is obtained, where the thickness of the layers is measured using an optical critical dimension (OCD) measurement technique, and the layers includes a high-k layer and an interfacial layer. Measurement of thickness of the high-k layer is separately obtained, where the thickness of the high-k layer is measured using a separate measurement technique from the OCD measurement technique. The separate measurement technique provides greater decoupling, as compared to the OCD measurement technique, of a signal for thickness of the high-k layer from a signal for thickness of the interfacial layer of the layers. Characteristics of the circuit structure, such as a thickness of the interfacial layer, are ascertained using, in part, the separately obtained thickness measurement of the high-k layer. | 07-16-2015 |
20150263169 | SEMICONDUCTOR STRUCTURES WITH BRIDGING FILMS AND METHODS OF FABRICATION - Semiconductor structures and fabrication methods are provided having a bridging film which facilitates adherence of both an underlying layer of dielectric material and an overlying stress-inducing layer. The method includes, for instance, providing a layer of dielectric material, with at least one gate structure disposed therein, over a semiconductor substrate; providing a bridging film over the layer of dielectric material with the at least one gate structure; and providing a stress-inducing layer over the bridging film. The bridging film is selected to facilitate adherence of both the underlying layer of dielectric material and the overlying stress-inducing layer by, in part, forming a chemical bond with the layer of dielectric material, without forming a chemical bond with the stress-inducing layer. | 09-17-2015 |
20150287795 | PROCESSES FOR PREPARING INTEGRATED CIRCUITS WITH IMPROVED SOURCE/DRAIN CONTACT STRUCTURES AND INTEGRATED CIRCUITS PREPARED ACCORDING TO SUCH PROCESSES - Processes for preparing an integrated circuit for contact landing, processes for fabricating an integrated circuit, and integrated circuits prepared according to these processes are provided herein. An exemplary process for preparing an integrated circuit for contact landing includes providing a semiconductor structure that includes a transistor with source and drain regions, wherein at least one of the source and drain regions has a shaped contact structure overlaid with a contact etch stop layer and a pre-metal dielectric material. The pre-metal dielectric material is removed with one or more anisotropic etches, including at least one anisotropic etch selective to the pre-metal dielectric material. And, the contact etch stop layer overlaying the shaped contact structure is removed with a third anisotropic etch selective to the contact etch stop layer material to expose the shaped contact structure. | 10-08-2015 |
20150340296 | PLANAR METROLOGY PAD ADJACENT A SET OF FINS OF A FIN FIELD EFFECT TRANSISTOR DEVICE - Approaches for providing a substrate having a planar metrology pad adjacent a set of fins of a fin field effect transistor (FinFET) device are disclosed. Specifically, the FinFET device comprises a finned substrate, and a planar metrology pad formed on the substrate adjacent the fins in a metrology measurement area of the FinFET device. Processing steps include forming a first hardmask over the substrate, forming a photoresist over a portion of the first hardmask in the metrology measurement area of the FinFET device, removing the first hardmask in an area adjacent the metrology measurement area remaining exposed following formation of the photoresist, patterning a set of openings in the substrate to form the set of fins in the FinFET device in the area adjacent the metrology measurement area, depositing an oxide layer over the FinFET device, and planarizing the FinFET device to form the planar metrology pad in the metrology measurement area. | 11-26-2015 |
20150348913 | PLANAR METROLOGY PAD ADJACENT A SET OF FINS IN A FIN FIELD EFFECT TRANSISTOR DEVICE - Approaches for providing a planar metrology pad adjacent a set of fins of a fin field effect transistor (FinFET) device are disclosed. A previously deposited amorphous carbon layer can be removed from over a mandrel that has been previously formed on a subset of a substrate, such as using a photoresist. A pad hardmask can be formed over the mandrel on the subset of the substrate. This formation results in the subset of the substrate having the pad hardmask covering the mandrel thereon and the remainder of the substrate having the amorphous carbon layer covering the mandrel thereon. This amorphous carbon layer can be removed from over the mandrel on the remainder of the substrate, allowing a set of fins to be formed therein while the amorphous carbon layer keeps the set of fins from being formed in the portion of the substrate that it covers. | 12-03-2015 |
20150380246 | DIMENSION-CONTROLLED VIA FORMATION PROCESSING - Methods are provided for dimension-controlled via formation over a circuit structure, including over multiple adjacent conductive structures. The method(s) includes, for instance, providing a patterned multi-layer stack structure above the circuit structure, the stack structure including at least one layer, and a pattern transfer layer above the at least one layer, the pattern transfer layer being patterned with at least one via opening; providing a sidewall spacer layer within the at least one via opening to form at least one dimension-controlled via opening; and etching through the at least one layer of the stack structure using the at least one dimension-controlled via opening to facilitate providing the via(s) over the circuit structure. In one implementation, the stack structure includes a trench-opening within a patterned hard mask layer disposed between a dielectric layer and a planarization layer, and the via(s) is partially self-aligned to the trench. | 12-31-2015 |
20160005598 | INHIBITING DIFFUSION OF ELEMENTS BETWEEN MATERIAL LAYERS OF A LAYERED CIRCUIT STRUCTURE - Methods for fabricating a layered circuit structure are provided, which include, for instance: depositing a first material layer above a substrate, the first material layer having an oxidized upper surface; providing a second material layer over the oxidized upper surface of the first material layer; and inhibiting diffusion of one or more elements from the oxidized upper surface of the first material layer into either the first material layer or the second material layer during the providing of the second material layer over the oxidized upper surface of the first material layer. The inhibiting may include one or more of modifying a characteristic(s) of the first material layer, forming a protective layer over the oxidized upper surface of the first material layer, or altering at least one process parameter employed in providing the second material layer. | 01-07-2016 |
20160099171 | DIMENSION-CONTROLLED VIA FORMATION PROCESSING - Methods are provided for dimension-controlled via formation over a circuit structure, including over multiple adjacent conductive structures. The method(s) includes, for instance, providing a patterned multi-layer stack structure above the circuit structure, the stack structure including at least one layer, and a pattern transfer layer above the at least one layer, the pattern transfer layer being patterned with at least one via opening; providing a sidewall spacer layer within the at least one via opening to form at least one dimension-controlled via opening; and etching through the at least one layer of the stack structure using the at least one dimension-controlled via opening to facilitate providing the via(s) over the circuit structure. In one implementation, the stack structure includes a trench-opening within a patterned hard mask layer disposed between a dielectric layer and a planarization layer, and the via(s) is partially self-aligned to the trench. | 04-07-2016 |
Patent application number | Description | Published |
20080299418 | Fuel Cell Stack with Improved End Cell Performance - A fuel cell stack that includes a gas diffusion media for the end cells in the stack that has less of an intrusion into the flow field channels of the end cells that the other cells, so as to increase the flow rate through the flow channels in the end cells relative to the flow rate through the flow channels in the other cells. A different diffusion media can be used in the end cells than the nominal cells, where the end cell diffusion media has less of a channel intrusion as a result of diffusion media characteristics. Also, the same diffusion media could be used in the end cells as the nominal cells, but the end cell diffusion media layers could be thinner than the nominal cell diffusion media layers. Further, a higher amount of pre-compression can be used for the diffusion media in the end cells. | 12-04-2008 |
20090029235 | Mitigation of Membrane Degradation by Multilayer Electrode - An MEA for a fuel cell that employs multiple catalyst layers to reduce the hydrogen and/or oxygen partial pressure at the membrane so as to reduce the fluoride release rate from the membrane and reduce membrane degradation. An anode side multi-layer catalyst configuration is positioned at the anode side of the MEA membrane. The anode side multi-layer catalyst configuration includes an anode side under layer positioned against the membrane and including a catalyst, an anode side middle layer positioned against the anode side under layer and not including a catalyst and an anode side catalyst layer positioned against the anode side middle layer and opposite to the anode side under layer and including a catalyst, where the amount of catalyst in the anode side catalyst layer is greater than the amount of catalyst in the anode side under layer. | 01-29-2009 |
20090068541 | ELECTRODES CONTAINING OXYGEN EVOLUTION REACTION CATALYSTS - One embodiment of the invention includes a method including providing a cathode catalyst ink comprising a first catalyst, an oxygen evolution reaction catalyst, and a solvent; and depositing the cathode catalyst ink on one of a polymer electrolyte membrane, a gas diffusion medium layer, or a decal backing. | 03-12-2009 |
20090181268 | PROCEDURE FOR FILLING A FUEL CELL ANODE SUPPLY MANIFOLD WITH HYDROGEN FOR START-UP - A method for filling a fuel cell anode supply manifold with hydrogen prior to a start-up operation to facilitate a substantially even hydrogen distribution across the fuel cell is disclosed. The anode supply manifold is in fluid communication with a source of hydrogen. A first valve in fluid communication with the anode supply manifold and a second valve in fluid communication with an anode exhaust manifold are initially in a closed position while hydrogen is supplied to the anode inlet conduit to pressurize the fuel cell stack. The first valve is then opened to purge at least a portion of a fluid from the anode supply manifold to facilitate a filling of the manifold with hydrogen. | 07-16-2009 |
20100178580 | BIPOLAR PLATE FOR A FUEL CELL STACK - A bipolar plate for a fuel cell is provided that includes a pair of unipolar plates having a separator plate disposed therebetween. One of the unipolar plates is produced from a porous material to minimize cathode transport resistance at high current density. A fuel cell stack including a fuel cell and the bipolar plate is also provided. | 07-15-2010 |
20110008702 | INSULATING LAYER FOR A FUEL CELL ASSEMBLY - A fuel cell assembly is disclosed, the fuel cell assembly including a pair of terminal plates, one terminal plate disposed at each end of the fuel cell assembly, a fuel cell disposed between a pair of end fuel cells and the terminal plates, and a thermally insulating, electrically conductive layer formed between the fuel cell and one of the terminal plates adapted to mitigate thermal losses from the end plate, and fluid condensation and ice formation in an end fuel cell. The end fuel cells of the fuel cell assembly have a membrane and/or a cathode having a thickness greater than an average thickness of a membrane and/or a cathode disposed in the fuel cell that may be used in conjunction with, or instead of, the insulating layer to further mitigate thermal losses from the end plate, and fluid condensation and ice formation in the end fuel cells. | 01-13-2011 |
20110076583 | FUEL CELL WITH ANODE AND CATHODE PLATE TEMPERATURE DIFFERENCE - A method of operating a fuel cell is described. The method includes controlling the temperature of the anode plate and the temperature of the cathode plate to obtain a temperature difference of at least about 2° C. between the anode plate and the cathode plate. A fuel cell is also described. | 03-31-2011 |
20110192282 | OPTIMIZED GAS DIFFUSION MEDIA TO IMPROVE FUEL CELL PERFORMANCE - A gas diffusion media is described. The gas diffusion media comprises a conductive porous substrate; and a microporous layer; wherein a cathode effective transport length is in a range of about 700 to about 1900 μm; wherein an overall thermal resistance is in a range of about 1.8 to about 3.8 cm | 08-11-2011 |
Patent application number | Description | Published |
20110237929 | BLADDER WALL THICKNESS MAPPING FOR TUMOR DETECTION - Disclosed is a method and apparatus for detection of a bladder wall tumor. Layers of a bladder wall are created by magnetic resonance imaging. A group of voxels having a lowest intensity is identified in a layer and an energy function modification enlarges the layer of the bladder wall. A partial volume image segmentation obtains tissue type mixture percentages in each voxel near inner and outer borders of the bladder wall in the layer of the bladder wall to obtain a bladder wall thickness. A range of uncertainty at the inner and outer borders of the bladder wall is obtained, and integration is performed of the bladder wall thickness along a path starting at a point on the outer border and ending at a corresponding point on the inner border. | 09-29-2011 |
20130087620 | METHOD OF, AND SYSTEM AND LABEL FOR, AUTHENTICATING OBJECTS IN SITU - A method of, and a system and a label for, authenticating an object in situ create an authentication pattern signature for the object to be authenticated, associate a random distribution of multiple, three-dimensional elements with the object, aim a portable, handheld, image capture device at the object to capture return light from the elements as a single image, verify from the single image that the elements are three-dimensional, process the single image to generate an image pattern of the elements, compare the image pattern with the authentication pattern signature, and indicate that the object is authentic when the image pattern matches the authentication pattern signature. | 04-11-2013 |
20150269469 | Method of, and System and Label For, Authenticating Objects in situ - A method of, and a system and a label for, authenticating an object in situ create an authentication pattern signature for the object to be authenticated, associate a random distribution of multiple, three-dimensional elements with the object, aim a portable, handheld, image capture device at the object to capture return light from the elements as a single image, verify from the single image that the elements are three-dimensional, process the single image to generate an image pattern of the elements, compare the image pattern with the authentication pattern signature, and indicate that the object is authentic when the image pattern matches the authentication pattern signature. | 09-24-2015 |
Patent application number | Description | Published |
20110108316 | AXIOCENTRIC SCRUBBING LAND GRID ARRAY CONTACTS AND METHODS FOR FABRICATION - A contact structure and assembly and a method for manufacturing the same for a microelectronics device includes first and second electrically conductive contacts being helically shaped. A carrier element is attached to and positioned between the first and second contacts. The first and second contacts are in electrical communication with each other, and the first and second contacts are in a mirror image relationship with each other. A pair of insulating substrates each include electrically conductive members. A contact point on each of the first and second contacts is attached and electrically communicating to respective electrically conductive members such that the first and second electrically conductive contacts between the pair of insulating substrates form an electrically conductive package. A metal layer on the carrier element provides electrical conductivity through a first opening defined by the carrier element between the first and second portions of the helix shaped contact. | 05-12-2011 |
20110111647 | METALLURGICAL CLAMSHELL METHODS FOR MICRO LAND GRID ARRAY FABRICATION - A structure and method for manufacturing the same for manufacturing a contact structure for microelectronics manufacturing including the steps of forming first and second metal sheets to form a plurality of outwardly extending bump each defining a cavity. Symmetrically mating the first and second metal sheets in opposing relation to each other to form upper and lower bumps each defining an enclosure therebetween wherein the mated first and second sheets form a contact structure. Coating the contact structure with an insulating material, and fabricating helix shaped contacts from upper and lower bumps. The helix shaped contacts having first and second portions being in mirror image relationship to each other. | 05-12-2011 |
20120325541 | AXIOCENTRIC SCRUBBING LAND GRID ARRAY CONTACTS AND METHODS FOR FABRICATION - A contact structure and assembly and a method for manufacturing the same for a microelectronics device includes first and second electrically conductive contacts being helically shaped. A carrier element is attached to and positioned between the first and second contacts. The first and second contacts are in electrical communication with each other, and the first and second contacts are in a mirror image relationship with each other. A pair of insulating substrates each include electrically conductive members. A contact point on each of the first and second contacts is attached and electrically communicating to respective electrically conductive members such that the first and second electrically conductive contacts between the pair of insulating substrates form an electrically conductive package. A metal layer on the carrier element provides electrical conductivity through a first opening defined by the carrier element between the first and second portions of the helix shaped contact. | 12-27-2012 |
20130072073 | METALLURGICAL CLAMSHELL METHODS FOR MICRO LAND GRID ARRAY FABRICATION - A structure and method for manufacturing the same for manufacturing a contact structure for microelectronics manufacturing including the steps of forming first and second metal sheets to form a plurality of outwardly extending bump each defining a cavity. Symmetrically mating the first and second metal sheets in opposing relation to each other to form upper and lower bumps each defining an enclosure therebetween wherein the mated first and second sheets form a contact structure. Coating the contact structure with an insulating material, and fabricating helix shaped contacts from upper and lower bumps. The helix shaped contacts having first and second portions being in minor image relationship to each other. | 03-21-2013 |
20150133001 | METALLURGICAL CLAMSHELL METHODS FOR MICRO LAND GRID ARRAY FABRICATION - A structure and method for manufacturing the same for manufacturing a contact structure for microelectronics manufacturing including the steps of forming first and second metal sheets to form a plurality of outwardly extending bump each defining a cavity. Symmetrically mating the first and second metal sheets in opposing relation to each other to form upper and lower bumps each defining an enclosure therebetween wherein the mated first and second sheets form a contact structure. Coating the contact structure with an insulating material, and fabricating helix shaped contacts from upper and lower bumps. The helix shaped contacts having first and second portions being in mirror image relationship to each other. | 05-14-2015 |
20150334830 | AXIOCENTRIC SCRUBBING LAND GRID ARRAY CONTACTS AND METHODS FOR FABRICATION - A contact structure and assembly for a microelectronics device includes first and second electrically conductive contacts being helically shaped. A carrier element is attached to and positioned between the first and second contacts. The first and second contacts are in electrical communication with each other, and the first and second contacts are in a mirror image relationship with each other. A pair of insulating substrates each include electrically conductive members. A contact point on each of the first and second contacts is attached and electrically communicating to respective electrically conductive members such that the first and second electrically conductive contacts between the pair of insulating substrates form an electrically conductive package. A metal layer on the carrier element provides electrical conductivity through a first opening defined by the carrier element between the first and second portions of the helix shaped contact. | 11-19-2015 |
Patent application number | Description | Published |
20130221484 | THROUGH SILICON VIA NOISE SUPPRESSION USING BURIED INTERFACE CONTACTS - Circuits for shielding devices from electromagnetic coupling with through-silicon vias are shown that include a substrate having a through via, which provides access to a device layer on a first surface of the circuit to a device layer on a second surface of the circuit; a conductive layer on the first side of the substrate; a contact point on one of the device layers; and a grounded buried interface tie on the conductive layer, adjacent to the contact point, to isolate the contact point from coupling noise. | 08-29-2013 |
20140145883 | MILLIMETER-WAVE RADIO FREQUENCY INTEGRATED CIRCUIT PACKAGES WITH INTEGRATED ANTENNAS - A package structure includes a planar core structure, an antenna structure disposed on one side of the planar core structure, and an interface structure disposed on an opposite side of the planar core structure. The antenna structure and interface structure are each formed of a plurality of laminated layers, each laminated layer having a patterned conductive layer formed on an insulating layer. The antenna structure includes a planar antenna formed on one or more patterned conductive layers of the laminated layers. The interface structure includes a power plane, a ground plane, signal lines, and contact pads formed on one or more patterned conductive layers of the laminated layers of the interface structure. The package structure further includes an antenna feed line structure formed in, and routed through, the interface structure and the planar core structure, and connected to the planar antenna. | 05-29-2014 |
20140197522 | HYBRID CONDUCTOR THROUGH-SILICON-VIA FOR POWER DISTRIBUTION AND SIGNAL TRANSMISSION - A method of providing signal, power and ground through a through-silicon-via (TSV), and an integrated circuit chip having a TSV that simultaneously provides signal, power and ground. In one embodiment, the method comprises forming a TSV through a semiconductor substrate, including forming a via in the substrate; and forming a multitude of conductive bars in the via. The multitude of conductive bars include at least one signal bar, at least one power bar, and at least one ground bar. The method further comprises connecting the at least one power bar to a power voltage source to apply power through the TSV; connecting the at least one ground bar to a ground voltage; and connecting the at least one signal bar to a source of an electronic signal to conduct the signal through the TSV and to form a hybrid power-ground-signal TSV in the substrate. | 07-17-2014 |
20140199834 | HYBRID CONDUCTOR THROUGH-SILICON-VIA FOR POWER DISTRIBUTION AND SIGNAL TRANSMISSION - A method of providing signal, power and ground through a through-silicon-via (TSV), and an integrated circuit chip having a TSV that simultaneously provides signal, power and ground. In one embodiment, the method comprises forming a TSV through a semiconductor substrate, including forming a via in the substrate; and forming a multitude of conductive bars in the via. The multitude of conductive bars include at least one signal bar, at least one power bar, and at least one ground bar. The method further comprises connecting the at least one power bar to a power voltage source to apply power through the TSV; connecting the at least one ground bar to a ground voltage; and connecting the at least one signal bar to a source of an electronic signal to conduct the signal through the TSV and to form a hybrid power-ground-signal TSV in the substrate. | 07-17-2014 |
20150070228 | ANTENNA-IN-PACKAGE STRUCTURES WITH BROADSIDE AND END-FIRE RADIATIONS - Package structures are provided having antenna-in-packages that are integrated with semiconductor RFIC (radio frequency integrated circuit) chips to form compact integrated radio/wireless communications systems that operate in the millimeter wave (mm Wave) frequency range with radiation in broadside and end-fire directions. | 03-12-2015 |
20160049723 | WIRELESS COMMUNICATIONS PACKAGE WITH INTEGRATED ANTENNAS AND AIR CAVITY - Antenna package structures are provided to implement wireless communications packages. For example, an antenna package includes a package carrier and a package cover. The package carrier includes an antenna ground plane and an antenna feed line. The package cover includes a planar lid having a planar antenna element formed on a first surface of the planar lid. The package cover is bonded to a first surface of the package carrier with the first surface of the planar lid facing the first surface of the package carrier, and with the planar antenna element aligned to the antenna ground plane and the antenna feed line of the package carrier, wherein the first surface of the planar lid is disposed at a distance from the first surface of the package carrier to provide an air space between the planar antenna element and the package carrier. | 02-18-2016 |
20160056544 | ANTENNA-IN-PACKAGE STRUCTURES WITH BROADSIDE AND END-FIRE RADIATIONS - Package structures are provided having antenna-in-packages that are integrated with semiconductor RFIC (radio frequency integrated circuit) chips to form compact integrated radio/wireless communications systems that operate in the millimeter wave (mmWave) frequency range with radiation in broadside and end-fire directions. | 02-25-2016 |
Patent application number | Description | Published |
20080302578 | Cutting elements and bits incorporating the same - A cutting element is provided including a substrate having a periphery and an interface surface. An ultra hard material layer is formed over the substrate and interfaces with the interface surface. The interface surface also includes a plurality of spaced apart projections formed inwardly and spaced apart from the periphery and arranged around an annular path, such that each projection includes a convex upper surface defining the projection as viewed in plan view. Each upper surface continuously and smoothly curves in the same direction when viewed along a plane through a diameter of the substrate. Bits incorporating such cutting elements are also provided. | 12-11-2008 |
20090136702 | LAMINATED ARMOR HAVING A NON-PLANAR INTERFACE DESIGN TO MITIGATE STRESS AND SHOCK WAVES - The invention is directed to an armor laminate, transparent or non-transparent, comprising a plurality of layers, said laminate having at least one non-planar interface between at least two adjacent layers laminate. In transparent armor embodiments the laminate is a transparent laminate in which each transparent layer is individually selected from the group consisting of transparent glass, glass-ceramics, polymer and crystalline materials. In non-transparent armor laminates the individual layers are typically non-transparent layers such as non-transparent glass-ceramics, aluminum, titanium, steel, and metal alloys. The non-planar interface surfaces according to the invention can be of any non-planar shape. Examples of such shapes, without limitation, include concave/convex, zigzag or sinusoidal shapes. | 05-28-2009 |
20090221207 | METHOD OF SEALING A GLASS ENVELOPE - A method of hermetically sealing a glass assembly comprising glass plates or substrates with a glass-based frit when there is a large difference between the coefficient of thermal expansion (CTEs) of the frit and the CTEs of the glass plates. The method comprises a rapid increase of an irradiating heat source, used to heat and soften the frit, from a non-sealing power to a sealing power over a very short distance along the frit to form an initial stabilizing seal between the substrates. | 09-03-2009 |
20110019351 | BEZEL PACKAGING FOR SEALED GLASS ASSEMBLIES AND A GLASS ASSEMBLY THEREFOR - Methods and assemblies related to frame or bezel packaging of a sealed glass assembly, such as a fit-sealed OLED device, such as an OLED display panel. The frame or bezel packaging may have one or more of (a) rounded or chamfered corners, (a) a cover, (b) a reinforced lead edge, (c) openings or cutouts in the back panel to conserve material and lighten the bezel, and (d) a shock absorbent intermediate layer of low modulus of elasticity material applied between the sealed glass assembly and the back and/or sides of the frame or bezel. The frame or bezel design may include a gap between the sealed glass assembly and the back panel of the bezel. The gap may be filled at least in part with low modulus of elasticity backing material. The glass package may have one or more of (a) rounded or chamfered corners, (b) rounded or chamfered edges, (c) a low modulus of elasticity material applied around its periphery or portions of its periphery, such as on the corners only, (d) a shortened lead end, and (e) a thickened lead end. | 01-27-2011 |
20110129648 | GLASS SHEET ARTICLE WITH DOUBLE-TAPERED ASYMMETRIC EDGE - A glass sheet article includes a glass sheet having an upper surface and a lower surface. The upper surface terminates in a tapered upper end, and the lower surface terminates in a tapered lower edge. The taper profile of the tapered upper edge is different from the taper profile of the tapered lower edge. The tapered upper edge and the tapered lower edge intersect to form a double-tapered asymmetric edge. | 06-02-2011 |
Patent application number | Description | Published |
20120324985 | FLUID LEAK DETECTION SYSTEM - A fluid leak detection system is provided, and includes a fluid conduit, a fluid-cooled device having an inlet and an outlet, an inlet flow meter, an outlet flow meter, and a controller. The inlet flow meter is fluidly connected to the fluid conduit. The inlet flow meter monitors the inlet of the fluid-cooled device for an inlet temperature and an inlet flow rate. The inlet flow meter has an inlet flow meter drift versus process fluid temperature curve. The outlet flow meter is fluidly connected to the fluid conduit. The outlet flow meter monitors the outlet of the fluid-cooled device for an outlet temperature and an outlet flow rate. The outlet flow meter has an outlet flow meter drift versus process fluid temperature curve. The controller is in communication with the inlet flow meter and the outlet flow meter. | 12-27-2012 |
20130174649 | FLUID LEAK DETECTION SYSTEM - A fluid leak detection system is provided, and includes a fluid conduit, a fluid-cooled device having an inlet and an outlet, an inlet flow meter, an outlet flow meter, and a controller. The inlet flow meter and inlet flow meters are fluidly connected to the fluid conduit. The inlet flow meter monitors the inlet of the fluid-cooled device for an inlet temperature and an inlet flow rate. The inlet and outlet flow meters each have flow meter drift versus process fluid temperature curves as well as drift versus ambient temperature curves, wherein the curves for the inlet flow meter differ from the outlet flow meter. The outlet flow meter monitors the outlet of the fluid-cooled device for an outlet temperature and an outlet flow rate. The controller is in communication with the inlet flow meter and the outlet flow meter. | 07-11-2013 |