Patent application number | Description | Published |
20080203430 | ENHANCEMENT MODE INSULATED GATE HETEROSTRUCTURE FIELD-EFFECT TRANSISTOR - Aspects of the present invention provide an enhancement mode (E-mode) insulated gate (IG) double heterostructure field-effect transistor (DHFET) having low power consumption at zero gate bias, low gate currents, and/or high reliability. An E-mode HFET in accordance with an embodiment of the invention includes: top and bottom barrier layers; and a channel layer sandwiched between the bottom and the top barrier layers, wherein the bottom and top barrier layers have a larger bandgap than the channel layer, and wherein polarization charges of the bottom barrier layer deplete the channel layer and polarization charges of the top barrier layer induce carriers in the channel layer; and wherein a total polarization charge in the bottom barrier layer is larger than a total polarization charge in the top barrier layer such that the channel layer is substantially depleted at zero gate bias. | 08-28-2008 |
20080203446 | COMPOSITE CONTACT FOR SEMICONDUCTOR DEVICE - A composite contact for a semiconductor device is provided. The composite contact includes a DC conducting electrode that is attached to a semiconductor layer in the device, and a capacitive electrode that is partially over the DC conducting electrode and extends beyond the DC conducting electrode. The composite contact provides a combined resistive-capacitive coupling to the semiconductor layer. As a result, a contact impedance is reduced when the corresponding semiconductor device is operated at high frequencies. | 08-28-2008 |
20080206974 | FABRICATION OF SEMICONDUCTOR DEVICE HAVING COMPOSITE CONTACT - A method of fabricating a semiconductor device with a composite contact is provided. The fabrication includes forming the composite contact to a semiconductor layer in a semiconductor structure. The composite contact is formed by forming a DC conducting electrode attached to a semiconductor layer in a semiconductor structure and forming a capacitive electrode that is partially over the DC conducting electrode and extends beyond the DC conducting electrode. The composite contact provides a combined resistive-capacitive coupling to the semiconductor layer. As a result, a contact impedance is reduced when the corresponding semiconductor device is operated at high frequencies. | 08-28-2008 |
20090090984 | Novel Method to Increase Breakdown Voltage of Semiconductor Devices - Methods of achieving high breakdown voltages in semiconductor devices by suppressing the surface flashover using high dielectric strength insulating encapsulation material are generally described. In one embodiment of the present invention, surface flashover in AlGaN/GaN heterostructure field-effect transistors (HFETs) is suppressed by using high dielectric strength insulating encapsulation material. Surface flashover in as-fabricated III-Nitride based HFETs limits the operating voltages at levels well below the breakdown voltages of GaN. | 04-09-2009 |
20090173999 | FIELD EFFECT TRANSISTOR WITH GATE HAVING VARYING SHEET RESISTANCE - A field effect transistor (FET) comprising a gate structure that includes at least one gate having a varying sheet resistance in a direction between a source contact and a drain contact. In an illustrative embodiment, the FET can be configured to operate as a radio frequency switch. In this case, the FET can provide improved performance with respect to both the off-state capacitances and radio frequency isolations over similar FETs implemented with typical gates. | 07-09-2009 |
20090195232 | RADIO-FREQUENCY SWITCH CIRCUIT - A switch circuit is provided that includes at least one main switching device and at least one shunt switching device. Each main switching device is connected in series with a conductor that carries an RF signal between an input circuit and an output circuit. Each shunt switching device is connected between a controlling terminal of the main switching device and a high frequency ground. The switch circuit can provide substantially improved OFF state isolation over other approaches. | 08-06-2009 |
20090294802 | FIELD EFFECT TRANSISTOR WITH FREQUENCY DEPENDENT GATE-CHANNEL CAPACITANCE - A field effect transistor having a channel, a gate, and a means for decreasing a gate-to-channel capacitance of the transistor as an operating frequency of the transistor increases. The means can comprise, for example, a barrier layer disposed between the gate and the channel, which has a dielectric permittivity and/or a conductivity that varies with an operating frequency of the transistor. In an embodiment, the barrier layer comprises a conducting material, such as conducting polymer, conducting semiconductor, conducting semi-metal, amorphous silicon, polycrystalline silicon, and/or the like. | 12-03-2009 |
20100156442 | PARAMETER EXTRACTION USING RADIO FREQUENCY SIGNALS - A set of parameters of an evaluation structure are extracted by applying a radio frequency (RF) signal through a first capacitive contact and a second capacitive contact to the evaluation structure. Measurement data corresponding to an impedance of the evaluation structure is acquired while the RF signal is applied, and the set of parameters are extracted from the measurement data. In an embodiment, multiple pairs of capacitive contacts can be utilized to acquire measurement data. Each pair of capacitive contacts can be separated by a channel having a unique spacing. | 06-24-2010 |
20100156475 | FIELD EFFECT TRANSISTOR WITH ELECTRIC FIELD AND SPACE-CHARGE CONTROL CONTACT - A group III nitride-based transistor capable of achieving terahertz-range cutoff and maximum frequencies of operation at relatively high drain voltages is provided. In an embodiment, two additional independently biased electrodes are used to control the electric field and space-charge close to the gate edges. | 06-24-2010 |
20100175979 | Gateless Switch with Capacitively-Coupled Contacts - A switch includes an input contact and an output contact to a conducting channel. At least one of the input and output contacts is capacitively coupled to the conducting channel. A control contact is located outside of a region between the input and output contacts, and can be used to adjust the switch between on and off operating states. The switch can be implemented as a radio frequency switch in a circuit. | 07-15-2010 |
20100301471 | LOW-RESISTANCE ELECTRODE DESIGN - A solution for designing a semiconductor device, in which two or more attributes of a pair of electrodes are determined to, for example, minimize resistance between the electrodes, is provided. Each electrode can include a current feeding contact from which multiple fingers extend, which are interdigitated with the fingers of the other electrode in an alternating pattern. The attributes can include a target depth of each finger, a target effective width of each pair of adjacent fingers, and one or more target attributes of the current feeding contacts. Subsequently, the device and/or a circuit including the device can be fabricated. | 12-02-2010 |
20100301490 | PROFILED CONTACT FOR SEMICONDUCTOR DEVICE - A profiled contact for a device, such as a high power semiconductor device is provided. The contact is profiled in both a direction substantially parallel to a surface of a semiconductor structure of the device and a direction substantially perpendicular to the surface of the semiconductor structure. The profiling can limit the peak electric field between two electrodes to approximately the same as the average electrical field between the electrodes, as well as limit the electric field perpendicular to the semiconductor structure both within and outside the semiconductor structure. | 12-02-2010 |
20100301922 | FIELD EFFECT TRANSISTOR WITH INTEGRATED GATE CONTROL AND RADIO FREQUENCY SWITCH - A field effect transistor (FET) including a monolithically integrated gate control circuit element can be included in, for example, a radio frequency switch circuit. For example, the FET can be included as a series and/or shunt FET of a radio frequency coplanar waveguide circuit. The widths of the series and shunt FETs of a switch circuit can be selected to provide a target isolation and/or a target insertion loss for a target operating frequency. | 12-02-2010 |
20120139625 | Device and Circuit with Improved Linearity - A solution for compensating intermodulation distortion of a component is provided. A circuit element includes multiple connected components. At least two of the connected components comprise current-voltage characteristics of opposite signs (e.g., sublinear and superlinear current-voltage characteristics) such that the current-voltage characteristics of the circuit element produces a level of intermodulation distortion for the circuit element lower than a level of intermodulation distortion for each of the connected components. | 06-07-2012 |
20120205667 | Semiconductor Device with Low-Conducting Field-controlling Element - A semiconductor device including a low conducting field-controlling element is provided. The device can include a semiconductor including an active region, and a set of contacts to the active region. The field-controlling element can be coupled to one or more of the contacts in the set of contacts. The field-controlling element can be formed of a low conducting layer having a sheet resistance between approximately 10 | 08-16-2012 |
20120216161 | Low-Resistance Electrode Design - A solution for designing a semiconductor device, in which two or more attributes of a pair of electrodes are determined to, for example, minimize resistance between the electrodes, is provided. Each electrode can include a current feeding contact from which multiple fingers extend, which are interdigitated with the fingers of the other electrode in an alternating pattern. The attributes can include a target depth of each finger, a target effective width of each pair of adjacent fingers, and/or one or more target attributes of the current feeding contacts. Subsequently, the device and/or a circuit including the device can be fabricated. | 08-23-2012 |
20130056753 | Semiconductor Device with Low-Conducting Field-controlling Element - A semiconductor device including a low conducting field-controlling element is provided. The device can include a semiconductor including an active region (e.g., a channel), and a set of contacts to the active region. The field-controlling element can be coupled to one or more of the contacts in the set of contacts. The field-controlling element can be formed of a low conducting layer of material and have a lateral resistance that is both larger than an inverse of a minimal operating frequency of the device and smaller than an inverse of a maximum control frequency of the device. | 03-07-2013 |
20130056796 | Novel Method to Increase Breakdown Voltage of Semiconductor Devices - Methods of achieving high breakdown voltages in semiconductor devices by suppressing the surface flashover using high dielectric strength insulating encapsulation material are generally described. In one embodiment of the present invention, surface flashover in AlGaN/GaN heterostructure field-effect transistors (HFETs) is suppressed by using high dielectric strength insulating encapsulation material. Surface flashover in as-fabricated III-Nitride based HFETs limits the operating voltages at levels well below the breakdown voltages of GaN. | 03-07-2013 |
20130069114 | High-Voltage Normally-Off Field Effect Transistor - A device having a channel with multiple voltage thresholds is provided. The channel can include a first section located adjacent to a source electrode, which is a normally-off channel and a second section located between the first section and a drain electrode, which is a normally-on channel. The device can include a charge-controlling electrode connected to the source electrode, which extends from the source electrode over at least a portion of the second section of the channel. During operation of the device, a potential difference between the charge-controlling electrode and the channel can control the on/off state of the normally-on section of the channel. | 03-21-2013 |
20130126905 | SEMICONDUCTOR DEVICE WITH LOW-CONDUCTING BURIED AND/OR SURFACE LAYERS - A device including one or more low-conducting layers is provided. A low-conducting layer can be located below the channel and one or more attributes of the low-conducting layer can be configured based on a minimum target operating frequency of the device and a charge-discharge time of a trapped charge targeted for removal by the low-conducting layer or a maximum interfering frequency targeted for suppression using the low-conducting layer. For example, a product of the lateral resistance and a capacitance between the low-conducting layer and the channel can be configured to be larger than an inverse of the minimum target operating frequency and the product can be smaller than at least one of: the charge-discharge time or an inverse of the maximum interfering frequency. | 05-23-2013 |
20130127521 | Semiconductor Device with Multiple Space-Charge Control Electrodes - A circuit including a semiconductor device having a set of space-charge control electrodes is provided. The set of space-charge control electrodes is located between a first terminal, such as a gate or a cathode, and a second terminal, such as a drain or an anode, of the device. The circuit includes a biasing network, which supplies an individual bias voltage to each of the set of space-charge control electrodes. The bias voltage for each space-charge control electrode can be: selected based on the bias voltages of each of the terminals and a location of the space-charge control electrode relative to the terminals and/or configured to deplete a region of the channel under the corresponding space-charge control electrode at an operating voltage applied to the second terminal. | 05-23-2013 |
20130320352 | Ohmic Contact to Semiconductor Layer - A perforating ohmic contact to a semiconductor layer in a semiconductor structure is provided. The perforating ohmic contact can include a set of perforating elements, which can include a set of metal protrusions laterally penetrating the semiconductor layer(s). The perforating elements can be separated from one another by a characteristic length scale selected based on a sheet resistance of the semiconductor layer and a contact resistance per unit length of a metal of the perforating ohmic contact contacting the semiconductor layer. The structure can be annealed using a set of conditions configured to ensure formation of the set of metal protrusions. | 12-05-2013 |
20140077265 | Gateless Switch with Capacitively-Coupled Contacts - A switch includes an input contact and an output contact to a conducting channel. At least one of the input and output contacts is capacitively coupled to the conducting channel. A control contact is located outside of a region between the input and output contacts, and can be used to adjust the switch between on and off operating states. The switch can be implemented as a radio frequency switch in a circuit. | 03-20-2014 |
20140077311 | Lateral/Vertical Semiconductor Device - A lateral semiconductor device and/or design including a space-charge generating layer and electrode located on an opposite side of a device channel as contacts to the device channel is provided. The space-charge generating layer is configured to form a space-charge region to at least partially deplete the device channel in response to an operating voltage being applied to the contacts to the device channel. | 03-20-2014 |
20140091373 | Semiconductor Device with Breakdown Preventing Layer - A semiconductor device with a breakdown preventing layer is provided. The breakdown preventing layer can be located in a high-voltage surface region of the device. The breakdown preventing layer can include an insulating film with conducting elements embedded therein. The conducting elements can be arranged along a lateral length of the insulating film. The conducting elements can be configured to split a high electric field spike otherwise present in the high-voltage surface region during operation of the device into multiple much smaller spikes. | 04-03-2014 |
20140291740 | Perforated Channel Field Effect Transistor - A device including a plurality of perforations to a semiconductor channel is provided. The device includes a semiconductor structure forming the semiconductor channel. Additionally, the device includes a source contact, a drain contact, and a gate contact to the semiconductor channel. The plurality of perforations can be located in the semiconductor structure below the gate contact. Furthermore, a perforation in the plurality of perforations can extend into the semiconductor structure beyond a location of the semiconductor channel. | 10-02-2014 |
20150014857 | Low-Resistance Electrode Design - A solution for designing a semiconductor device, in which two or more attributes of a pair of electrodes are determined to, for example, minimize resistance between the electrodes, is provided. Each electrode can include a current feeding contact from which multiple fingers extend, which are interdigitated with the fingers of the other electrode in an alternating pattern. The attributes can include a target depth of each finger, a target effective width of each pair of adjacent fingers, and/or one or more target attributes of the current feeding contacts. Subsequently, the device and/or a circuit including the device can be fabricated. | 01-15-2015 |
20150021664 | Lateral/Vertical Semiconductor Device with Embedded Isolator - A lateral/vertical device is provided. The device includes a device structure including a device channel having a lateral portion and a vertical portion. The lateral portion of the device channel can be located adjacent to a first surface of the device structure, and one or more contacts and/or a gate can be formed on the first surface. The device structure also includes a set of insulating layers located in the device structure between the lateral portion of the device channel and a second surface of the device structure opposite the first surface. An opening in the set of insulating layers defines a transition region between the lateral portion of the device channel and a vertical portion of the device channel. A contact to the vertical portion of the device channel can be located on the second surface. | 01-22-2015 |
20150054570 | Semiconductor Device with Multiple Space-Charge Control Electrodes - A circuit including a semiconductor device having a set of space-charge control electrodes is provided. The set of space-charge control electrodes is located between a first terminal, such as a gate or a cathode, and a second terminal, such as a drain or an anode, of the device. The circuit includes a biasing network, which supplies an individual bias voltage to each of the set of space-charge control electrodes. The bias voltage for each space-charge control electrode can be: selected based on the bias voltages of each of the terminals and a location of the space-charge control electrode relative to the terminals and/or configured to deplete a region of the channel under the corresponding space-charge control electrode at an operating voltage applied to the second terminal. | 02-26-2015 |