Patent application number | Description | Published |
20090201088 | Measuring Load Impedance Of An Amplifier Driving A Variable Load - According to an aspect of the present invention, the magnitude and phase angle of looking-in impedance driven by an amplifier are computed in digital domain during normal operation within a module containing the amplifier. In an embodiment, the computed magnitude and phase angle are used for impedance matching at a node driven by the amplifier. As a result, impedance matching may be obtained even in situations when the impedance changes during operation. | 08-13-2009 |
20100075724 | DC CURRENT BASED ON CHIP RF POWER DETECTION SCHEME FOR A POWER AMPLIFIER - A method, system, and apparatus of a DC current based on chip RF power detection scheme for a power amplifier are disclosed. In one embodiment, a method includes generating a scaled current from an other current associated with power amplifier, transforming the scaled current (e.g., the scaled current may be scaled to the other current value) into a digital signal and using the digital signal to set a radio frequency power value of an antenna of the antenna module. The method may include transforming the scaled current into a voltage signal. The method may also include transforming the voltage signal into the digital signal. The method may also include generating a current mirror from a low dropout regulator. | 03-25-2010 |
20110102088 | LOW NOISE AMPLIFIER CIRCUIT - Low noise amplifier circuit. The low noise amplifier circuit includes an amplifier that amplifies an input to provide an output. The amplifier is coupled to an input terminal. The circuit also includes a device in a cascode connection with the amplifier. The circuit further includes a tuning circuit coupled to the device to phase shift the output. Further, the circuit includes a feedback circuit that is responsive to a phase-shifted output to enhance gain of the amplifier. The feedback circuit is coupled to the tuning circuit and the amplifier. | 05-05-2011 |
20110163808 | AMPLIFIER WITH IMPROVED INPUT RESISTANCE AND CONTROLLED COMMON MODE - An amplifier includes a first pair of transistors (the first pair) that defines a first output, each transistor of the first pair having a gate coupled to a first input terminal; a second pair of transistors (the second pair) that defines a second output, each transistor of the second pair having a gate coupled to a second input terminal; a first capacitor coupled to the second output terminal and to the gate of a first transistor of the first pair; a second capacitor coupled to the second output terminal and to the gate of a second transistor of the first pair; a third capacitor coupled to the first output terminal and to the gate of a third transistor of the second pair; and a fourth capacitor coupled to the first output terminal and to the gate of a fourth transistor of the second pair. | 07-07-2011 |
20110171994 | MULTI-MODE TRANSCEIVER AND A CIRCUIT FOR OPERATING THE MULTI-MODE TRANSCEIVER - Multi-mode transceiver and a circuit for operating the multi-mode transceiver. A multi-mode transceiver includes a first circuit that is configurable to operate as one of a transmitter and a receiver in a first mode, and a second circuit that is configurable to operate as one of the transmitter and the receiver in a second mode. The multi-mode transceiver includes a first element coupled to the first circuit. The multi-mode transceiver includes a second element coupled to the first element and one or more ports. The multi-mode transceiver also includes a first switch, coupled to the second element and to the second circuit, that is configurable to operate the transceiver in at least one of the first mode and the second mode in conjunction with the first element and the second element. | 07-14-2011 |
20110187463 | OSCILLATOR CIRCUIT FOR RADIO FREQUENCY TRANSCEIVERS - Oscillator circuit for radio frequency transceivers. An oscillator circuit includes a first oscillator that generates a signal having a first frequency and a second oscillator that generates a signal having a second frequency. The oscillator circuit includes a mixer that is responsive to the signal having the first frequency and the signal having the second frequency to provide a signal having a third frequency and one or more frequency components. The oscillator circuit includes a filter that is responsive to the signal from the mixer to attenuate the one or more frequency components and provide a signal having a desired frequency. The oscillator circuit includes a correction circuit to correct a drift in at least one of the first frequency and the second frequency by controlling the second frequency, thereby correcting the drift in the third frequency and the desired frequency. | 08-04-2011 |
20110237206 | SWITCHED POWER AMPLIFIER TOPOLOGY PROVIDING HIGH EFFICIENCY - A switched power amplifier contained in a circuit is implemented to receive a single-ended input signal and generate a single-ended output signal, the single-ended output signal being a power-amplified version of the single-ended input signal. The switched power amplifier provides high efficiency. | 09-29-2011 |
20110243120 | ANTENNA SOLUTION FOR NEAR-FIELD AND FAR-FIELD COMMUNICATION IN WIRELESS DEVICES - A single-antenna solution is provided for near-field and far-field communication in wireless devices. In an embodiment, a first transceiver block generates a first transmit signal to be transmitted using radiative techniques. A second transceiver block generates a second transmit signal to be transmitted using inductive coupling. The first and second transceiver blocks are coupled to a same antenna for transmitting the first transmit signal using radiative coupling, and the second transmit signal using inductive coupling. The first transceiver block and the second transceiver block operate according to time division multiplexing, and in an embodiment corresponding to an FM transceiver and an NFC transceiver. | 10-06-2011 |
20120019324 | Amplifier With Improved Input Resistance and Controlled Common Mode - An amplifier includes a first pair of transistors (the first pair) that defines a first output, each transistor of the first pair having a gate coupled to a first input terminal; a second pair of transistors (the second pair) that defines a second output, each transistor of the second pair having a gate coupled to a second input terminal; a first capacitor coupled to the second output terminal and to the gate of a first transistor of the first pair; a second capacitor coupled to the second output terminal and to the gate of a second transistor of the first pair; a third capacitor coupled to the first output terminal and to the gate of a third transistor of the second pair; and a fourth capacitor coupled to the first output terminal and to the gate of a fourth transistor of the second pair. | 01-26-2012 |
20120064826 | TRANSMIT AND RECEIVE PERFORMANCE OF A NEAR FIELD COMMUNICATION DEVICE THAT USES A SINGLE ANTENNA - A near field communication (NFC) transceiver contains a transmitter portion to generate a transmit wireless signal, and a receiver portion to receive and process a receive wireless signal. The circuit further contains a shunt capacitor, a switch, and an antenna interface to couple the transmitter portion and the receiver portion to an antenna designed to communicate with external antennas by inductive coupling. The switch couples the shunt capacitor in parallel with the antenna in one operational mode, and decouples the shunt capacitor from the antenna in another operational mode. Transmit and receive performance of the NFC transceiver are enhanced as a result. | 03-15-2012 |
20120076241 | MULTIPLE-INPUT MULTIPLE-OUTPUT WIRELESS TRANSCEIVER ARCHITECTURE - A wireless transceiver includes a receiver and a transmitter, the receiver and transmitter implemented to have multiple receive and transmit channels respectively, to provide multiple-input multiple-output (MIMO) capability. In an embodiment, the transceiver is implemented to include two transmit channels and two receive channels. Some blocks/circuitry of each of the receive and transmit channels are implemented with reduced area and current consumption, with a corresponding increase in noise. In a single-input single-output (SISO) mode of operation, the receiver combines the output of both the receive channels to compensate for the increase in noise due to the implementation with smaller area and lower current consumption. Similarly, the transmitter combines the output of both the transmit channels to compensate for the increase in noise. The transceiver operates with no signal degradation in SISO mode, and with a small degradation in signal quality in the MIMO mode. | 03-29-2012 |
20120258660 | USING A SAME ANTENNA FOR SIMULTANEOUS TRANSMISSION AND/OR RECEPTION BY MULTIPLE TRANSCEIVERS - A circuit includes an antenna, and a pair of transceivers. A first transceiver in the pair is connected to the antenna via a first pair of feed-points, and is designed to transmit and receive signals in a first band of frequencies. A second transceiver in the pair is connected to the antenna via a second pair of feed-points, and is designed to transmit and receive signals in a second band of frequencies. The first band and the second band are non-overlapping frequency bands. The first pair of feed-points is located at a voltage null point of the antenna with respect to the second pair of feed-points. The second pair of feed-points is located at a voltage null point of the antenna with respect to the first pair of feed-points. The first transceiver and the second transceiver are, thus, enabled to simultaneously transmit and/or receive corresponding signals using the same antenna. | 10-11-2012 |