Patent application number | Description | Published |
20100127386 | DEVICE INCLUDING A SEMICONDUCTOR CHIP - A device including a semiconductor chip. One embodiment provides a device, including a metal layer having a first layer face. A semiconductor chip includes a first chip face. The semiconductor chip is electrically coupled to and placed over the metal layer with the first chip face facing the first layer face. An encapsulation material covers the first layer face and the semiconductor chip. At least one through-hole extends from the first layer face through the encapsulation material. The at least one through-hole is accessible from outside the device. | 05-27-2010 |
20100133666 | DEVICE INCLUDING A SEMICONDUCTOR CHIP AND METAL FOILS - A device including a semiconductor chip and metal foils. One embodiment provides a device including a semiconductor chip having a first electrode on a first face and a second electrode on a second face opposite to the first face. A first metal foil is attached to the first electrode of the semiconductor chip in an electrically conductive manner. A second metal foil is attached to the second electrode of the semiconductor chip in an electrically conductive manner. | 06-03-2010 |
20100207227 | Electronic Device and Method of Manufacturing Same - This application relates to a method of manufacturing a semiconductor device comprising providing a semiconductor wafer with the semiconductor wafer defining a first main face and a second main face opposite to the first main face; forming trenches in the first main face of the semiconductor wafer; forming a dielectric layer over the first main face and in the trenches; thinning the semiconductor wafer by removing semiconductor material from the second main face of the semiconductor wafer after the forming of the dielectric layer; and singulating at least one semiconductor chip from the semiconductor wafer along lines defined by the trenches. | 08-19-2010 |
20100230766 | SENSOR DEVICE AND METHOD - A sensor device and method. One embodiment provides a first semiconductor chip having a sensing region. A porous structure element is attached to the first semiconductor chip. A first region of the porous structure element faces the sensing region of the first semiconductor chip. An encapsulation material partially encapsulates the first semiconductor chip and the porous structure element. | 09-16-2010 |
20110193217 | Manufacturing of a Device Including a Semiconductor Chip - Metal particles are applied to a metal foil. A semiconductor chip is placed over the metal foil with contact elements of the semiconductor chip facing the metal particles. The metal particles are heated and the metal foil is structured after heating the metal particles. | 08-11-2011 |
20110298088 | Semiconductor Package with Integrated Inductor - A semiconductor package includes a semiconductor chip. An inductor is applied to the semiconductor chip. The inductor has at least one winding. An encapsulation body is formed of an encapsulation material. The encapsulation material contains a magnetic component and fills a space within the winding to form a magnetic winding core. | 12-08-2011 |
20120061835 | DIE STRUCTURE, DIE ARRANGEMENT AND METHOD OF PROCESSING A DIE - A die structure includes a die and a metallization layer disposed over the front side of the die. The metallization layer includes copper. At least a part of the metallization layer has a rough surface profile. The part with the rough surface profile includes a wire bonding region, to which a wire bonding structure is to be bonded. | 03-15-2012 |
20120126344 | SENSOR DEVICE AND METHOD - A sensor device and method. One embodiment provides a first semiconductor chip having a sensing region. A porous structure element is attached to the first semiconductor chip. A first region of the porous structure element faces the sensing region of the first semiconductor chip. An encapsulation material partially encapsulates the first semiconductor chip and the porous structure element. | 05-24-2012 |
20120231582 | DEVICE INCLUDING A SEMICONDUCTOR CHIP - A device including a semiconductor chip and method. One embodiment provides a method of manufacturing a module, including providing a first device having a first semiconductor chip and a plurality of first external contact elements electrically coupled to the first semiconductor chip. The method further includes providing a second device having a second semiconductor chip, a plurality of second external contact elements and a metal layer including a first face and a second face opposite to the first face, the first face of the metal layer facing the second semiconductor chip and the second face of the metal layer facing the plurality of second external contact elements. The first external contact elements are soldered to the first face of the metal layer. | 09-13-2012 |
20120261796 | DIE ARRANGEMENTS AND METHODS OF MANUFACTURING A DIE ARRANGEMENT - In various embodiments, a die arrangement may be provided. The die arrangement may include a die, at least one bond pad, at least one redistribution trace electrically connecting the die with the at least one bond, and at least one inductor enclosing the at least one bond pad and the at least one redistribution trace. | 10-18-2012 |
20120286413 | INTEGRATED CIRCUIT PACKAGE AND PACKAGING METHODS - An integrated circuit package includes a package module formed from successive build-up layers which define circuit interconnections, a cavity formed on a top-side of the package module, a chip having a front side with forward contacts and having a back-side, the chip disposed such that in the cavity such that at least one forward contact is electrically connected to at least one of the circuit interconnections of the package module, and a top layer coupled to the back-side of the chip covering at least a part of the chip and the top-side of the package module. | 11-15-2012 |
20120286414 | INTEGRATED CIRCUIT PACKAGE AND PACKAGING METHODS - An integrated circuit packaging method includes fabricating a package module from successive build-up layers which define circuit interconnections, forming a cavity on a top-side of the package module, attaching a metalized back-side of a chip onto a metallic layer, the chip having a front-side with at least one forward contact, disposing the chip in the cavity such that at least one forward contact is electrically connected to at least one of the circuit interconnections of the package module, and coupling the metallic layer that is attached to the chip onto the top-side of the package module. | 11-15-2012 |
20130069211 | DEVICE INCLUDING A SEMICONDUCTOR CHIP AND METAL FOILS - A device including a semiconductor chip and metal foils. One embodiment provides a device including a semiconductor chip having a first electrode on a first face and a second electrode on a second face opposite to the first face. A first metal foil is attached to the first electrode of the semiconductor chip in an electrically conductive manner. A second metal foil is attached to the second electrode of the semiconductor chip in an electrically conductive manner. | 03-21-2013 |
20130082386 | INTEGRATED CIRCUIT PACKAGE AND A METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT PACKAGE - An integrated circuit package includes a package module including one or more circuit interconnections formed in a carrier, wherein at least one top-side package contact is formed over the top-side of the package module and electrically connected to at least one circuit interconnection of the one or more circuit interconnections and wherein a cavity is formed at the top-side of the package module; a chip disposed in the cavity, the chip including at least one chip front side contact and at least one chip back side contact, wherein the at least one chip front side contact is electrically connected to at least one further circuit interconnection of the one or more circuit interconnections; an electrically conductive structure connecting the at least one top-side package contact to the chip back side contact; and a metallic layer formed over the electrically conductive structure and on the chip back side contact. | 04-04-2013 |
20130087371 | ELECTRONIC PACKAGING CONNECTOR AND METHODS FOR ITS PRODUCTION - A surface mount packaging connector includes an elastic conductor, an interconnect pad, and a conductive layer. The elastic conductor has a top surface. The interconnect pad is electrically coupled to the elastic conductor. The top surface of the elastic conductor is arranged away from the interconnect pad. The conductive layer is on the top surface of the elastic conductor. The conductive layer provides an increased electrically conductive surface area and may also be a solderable surface. | 04-11-2013 |
20130099383 | Semiconductor Device and Method - An electrical device includes a semiconductor chip. The semiconductor chip includes a routing line. An insulating layer is arranged over the semiconductor chip. A solder deposit is arranged over the insulating layer. A via extends through an opening of the insulating layer to electrically connect the routing line to the solder deposit. A front edge line portion of the via facing the routing line is substantially straight, has a concave curvature or has a convex curvature of a diameter greater than a maximum lateral dimension of the via. | 04-25-2013 |
20130122660 | SENSOR DEVICE AND METHOD - A sensor device and method. One embodiment provides a first semiconductor chip having a sensing region. A porous structure element is attached to the first semiconductor chip. A first region of the porous structure element faces the sensing region of the first semiconductor chip. An encapsulation material partially encapsulates the first semiconductor chip and the porous structure element. | 05-16-2013 |
20130334712 | A METHOD FOR MANUFACTURING A CHIP PACKAGE, A METHOD FOR MANUFACTURING A WAFER LEVEL PACKAGE, A CHIP PACKAGE AND A WAFER LEVEL PACKAGE - A method for manufacturing a chip package is provided. The method includes forming a layer over a carrier; forming further carrier material over the layer; selectively removing one or more portions of the further carrier material thereby releasing one or more portions of the layer from the further carrier material; and adhering a chip including one or more contact pads to the carrier via the layer. | 12-19-2013 |
20140021638 | EMBEDDED INTEGRATED CIRCUIT PACKAGE AND METHOD FOR MANUFACTURING AN EMBEDDED INTEGRATED CIRCUIT PACKAGE - A embedded integrated circuit package is provided, the embedded integrated circuit package including: at least one chip arranged over a chip carrier, the at least one chip including a plurality of chip contact pads; encapsulation material formed over the chip carrier and at least partially surrounding the at least one chip; a plurality of electrical interconnects formed through the encapsulation material, wherein each electrical interconnect is electrically connected to a chip contact pad; and a structure formed between the electrical interconnects of the embedded integrated circuit package, wherein the structure increases the creepage resistance between the electrical interconnects. | 01-23-2014 |
20140027892 | Electric Device Package Comprising a Laminate and Method of Making an Electric Device Package Comprising a Laminate - A system and method for manufacturing an electric device package are disclosed. An embodiment comprises comprising a first carrier contact, a first electric component, the first electric component having a first top surface and a first bottom surface, the first electric component comprising a first component contact disposed on the first top surface, the first bottom surface being connected to the carrier and an connection element comprising a second electric component and an interconnect element, the connection element having a connection element top surface and a connection element bottom surface, wherein the connection element bottom surface comprises a first connection element contact and a second connection element contact, and wherein the first connection element contact is connected to the first component contact and the second connection element contact is connected to the first carrier contact. The packaged device further comprises an encapsulant encapsulating the first electric component. | 01-30-2014 |
20140117531 | SEMICONDUCTOR DEVICE WITH ENCAPSULANT - Described are techniques related to semiconductor devices that make use of encapsulant. In one implementation, a semiconductor device may be manufactured to include at least an encapsulant that includes at least glass particles. | 05-01-2014 |
20140126165 | Packaged Nano-Structured Component and Method of Making a Packaged Nano-Structured Component - An assembled component and a method for assembling a component are disclosed. In one embodiment the assembled component includes a component carrier, an attachment layer disposed on the component carrier and a component disposed on the attachment layer, the component having a nano-structured first main surface facing the component carrier. | 05-08-2014 |
20140138841 | INTEGRATED CIRCUIT, A SEMICONDUCTOR DIE ARRANGEMENT AND A METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT - An integrated circuit is provided, the integrated circuit including: a chip having a first chip side and a second chip side opposite to the first chip side, the chip having at least one contact area on the second chip side; encapsulation material at least partially covering the chip; and at least one contact via comprising electrical conductive material contacting the at least one contact area and extending through the encapsulation material and through the chip between the first chip side and the second chip side. | 05-22-2014 |
20140138843 | Method for Fabricating an Electronic Component - A carrier and a semiconductor chip are provided. A connection layer is applied to a first main face of the semiconductor chip. The connection layer includes a plurality of depressions. A filler is applied to the connection layer or to the carrier. The semiconductor chip is attached to the carrier so that the connection layer is disposed between the semiconductor chip and the carrier. The semiconductor chip is affixed to the carrier. | 05-22-2014 |
20140145333 | Device Comprising a Ductile Layer and Method of Making the Same - Device comprising a ductile layer, a method for making a component comprising a ductile layer and a method for testing a component are disclosed. An embodiment includes an electronic device including a first conductive layer, a ductile layer and a brittle layer between the first conductive layer and the ductile layer. | 05-29-2014 |
20140151862 | EMBEDDED INTEGRATED CIRCUIT PACKAGE AND METHOD FOR MANUFACTURING AN EMBEDDED INTEGRATED CIRCUIT PACKAGE - A embedded integrated circuit package is provided, the embedded integrated circuit package including: at least one chip arranged over a chip carrier, the at least one chip including a plurality of chip contact pads; encapsulation material formed over the chip carrier and at least partially surrounding the at least one chip; a plurality of electrical interconnects formed through the encapsulation material, wherein each electrical interconnect is electrically connected to a chip contact pad; and a structure formed between the electrical interconnects of the embedded integrated circuit package, wherein the structure increases the creepage resistance between the electrical interconnects. | 06-05-2014 |
20140264950 | CHIP ARRANGEMENT AND A METHOD OF MANUFACTURING A CHIP ARRANGEMENT - In various embodiments, a chip arrangement is provided. The chip arrangement may include a chip carrier and a chip mounted on the chip carrier. The chip may include at least two chip contacts and an insulating adhesive between the chip and the chip carrier to adhere the chip to the chip carrier. The at least two chip contacts may be electrically coupled to the chip carrier. | 09-18-2014 |
20140353808 | Packaged Semiconductor Device - Disclosed is a packaged device, comprising a carrier comprising a first carrier contact, a first electrical component having a first top surface and a first bottom surface, the first electrical component comprising a first component contact disposed on the first top surface, the first bottom surface being connected to the carrier, an embedded system comprising a second electrical component having a second top surface, an interconnect element, and a first connecting element, the embedded system having a system bottom surface, wherein the system bottom surface comprises a first system contact, wherein the second top surface comprises a first component contact, and wherein the first system contact is connected to the first component contact by the interconnect element and the first component contact of the second electrical component is connected to the first carrier contact by means of the first connecting element. | 12-04-2014 |
20150049443 | CHIP ARRANGEMENT - According to various embodiments, a chip arrangement may be provided, the chip arrangement may include: a first carrier; at least one chip arranged over the first carrier; a flexible structure including a wiring layer structure; and a contact structure arranged between the first carrier and the wiring layer structure, wherein the at least one chip is electrically coupled to the first carrier via the wiring layer structure and the contact structure. | 02-19-2015 |