Patent application number | Description | Published |
20090059371 | PLASMONIC RETROREFLECTORS - An article having: a retroreflective optical element and a plasmonic material on the optical element. A method of: performing an optical measurement on a substrate having a plurality of the articles. | 03-05-2009 |
20090090918 | TRANSPARENT NANOCRYSTALLINE DIAMOND CONTACTS TO WIDE BANDGAP SEMICONDUCTOR DEVICES - A heterojunction between thin films of NCD and 4H—SiC was developed. Undoped and B-doped NCDs were deposited on both n− and p− SiC epilayers. I-V measurements on p+ NCD/n− SiC indicated Schottky rectifying behavior with a turn-on voltage of around 0.2 V. The current increased over eight orders of magnitude with an ideality factor of 1.17 at 30° C. Ideal energy-band diagrams suggested a possible conduction mechanism for electron transport from the SiC conduction band to either the valence band or acceptor level of the NCD film. | 04-09-2009 |
20100055882 | Junction Termination Extension with Controllable Doping Profile and Controllable Width for High-Voltage Electronic Devices - Methods for producing a junction termination extension surrounding the edge of a cathode or anode junction in a semiconductor substrate, where the junction termination extension has a controlled arbitrary lateral doping profile and a controlled arbitrary lateral width, are provided. A photosensitive material is illuminated through a photomask having a pattern of opaque and clear spaces therein, the photomask being separated from the photosensitive material so that the light diffuses before striking the photosensitive material. After processing, the photosensitive material so exposed produces a laterally tapered implant mask. Dopants are introduced into the semiconductor material and follow a shape of the laterally tapered implant mask to create a controlled arbitrary lateral doping profile and a controlled lateral width in the junction termination extension in the semiconductor. | 03-04-2010 |
20100213380 | Neutron Detector with Gamma Ray Isolation - A silicon-on-insulator (SOI) neutron detector comprising a silicon-on-insulator structure, wherein the silicon-on-insulator structure consists of an active semiconductor layer, a buried layer, and a handle substrate, a lateral carrier transport and collection detector structure within the active semiconductor layer of the silicon-on-insulator structure, and a neutron to high energy particle converter layer on the active semiconductor layer. | 08-26-2010 |
20100327322 | Transistor with Enhanced Channel Charge Inducing Material Layer and Threshold Voltage Control - High electron mobility transistors and fabrication processes are presented in which a barrier material layer of uniform thickness is provided for threshold voltage control under an enhanced channel charge inducing material layer (ECCIML) in source and drain regions with the ECCIML layer removed in the gate region. | 12-30-2010 |
20110048625 | METHOD FOR THE REDUCTION OF GRAPHENE FILM THICKNESS AND THE REMOVAL AND TRANSFER OF EPITAXIAL GRAPHENE FILMS FROM SiC SUBSTRATES - A method for reducing graphene film thickness on a donor substrate and transferring graphene films from a donor substrate to a handle substrate includes applying a bonding material to the graphene on the donor substrate, releasing the bonding material from the donor substrate thereby leaving graphene on the bonding material, applying the bonding material with graphene onto the handle substrate, and releasing the bonding material from the handle substrate thereby leaving the graphene on the handle substrate. The donor substrate may comprise SiC, metal foil or other graphene growth substrate, and the handle substrate may comprise a semiconductor or insulator crystal, semiconductor device, epitaxial layer, flexible substrate, metal film, or organic device. | 03-03-2011 |
20110123425 | GaN Whiskers and Methods of Growing Them from Solution - Millimeter-scale GaN single crystals in filamentary form, also known as GaN whiskers, grown from solution and a process for preparing the same at moderate temperatures and near atmospheric pressures are provided. GaN whiskers can be grown from a GaN source in a reaction vessel subjected to a temperature gradient at nitrogen pressure. The GaN source can be formed in situ as part of an exchange reaction or can be preexisting GaN material. The GaN source is dissolved in a solvent and precipitates out of the solution as millimeter-scale single crystal filaments as a result of the applied temperature gradient. | 05-26-2011 |
20110127527 | Neutron Detector with Gamma Ray Isolation - A silicon-on-insulator (SOI) neutron detector comprising a silicon-on-insulator structure, wherein the silicon-on-insulator structure consists of an active semiconductor layer, a buried layer, and a handle substrate, a lateral carrier transport and collection detector structure within the active semiconductor layer of the silicon-on-insulator structure, and a neutron to high energy particle converter layer on the active semiconductor layer. | 06-02-2011 |
20120014037 | Two-Step Synthesis of Manganese Oxide Nanostructures on Carbon For Supercapacitor Applications - A process to deposit a conformal coating of manganese oxide nanocrystals within a high surface area connected pore structure of a carbon paper electrode. A two-step process is utilized. In the first step the carbon paper electrode is immersed in an alkaline manganese oxide solution to form a nanocrystal seed layer on the surface and within the pores of the carbon paper. In the second step the seeded carbon paper is immersed in an acidic manganese oxide solution. The result is a densely packed continuous conformal nanocrystal coating both on the surface of the carbon and deep within its pores. The carbon paper is highly suitable for use as an electrode in a supercapacitor. | 01-19-2012 |
20120068157 | Transistor Having Graphene Base - A transistor device having a graphene base for the transport of electrons into a collector is provided. The transistor consists of a heterostructure comprising an electron emitter, an electron collector, and a graphene material base layer consisting of one or more sheets of graphene situated between the emitter and the collector. The transistor also can further include an emitter transition layer at the emitter interface with the base and/or a collector transition layer at the base interface with the collector. The electrons injected into the graphene material base layer can be “hot electrons” having an energy E substantially greater than E | 03-22-2012 |
20120068188 | Defects Annealing and Impurities Activation in III-Nitride Compound Semiconductors - A GaN sample in a sealed enclosure is heated very fast to a high temperature above the point where GaN is thermodynamically stable and is then cooled down very fast to a temperature where it is thermodynamically stable. The time of the GaN exposure to a high temperature range above its thermodynamic stability is sufficiently short, in a range of few seconds, to prevent the GaN from decomposing. This heating and cooling cycle is repeated multiple times without removing the sample from the enclosure. As a result, by accumulating the exposure time in each cycle, the GaN sample can be exposed to a high temperature above its point of thermodynamic stability for a long time but the GaN sample integrity is maintained (i.e., the GaN doesn't decompose) due to the extremely short heating duration of each single cycle. | 03-22-2012 |
20120068189 | Method for Vertical and Lateral Control of III-N Polarity - Disclosed herein is a method of: depositing a patterned mask layer on an N-polar GaN epitaxial layer of a sapphire, silicon, or silicon carbide substrate; depositing an AlN inversion layer on the open areas; removing any remaining mask; and depositing a III-N epitaxial layer to simultaneously produce N-polar material and III-polar material. Also disclosed herein is: depositing an AlN inversion layer on an N-polar bulk III-N substrate and depositing a III-N epitaxial layer to produce III-polar material. Also disclosed herein is: depositing an inversion layer on a III-polar bulk III-N substrate and depositing a III-N epitaxial layer to produce N-polar material. Also disclosed herein is a composition having: a bulk III-N substrate; an inversion layer on portions of the substrate; and a III-N epitaxial layer on the inversion layer. The III-N epitaxial layer is of the opposite polarity of the surface of the substrate. | 03-22-2012 |
20120258587 | Method of Forming Graphene on a Surface - Methods of forming a graphene material on a surface are presented. A metal material is disposed on a material substrate or material layer and is infused with carbon, for example, by exposing the metal to a carbon-containing vapor. The carbon-containing metal material is annealed to cause graphene to precipitate onto the bottom of the metal material to form a graphene layer between the metal material and the material substrate/material layer and also onto the top and/or sides of the metal material. Graphene material is removed from the top and sides of the metal material and then the metal material is removed, leaving only the graphene layer that was formed on the bottom of the metal material. In some cases graphene material that formed on one or more side of the sides of the metal material is not removed so that a vertical graphene material layer is formed. | 10-11-2012 |
20130082241 | Graphene on Semiconductor Detector - Ultraviolet or Extreme Ultraviolet and/or visible detector apparatus and fabrication processes are presented, in which the detector includes a thin graphene electrode structure disposed over a semiconductor surface to provide establish a potential in the semiconductor material surface and to collect photogenerated carriers, with a first contact providing a top side or bottom side connection for the semiconductor structure and a second contact for connection to the graphene layer. | 04-04-2013 |
20130121353 | INFRARED LASER - Laser devices are presented in which a graphene saturable absorber and an optical amplifier are disposed in a resonant optical cavity with an optical or electrical pump providing energy to the optical amplifier. | 05-16-2013 |
20130121362 | Infrared Laser - Laser devices are presented in which a graphene saturable absorber and an optical amplifier are disposed in a resonant optical cavity with an optical or electrical pump providing energy to the optical amplifier. | 05-16-2013 |
20130161641 | TRANSISTOR WITH ENHANCED CHANNEL CHARGE INDUCING MATERIAL LAYER AND THRESHOLD VOLTAGE CONTROL - High electron mobility transistors and fabrication processes are presented in which a barrier material layer of uniform thickness is provided for threshold voltage control under an enhanced channel charge inducing material layer (ECCIML) in source and drain regions with the ECCIML layer removed in the gate region. | 06-27-2013 |
20130186326 | GaN Whiskers and Methods of Growing Them from Solution - Millimeter-scale GaN single crystals in filamentary form, also known as GaN whiskers, grown from solution and a process for preparing the same at moderate temperatures and near atmospheric pressures are provided. GaN whiskers can be grown from a GaN source in a reaction vessel subjected to a temperature gradient at nitrogen pressure. The GaN source can be formed in situ as part of an exchange reaction or can be preexisting GaN material. The GaN source is dissolved in a solvent and precipitates out of the solution as millimeter-scale single crystal filaments as a result of the applied temperature gradient. | 07-25-2013 |
20130186860 | Formation of Graphene on a Surface - Methods of forming a graphene material on a surface are presented. A metal material is disposed on a material substrate or material layer and is infused with carbon, for example, by exposing the metal to a carbon-containing vapor. The carbon-containing metal material is annealed to cause graphene to precipitate onto the bottom of the metal material to form a graphene layer between the metal material and the material substrate/material layer and also onto the top and/or sides of the metal material. Graphene material is removed from the top and sides of the metal material and then the metal material is removed, leaving only the graphene layer that was formed on the bottom of the metal material. In some cases graphene material that formed on one or more side of the sides of the metal material is not removed so that a vertical graphene material layer is formed. | 07-25-2013 |
20130240905 | Silicon Carbide Rectifier - Silicon carbide PiN diodes are presented with reduced temperature coefficient crossover points by limited p type contact area to limit hole injection in the n type drift layer in order to provide a lower current at which the diode shifts from negative temperature coefficient to a positive temperature coefficient of forward voltage for mitigating thermal runaway. | 09-19-2013 |
20130306988 | DIAMOND AND DIAMOND COMPOSITE MATERIAL - A structure having: a substrate and a diamond layer on the substrate having diamond nanoparticles. The diamond nanoparticles are formed by colliding diamond particles with the substrate. A method of: directing an aerosol of submicron diamond particles toward a substrate, and forming on the substrate a diamond layer of diamond nanoparticles formed by the diamond particles colliding with the substrate. | 11-21-2013 |
20130306989 | DIAMOND AND DIAMOND COMPOSITE MATERIAL - A structure having: a substrate and a diamond layer on the substrate having diamond nanoparticles. The diamond nanoparticles are formed by colliding diamond particles with the substrate. A method of: directing an aerosol of submicron diamond particles toward a substrate, and forming on the substrate a diamond layer of diamond nanoparticles formed by the diamond particles colliding with the substrate. | 11-21-2013 |
20140110722 | Semiconductor Structure or Device Integrated with Diamond - Semiconductor devices that include a semiconductor structure integrated with one or more diamond material layers. A first diamond material layer is formed on a bottom surface and optionally, the side surfaces of the semiconductor structure. In some embodiments, at least a portion of the semiconductor structure is embedded in the diamond. An electrical device can be formed on a top surface of the semiconductor structure. A second diamond material layer can be formed on the top surface of the semiconductor structure. The semiconductor structure can include a III-nitride material such as GaN, which can be embedded within a the first diamond material layer or encased by the first and/or second diamond material layer. | 04-24-2014 |
20140141580 | TRANSISTOR WITH ENHANCED CHANNEL CHARGE INDUCING MATERIAL LAYER AND THRESHOLD VOLTAGE CONTROL - High electron mobility transistors and fabrication processes are presented in which a barrier material layer of uniform thickness is provided for threshold voltage control under an enhanced channel charge inducing material layer (ECCIML) in source and drain regions with the ECCIML layer removed in the gate region. | 05-22-2014 |
20140255705 | Growth of Crystalline Materials on Two-Dimensional Inert Materials - A method of growing crystalline materials on two-dimensional inert materials comprising functionalizing a surface of a two-dimensional inert material, growing a nucleation layer on the functionalized surface, and growing a crystalline material. A crystalline material grown on a two-dimensional inert material made from the process comprising functionalizing a surface of a two-dimensional inert material, growing a nucleation layer on the functionalized surface, and growing a crystalline material. | 09-11-2014 |
20140264261 | LIGHT EMITTING DEVICE ON METAL FOAM SUBSTRATE - A light emitting device having an electrically conductive metal foam or porous metal substrate, one or more light emitting nanowires in contact with the substrate, and a metal or conductive oxide contact layer in contact with each nanowire junction opposite of the substrate. More specifically, a light emitting device having an electrically conductive metal foam substrate, one or more light emitting nanowires in contact with the substrate, a quantum well on the nanowire(s), a p-type shell on the quantum well, a metal or conductive oxide contact layer in contact with the shell, and an energy down-converting material. Also disclosed is the related method of making a light emitting device. | 09-18-2014 |
20140264379 | III-Nitride P-Channel Field Effect Transistor with Hole Carriers in the Channel - A non-inverted P-channel III-nitride field effect transistor with hole carriers in the channel comprising a nitrogen-polar III-Nitride first material, a barrier material layer, a two-dimensional hole gas in the barrier layer, and wherein the nitrogen-polar III-Nitride material comprises one or more III-Nitride epitaxial material layers grown in such a manner that when GaN is epitaxially grown the top surface of the epitaxial layer is nitrogen-polar. A method of making a P-channel III-nitride field effect transistor with hole carriers in the channel comprising selecting a face or offcut orientation of a substrate so that the nitrogen-polar (001) face is the dominant face, growing a nucleation layer, growing a GaN epitaxial layer, doping the epitaxial layer, growing a barrier layer, etching the GaN, forming contacts, performing device isolation, defining a gate opening, depositing and defining gate metal, making a contact window, depositing and defining a thick metal. | 09-18-2014 |
20140264380 | Complementary Field Effect Transistors Using Gallium Polar and Nitrogen Polar III-Nitride Material - A device with N-Channel and P-Channel III-Nitride field effect transistors comprising a non-inverted P-channel III-Nitride field effect transistor on a first nitrogen-polar nitrogen face III-Nitride material, a non-inverted N-channel III-Nitride field effect transistor, epitaxially grown, a first III-Nitride barrier layer, two-dimensional hole gas, second III-Nitride barrier layer, and a two-dimensional hole gas. A method of making complementary non-inverted P-channel and non-inverted N-channel III-Nitride FET comprising growing epitaxial layers, depositing oxide, defining opening, growing epitaxially a first nitrogen-polar III-Nitride material, buffer, back barrier, channel, spacer, barrier, and cap layer, and carrier enhancement layer, depositing oxide, growing AlN nucleation layer/polarity inversion layer, growing gallium-polar III-Nitride, including epitaxial layers, depositing dielectric, fabricating P-channel III-Nitride FET, and fabricating N-channel III-Nitride FET. | 09-18-2014 |
20140284552 | GRAPHENE BASE TRANSISTOR WITH REDUCED COLLECTOR AREA - A graphene base transistor with reduced collector area comprising an electron injection region, an electron collection region, and a base region wherein the base region comprises one or more sheets of graphene and wherein the base region is intermediate the electron injection region and the electron collection region and forms electrical interfaces therewith. A method of making a graphene base transistor with reduced collector area comprising forming an electron injection region, forming an electron collection region, and forming a base region wherein the base region comprises one or more sheets of graphene and wherein the base region is intermediate the electron injection region and the electron collection region and forms electrical interfaces therewith. | 09-25-2014 |
20140335666 | Growth of High-Performance III-Nitride Transistor Passivation Layer for GaN Electronics - Methods for forming a high-quality III-nitride passivation layer on an AlGaN/GaN HEMT. A III-nitride passivation layer is formed on the surface of an AlGaN/GaN HEMT by means of atomic layer epitaxy (ALE), either before or after deposition of a gate metal electrode on the AlGaN barrier layer. Depending on the gate metal and/or the passivation material used, the III-nitride passivation layer can be formed by ALE at temperatures between about 300° C. and about 850° C. In a specific embodiment, the III-nitride passivation layer can be an AlN layer formed by ALE at about 550° C. after deposition of a Schottky metal gate electrode. The III-nitride passivation layer can be grown so as to conformally cover the entire device, providing a hermetic seal that protects the against environmental conditions. | 11-13-2014 |
20140367824 | Graphene on Semiconductor Detector - Ultraviolet or Extreme Ultraviolet and/or visible detector apparatus and fabrication processes are presented, in which the detector includes a thin graphene electrode structure disposed over a semiconductor surface to provide establish a potential in the semiconductor material surface and to collect photogenerated carriers, with a first contact providing a top side or bottom side connection for the semiconductor structure and a second contact for connection to the graphene layer. | 12-18-2014 |
20140376585 | Infrared Laser - Laser devices are presented in which a graphene saturable absorber and an optical amplifier are disposed in a resonant optical cavity with an optical or electrical pump providing energy to the optical amplifier. | 12-25-2014 |
20150041762 | Transistor Having Graphene Base - A transistor device having a graphene base for the transport of electrons into a collector is provided. The transistor consists of a heterostructure comprising an electron emitter, an electron collector, and a graphene material base layer consisting of one or more sheets of graphene situated between the emitter and the collector. The transistor also can further include an emitter transition layer at the emitter interface with the base and/or a collector transition layer at the base interface with the collector. The electrons injected into the graphene material base layer can be “hot electrons” having an energy E substantially greater than E | 02-12-2015 |