Patent application number | Description | Published |
20120161232 | ROBUST ESD CELL WITH ADJUSTABLE HOLDING VOLTAGE FOR ADVANCED ANALOG TECHNOLOGIES - An integrated circuit contains a voltage protection structure having a diode isolated DENMOS transistor with a guard element proximate to the diode and the DENMOS transistor. The guard element includes an active area coupled to ground. The diode anode is connected to an I/O pad. The diode cathode is connected to the DENMOS drain. The DENMOS source is grounded. A process of forming the integrated circuit is also disclosed. | 06-28-2012 |
20130214616 | TRANSMISSION LINE PULSING - A circuit and method for electrostatic discharge testing using transmission line pulsing. A plurality of transmission line networks may be connected to a device under test, and each transmission line network may have different connected terminations. Switches may be used to select which transmission line networks are connected to the device under test, and which terminations, if any, are connected to transmission line networks. | 08-22-2013 |
20130264640 | DRAIN EXTENDED MOS TRANSISTOR HAVING SELECTIVELY SILICIDED DRAIN - A method of forming a drain extended metal-oxide-semiconductor (MOS) transistor includes forming a gate structure including a gate electrode on a gate dielectric on a semiconductor surface portion of a substrate. The semiconductor surface portion has a first doping type. A source is formed on one side of the gate structure having a second doping type. A drain is formed including a highly doped portion on another side of the gate structure having the second doping type. A masking layer is formed on a first portion of a surface area of the highly doped drain portion. A second portion of the surface area of the highly doped drain portion does not have the masking layer. Selectively siliciding is used to form silicide on the second portion. The masking layer blocks siliciding on the first portion so that the first portion is silicide-free. | 10-10-2013 |
20130320396 | MUTUAL BALLASTING MULTI-FINGER BIDIRECTIONAL ESD DEVICE - An integrated circuit includes a bidirectional ESD device which has a plurality of parallel switch legs. Each switch leg includes a first current switch and a second current switch in a back-to-back configuration. A first current supply node of each first current switch is coupled to a first terminal of the ESD device. A second current supply node of each second current switch is coupled to a second terminal of the ESD device. A first current collection node of each first current switch is coupled to a second current collection node of the corresponding second current switch. The first current collection nodes in each first current switch is not coupled to any other first current collection node, and similarly, the second current collection node in each instance second current switch is not coupled to any other second current collection node. | 12-05-2013 |
20140106524 | DIODE ISOLATED DRAIN EXTENDED NMOS ESD CELL - An integrated circuit contains a voltage protection structure having a diode isolated DENMOS transistor with a guard element proximate to the diode and the DENMOS transistor. The guard element includes an active area coupled to ground. The diode anode is connected to an I/O pad. The diode cathode is connected to the DENMOS drain. The DENMOS source is grounded. A process of forming the integrated circuit is also disclosed. | 04-17-2014 |
20140124828 | ESD PROTECTION CIRCUIT WITH ISOLATED SCR FOR NEGATIVE VOLTAGE OPERATION - A semiconductor controlled rectifier (FIG. | 05-08-2014 |
20150145040 | METAL OXIDE SEMICONDUCTOR AND METHOD OF MAKING - A drain extended metal oxide semiconductor (MOS) includes a substrate having a semiconductor. A gate is located on the semiconductor, a source is located on the semiconductor and on one side of the gate, and a drain is located on the semiconductor and on another side of said gate. The MOS includes least one first finger having a first finger drain component located adjacent the drain, the first finger drain component has a silicide layer. At least one second finger has a second finger drain component located adjacent the drain, the second finger drain component has less silicide than the first finger drain component. | 05-28-2015 |
20150146330 | ESD ROBUST MOS DEVICE - A semiconductor device includes a body and a transistor fabricated into the body. Isolation material at least partially encases the body. Biasing is coupled to the isolation material, wherein the biasing is for changing the electric potential of the isolation material in response to an electrostatic discharge event. | 05-28-2015 |