# Elfadel

## Ibrahim M. Elfadel, Yorktown Heights, NY US

Patent application number | Description | Published |
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20100277989 | INCREASED CAPACITY HETEROGENEOUS STORAGE ELEMENTS - Providing increased capacity in heterogeneous storage elements including a method for storing data including a write process writing to a memory and a read process reading from the memory. Physical characteristics of memory cells in the memory support different sets of data levels. The write process takes into account the different sets of data levels when writing to the memory. The read process first obtains data in the memory and subsequently determines how to interpret the data. | 11-04-2010 |

20110069521 | ADJUSTABLE WRITE BINS FOR MULTI-LEVEL ANALOG MEMORIES - An analog memory having adjustable write bins including a system for writing to the memory. The system includes a write apparatus interpreting one or more write control signals, generating a write signal, and applying the write signal at a selected memory location to store a desired content. The selected memory location is subject to data dependent noise and is capable of storing a range of values grouped into ānā bins configured such that the average cost to write to at least ān-1ā of the bins is within a threshold of a target cost for the selected analog memory location. The system also includes a read apparatus. The system further includes write control circuitry that includes a write signal selector selecting the one or more write control signals responsive to the desired content, current content of the selected memory location, and a bin associated with the desired content. | 03-24-2011 |

20120287714 | INCREASED CAPACITY HETEROGENEOUS STORAGE ELEMENTS - Providing increased capacity in heterogeneous storage elements including a method for reading from memory. The method includes receiving a read word from a block of memory cells, where physical characteristics of the memory cells support different sets of data levels. The read word is separated into two or more virtual read vectors. For each of the virtual read vectors, the codebook that was utilized to generate the virtual read vector is identified and a partial read data vector is generated. The generating includes multiplying the virtual read vector by a matrix that represents the codebook. The partial read data vectors are combined into a read message and the read message is output. | 11-15-2012 |

## Ibrahim M. Elfadel, Laguna Niguel, CA US

Patent application number | Description | Published |
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20090076400 | SIGNAL PROCESSING APPARATUS - The present invention involves method and apparatus for analyzing measured signals that are modeled as containing primary and secondary portions. Coefficients relate the two signals according to a model defined in accordance with the present invention. In one embodiment, the present invention involves utilizing a transformation which evaluates a plurality of possible signal coefficients in order to find appropriate coefficients. Alternatively, the present invention involves using statistical functions or Fourier transform and windowing techniques to determine the coefficients relating to two measured signals. Use of this invention is described in particular detail with respect to blood oximetry measurements. | 03-19-2009 |

20120149997 | SIGNAL PROCESSING APPARATUS - The present invention involves a method and an apparatus for analyzing measured signals, including the determination of a measurement of oxygen saturation and respiration rate in the measured signals during a calculation of a physiological parameter of a monitored patient. Use of this invention is described in particular detail with respect to oximetry-based measurements. | 06-14-2012 |

20120165624 | SIGNAL PROCESSING APPARATUS - The present invention involves a method and an apparatus for analyzing measured signals, including the determination of a measurement of oxygen saturation and respiration rate in the measured signals during a calculation of a physiological parameter of a monitored patient. Use of this invention is described in particular detail with respect to oximetry-based measurements but extends to other types of measurements. | 06-28-2012 |

20120165631 | SIGNAL PROCESSING APPARATUS - The present disclosure describes a method and an apparatus for analyzing measured signals using various processing techniques. In certain embodiments, the measured signals are physiological signals. In certain embodiments, the measurements relate to blood constituent measurements including blood oxygen saturation. | 06-28-2012 |

20120220843 | SIGNAL PROCESSING APPARATUS - The present invention involves a method and an apparatus for analyzing measured signals, including the determination of a measurement of oxygen saturation and respiration rate in the measured signals during a calculation of a physiological parameter of a monitored patient. Use of this invention is described in particular detail with respect to oximetry-based measurements but extends to other types of measurements. | 08-30-2012 |

20130345523 | SIGNAL PROCESSING APPARATUS - The present invention involves a method and an apparatus for analyzing measured signals, including the determination of a measurement of oxygen saturation and respiration rate in the measured signals during a calculation of a physiological parameter of a monitored patient. Use of this invention is described in particular detail with respect to oximetry-based measurements but extends to other types of measurements. | 12-26-2013 |

## Ibrahim M. Elfadel, Ossining, NY US

Patent application number | Description | Published |
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20080221849 | Method, Apparatus And Computer Program Product For Creating Electric Circuit Models Of Semiconductor Circuits From Fabrication Process Parameters - Disclosed herein are methods and apparatus that automatically generate an electric circuit model from process parameters used to specify a semiconductor fabrication procedure, wherein at least one of the process parameters is specified as a statistical distribution. The methods and apparatus convert the process parameters into an electric circuit model. The electric circuit model is specified in terms of electric parameters, wherein at least one of the electric parameters is specified in terms of a statistical distribution. The methods and apparatus thus allow a process engineer whose expertise may not extend to state-of-the-art circuit modeling to develop insight into the effect of process parameter selection on the performance of the resulting electric circuit. The resulting insight is further enhanced since at least one of the electric parameters is specified in terms of a statistical distribution. | 09-11-2008 |

20080221852 | Method For Order Selection In Passive Transmission Line Macromodels Based On The Lie Criteria - A passive macromodel for lossy, dispersive multiconductor transmission lines uses a multiplicative approximation of the matrix exponential known as the Lie product. The circuit implementation of the macromodel is a cascade of elementary cells, each cell being the combination of a pure delay element and a lumped circuit representing the transmission line losses. Compared with passive rational macromodeling, the Lie product macromodel is capable of efficiently simulating long, low-loss multiconductor transmission lines while preserving passivity. This result is combined with transmission line theory to derive a time-domain error criterion for the Lie product macromodel. This criterion is used to determine the minimum number of cells needed in the macromodel to assure that the magnitude of the time-domain error is less than a given engineering tolerance. | 09-11-2008 |

## Ibrahim M. Elfadel, Yorktown, NY US

Patent application number | Description | Published |
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20110161908 | GENERATING CAPACITANCE LOOK-UP TABLES FOR WIRING PATTERNS IN THE PRESENCE OF METAL FILLS - A computer system selects a signal conductor from an electronic circuit design layout and assigns a first potential to the selected signal conductor. Next, the computer system assigns a second potential to other signal conductors included in the electronic circuit design layout. The computer system then selects a metal fill from the electronic circuit design layout, which is void from carrying an electrical signal, and generates a zero charge equation for the selected metal fill. The zero charge equation establishes that a total charge residing on the selected metal fill is equal to zero. The computer system includes the zero charge equation in a system of equations, which includes grid point potential equations, and solves the system of equations. In turn, the computer system computes capacitance values for the signal conductors based upon the system of equation solutions, and simulates the electronic circuit design layout using the computed capacitance values. | 06-30-2011 |

20110296358 | Computing Resistance Sensitivities with Respect to Geometric Parameters of Conductors with Arbitrary Shapes - A computer system selects a shape included in an integrated circuit's layout file, and then selects a first contact and a second contact located on the shape. Next, the computer system computes a nominal resistance between the first contact and the second contact based upon a nominal boundary of the shape, and then computes an adjoint system vector based upon a perturbed boundary of the shape. Using the adjoint system vector, the computer system computes a resistance sensitivity between the first contact and the second contact. In turn, the computer system simulates the integrated circuit using the computed nominal resistance and the computed resistance sensitivity. | 12-01-2011 |

20120204140 | Generating Capacitance Look-up Tables for Wiring Patterns in the Presence of Metal Fills - A computer system selects a signal conductor from an electronic circuit design layout and assigns a first potential to the selected signal conductor. Next, the computer system assigns a second potential to other signal conductors included in the electronic circuit design layout. The computer system then selects a metal fill from the electronic circuit design layout, which is void from carrying an electrical signal, and generates a zero charge equation for the selected metal fill. The zero charge equation establishes that a total charge residing on the selected metal fill is equal to zero. The computer system includes the zero charge equation in a system of equations, which includes grid point potential equations, and solves the system of equations. In turn, the computer system computes capacitance values for the signal conductors based upon the system of equation solutions, and simulates the electronic circuit design layout using the computed capacitance values. | 08-09-2012 |