Patent application number | Description | Published |
20100083009 | POWER MANAGEMENT FOR PROCESSING UNIT - Methods, apparatuses, and systems for managing power of a processing unit are described herein. Some embodiments include determining a voltage variation of a subset of current components of a current consumed by a processing unit. Other embodiments include detecting architectural events on a processing core of the processing unit and instituting various actions to reduce an input rate of instructions to the core. Other embodiments may be described and claimed. | 04-01-2010 |
20100115293 | DETERMINISTIC MANAGEMENT OF DYNAMIC THERMAL RESPONSE OF PROCESSORS - Methods and apparatus relating to deterministic management of dynamic thermal response of processors are described. In one embodiment, available thermal headroom may be used to extract the performance potential in a deterministic way, e.g., such that it reduces or even eliminates the product-to-product variations. Other embodiments are also disclosed and claimed. | 05-06-2010 |
20100115304 | POWER MANAGEMENT FOR MULTIPLE PROCESSOR CORES - Methods and apparatus relating to power management for multiple processor cores are described. In one embodiment, one or more techniques may be utilized locally (e.g., on a per core basis) to manage power consumption in a processor. In another embodiment, power may be distributed among different power planes of a processor based on energy-based considerations. Other embodiments are also disclosed and claimed. | 05-06-2010 |
20100146314 | Power aware software pipelining for hardware accelerators - Forming a plurality of pipeline orderings, each pipeline ordering comprising one of a sequential, a parallel, or a sequential and parallel combination of a plurality of stages of a pipeline, analyzing the plurality of pipeline orderings to determine a total power of each of the orderings, and selecting one of the plurality of pipeline orderings based on the determined total power of each of the plurality of pipeline orderings. | 06-10-2010 |
20100169609 | Method for optimizing voltage-frequency setup in multi-core processor systems - A method for dynamically operating a multi-core processor system is provided. The method involves ascertaining currently active processor cores, identifying a currently active processor core having a lowest operating frequency, and adjusting at least one operational parameter according to voltage-frequency characteristics corresponding to the identified processor core to fulfill a predefined functional mode, e.g. power optimization mode, performance optimization mode and mixed mode. | 07-01-2010 |
20110154011 | METHODS, SYSTEMS, AND APPARATUSES TO FACILITATE CONFIGURATION OF A HARDWARE DEVICE IN A PLATFORM - Embodiments of methods, systems, and apparatuses for configuring a hardware device in a platform are described. In an exemplary method, a configuration message is received that indicates that the hardware device is to be upgraded from a first configuration to a second configuration, wherein the first and second configurations were pre-determined based on previous testing of the hardware device and are stored in the hardware device. The hardware device is then configured to the second configuration. | 06-23-2011 |
20120166854 | Controlling Current Transients In A Processor - In one embodiment, a processor includes a core with a front end unit, at least one execution unit, and a back end unit. Multiple voltage drop detectors can be located within the core each to output a voltage drop signal when a detected voltage falls below a threshold voltage. In turn, a current transient logic coupled to receive the voltage drop signals can control a micro-architectural parameter of at least one of the front end unit, execution unit and back end unit responsive to receipt of a voltage drop signal. Other embodiments are described and claimed. | 06-28-2012 |
20120221873 | Method, Apparatus, and System for Energy Efficiency and Energy Conservation by Mitigating Performance Variations Between Integrated Circuit Devices - According to one embodiment of the invention, an integrated circuit device comprises one or more processor cores and a control unit coupled to the processor core(s). The control unit is adapted to control an operating frequency of at least one processor core based on an estimated activity level in lieu of a power level. The estimated activity level differing from an estimated power level by being independent of leakage power and voltage characteristics particular to that integrated circuit device. | 08-30-2012 |
20130061064 | Dynamically Allocating A Power Budget Over Multiple Domains Of A Processor - In one embodiment, the present invention includes a method for determining a power budget for a multi-domain processor for a current time interval, determining a portion of the power budget to be allocated to first and second domains of the processor, and controlling a frequency of the domains based on the allocated portions. Such determinations and allocations can be dynamically performed during runtime of the processor. Other embodiments are described and claimed. | 03-07-2013 |
20130080803 | Estimating Temperature Of A Processor Core In A Low Power State - In one embodiment, the present invention includes a method for determining if a core of a multicore processor is in a low power state, and if so, estimating a temperature of the core and storing the estimated temperature in a thermal storage area for the first core. By use of this estimated temperature, an appropriate voltage at which to operate the core when it exits the low power state can be determined. Other embodiments are described and claimed. | 03-28-2013 |
20130080804 | Controlling Temperature Of Multiple Domains Of A Multi-Domain Processor - In one embodiment, the present invention includes a method for determining, in a controller of a multi-domain processor, whether a temperature of a second domain of the multi-domain processor is greater than a sum of a throttle threshold and a cross-domain margin, and if so, reducing a frequency of a first domain of the multi-domain processor by a selected amount. In this way, a temperature of the second domain can be allowed to reduce, given a thermal coupling of the domains. Other embodiments are described and claimed. | 03-28-2013 |
20130111120 | Enabling A Non-Core Domain To Control Memory Bandwidth | 05-02-2013 |
20130111121 | Dynamically Controlling Cache Size To Maximize Energy Efficiency | 05-02-2013 |
20130111226 | Controlling A Turbo Mode Frequency Of A Processor | 05-02-2013 |
20130111236 | Controlling Operating Frequency Of A Core Domain Via A Non-Core Domain Of A Multi-Domain Processor | 05-02-2013 |
20130173941 | Controlling Temperature Of Multiple Domains Of A Multi-Domain Processor - In one embodiment, the present invention includes a method for determining, in a controller of a multi-domain processor, whether a temperature of a second domain of the multi-domain processor is greater than a sum of a throttle threshold and a cross-domain margin, and if so, reducing a frequency of a first domain of the multi-domain processor by a selected amount. In this way, a temperature of the second domain can be allowed to reduce, given a thermal coupling of the domains. Other embodiments are described and claimed. | 07-04-2013 |
20130173946 | CONTROLLING POWER CONSUMPTION THROUGH MULTIPLE POWER LIMITS OVER MULTIPLE TIME INTERVALS - Methods and apparatus relating to controlling power consumption through multiple power limits over multiple time intervals are described. In one embodiment, the level of power consumption by a computing device component (e.g., a processor or one of its processor cores) is modified based on a determined power limit value. The power limit value may be determined based on rolling power consumption averages over multiple time intervals and their comparison against multiple corresponding power limits. Other embodiments are also disclosed and claimed. | 07-04-2013 |
20130179704 | Dynamically Allocating A Power Budget Over Multiple Domains Of A Processor - In one embodiment, the present invention includes a method for determining a power budget for a multi-domain processor for a current time interval, determining a portion of the power budget to be allocated to first and second domains of the processor, and controlling a frequency of the domains based on the allocated portions. Such determinations and allocations can be dynamically performed during runtime of the processor. Other embodiments are described and claimed. | 07-11-2013 |
20130179705 | Controlling A Turbo Mode Frequency Of A Processor - In one embodiment, the present invention includes a multicore processor with a power controller to control a frequency at which the processor operates. More specifically, the power controller can limit a maximum operating frequency of the processor to less than a configured maximum operating frequency to enable a reduction in a number of frequency transitions occurring responsive to power state events, thus avoiding the overhead of operations performed in handling such transitions. Other embodiments are described and claimed. | 07-11-2013 |
20130179709 | Controlling Operating Frequency Of A Core Domain Via A Non-Core Domain Of A Multi-Domain Processor - In one embodiment, the present invention includes a method for determining that a non-core domain of a multi-domain processor is not operating at a frequency requested by the non-core domain, sending a request from the non-core domain to a power controller to reduce a frequency of a core domain of the multi-domain processor, and responsive to the request, reducing the core domain frequency. Other embodiments are described and claimed. | 07-11-2013 |
20130219196 | POWER MANAGEMENT FOR MULTIPLE PROCESSOR CORES - Methods and apparatus relating to power management for multiple processor cores are described. In one embodiment, one or more techniques may be utilized locally (e.g., on a per core basis) to manage power consumption in a processor. In another embodiment, power may be distributed among different power planes of a processor based on energy-based considerations. Other embodiments are also disclosed and claimed. | 08-22-2013 |
20140115351 | DYNAMICALLY ALLOCATING A POWER BUDGET OVER MULTIPLE DOMAINS OF A PROCESSOR - In one embodiment, the present invention includes a method for determining a power budget for a multi-domain processor for a current time interval, determining a portion of the power budget to be allocated to first and second domains of the processor, and controlling a frequency of the domains based on the allocated portions. Such determinations and allocations can be dynamically performed during runtime of the processor. Other embodiments are described and claimed. | 04-24-2014 |
20140258760 | Controlling Operating Voltage Of A Processor - In an embodiment, a processor includes a core domain with a plurality of cores and a power controller having a first logic to receive a first request to increase an operating voltage of a first core of the core domain to a second voltage, to instruct a voltage regulator to increase the operating voltage to an interim voltage, and to thereafter instruct the voltage regulator to increase the operating voltage to the second voltage. Other embodiments are described and claimed. | 09-11-2014 |
20140344598 | Enabling A Non-Core Domain To Control Memory Bandwidth - In one embodiment, the present invention includes a processor having multiple domains including at least a core domain and a non-core domain that is transparent to an operating system (OS). The non-core domain can be controlled by a driver. In turn, the processor further includes a memory interconnect to interconnect the core domain and the non-core domain to a memory coupled to the processor. Still further, a power controller, which may be within the processor, can control a frequency of the memory interconnect based on memory boundedness of a workload being executed on the non-core domain. Other embodiments are described and claimed. | 11-20-2014 |