Patent application number | Description | Published |
20100009185 | Enameled wire containing a nano-filler - An enameled wire containing a nano-filler includes a metallic wire and at least one layer of insulating coating. At least one layer of the at least one layer of insulating coating includes a nano-filler. The nano-filler is a modified silicon dioxide slurry comprising silicon dioxide, organic solvent and organic silane coupling agent. The nano-filler comprises silicon dioxide modified with an organic silane coupling agent to improve dispersion of the nano-filler and maintain properties of the insulating coating. In addition, material and manufacturing costs of the enameled wire can be lowered. | 01-14-2010 |
20100193469 | METHOD FOR MANUFACTURING MICRO/NANO THREE-DIMENSIONAL STRUCTURE - A method for manufacturing a micro/nano three-dimensional structure including the following steps is described. A mold is provided, and a pattern structure including a plurality of convex portions and concave portions is set in the mold. A transfer material layer including a first portion on the convex portions and a second portion on the concave portions is formed. A flexible substrate is disposed on the mold and contacts with the first portion of the transfer material layer. A heating step is performed to partially heat the flexible substrate through the first portion. A pressure is applied on the flexible substrate to adhere or press the first portion to the flexible substrate. The mold is removed. An etching step is performed on the flexible substrate by using the first portion of the transfer material layer as a mask to form a micro/nano three-dimensional structure in the flexible substrate. | 08-05-2010 |
20120295437 | METHOD FOR FABRICATING THROUGH-SILICON VIA STRUCTURE - A method for fabricating through-silicon via structure is disclosed. The method includes the steps of: providing a semiconductor substrate; forming a through-silicon via in the semiconductor substrate; covering a liner in the through-silicon via; performing a baking process on the liner; forming a barrier layer on the liner; and forming a through-silicon via electrode in the through-silicon via. | 11-22-2012 |
20120305403 | Electrical Chemical Plating Process - An electrical chemical plating process is provided. A semiconductor structure is provided in an electrical plating platform. A pre-electrical-plating step is performed wherein the pre-electrical-plating step is carried out under a fixed voltage environment and lasts for 0.2 to 0.5 seconds after the current is above the threshold current of the electrical plating platform. After the pre-electrical-plating step, a first electrical plating step is performed on the semiconductor structure. | 12-06-2012 |
20130140688 | Through Silicon Via and Method of Manufacturing the Same - The present invention discloses a through silicon via and method of manufacturing the same comprising the steps of providing a substrate, forming a plurality of through silicon via (TSV) holes in said substrate, forming a seed layer on the surface of said substrate and said a plurality of TSV holes, forming a patterned mask on said substrate, wherein said patterned mask comprises a plurality of first openings corresponding to said TSV holes and a plurality of second openings adjacent to or surrounding said a plurality of first openings, forming a material layer on said substrate, wherein said material layer is filled into said TSV holes and said first openings to form a plurality of through silicon vias, and said material layer is filled into said second openings to form a plurality of dummy bumps. | 06-06-2013 |
20140346645 | THROUGH SILICON VIA AND PROCESS THEREOF - A through silicon via includes a substrate and a conductive plug. The substrate has a hole in a side. The conductive plug is disposed in the hole, and the conductive plug having an upper part protruding from the side, wherein the upper part has a top part and a bottom part, and the top part is finer than the bottom part. Moreover, a through silicon via process formed said through silicon via is also provided, which includes the following step. A hole is formed in a substrate from a side. A first conductive material is formed to cover the hole and the side. A patterned photoresist is formed to cover the side but exposing the hole. A second conductive material is formed on the exposed first conductive material. The patterned photoresist is removed. The first conductive material on the side is removed to form a conductive plug in the hole. | 11-27-2014 |
20150041952 | SEMICONDUCTOR STRUCTURE - A semiconductor structure is provided. The semiconductor structure includes an interposer structure. The interposer structure includes an interposer substrate, a ground, through vias, a dielectric layer, and an inductor. The through vias are formed in the interposer substrate and electrically connected to the ground. The dielectric layer is on the interposer substrate. The inductor is on the dielectric layer. | 02-12-2015 |
20150179516 | INTEGRATED STRUCTURE AND METHOD FOR FABRICATING THE SAME - A method for fabricating integrated structure is disclosed. The method includes the steps of: providing a substrate; forming a through-silicon hole in the substrate; forming a patterned resist on the substrate, wherein the patterned resist comprises at least one opening corresponding to a redistribution layer (RDL) pattern and exposing the through-silicon hole and at least another opening corresponding to another redistribution layer (RDL) pattern and connecting to the at least one opening; and forming a conductive layer to fill the through-silicon hole, the at least one opening and the at least another opening in the patterned resist so as to form a through-silicon via, a through-silicon via RDL pattern and another RDL pattern in one structure. | 06-25-2015 |
20150179580 | HYBRID INTERCONNECT STRUCTURE AND METHOD FOR FABRICATING THE SAME - A method for fabricating hybrid interconnect structure is disclosed. The method includes the steps of: providing a material layer; forming a through-silicon hole in the material layer; forming a patterned resist on the material layer, wherein the patterned resist comprises at least an opening for exposing the through-silicon hole; and forming a conductive layer to fill the through-silicon hole and the opening in the patterned resist. | 06-25-2015 |