Patent application number | Description | Published |
20120220113 | Method of Manufacturing Semiconductor Device Having Metal Gate - The present invention provides a method of manufacturing semiconductor device having metal gate. First, a substrate is provided. A first conductive type transistor having a first sacrifice gate and a second conductive type transistor having a second sacrifice gate are disposed on the substrate. The first sacrifice gate is removed to form a first trench and then a first metal layer and a first material layer are formed in the first trench. Next, the first metal layer and the first material layer are flattened. The second sacrifice gate is removed to form a second trench and then a second metal layer and a second material layer are formed in the second trench. Lastly, the second metal layer and the second material layer are flattened. | 08-30-2012 |
20120256276 | Metal Gate and Fabricating Method Thereof - A method of manufacturing a metal gate is provided. The method includes providing a substrate. Then, a gate dielectric layer is formed on the substrate. A multi-layered stack structure having a work function metal layer is formed on the gate dielectric layer. An O | 10-11-2012 |
20120313178 | SEMICONDUCTOR DEVICE HAVING METAL GATE AND MANUFACTURING METHOD THEREOF - A method of manufacturing a semiconductor device having metal gate includes providing a substrate having a first transistor and a second transistor formed thereon, the first transistor having a first gate trench formed therein, forming a first work function metal layer in the first gate trench, forming a sacrificial masking layer in the first gate trench, removing a portion of the sacrificial masking layer to expose a portion of the first work function metal layer, removing the exposed first function metal layer to form a U-shaped work function metal layer in the first gate trench, and removing the sacrificial masking layer. The first transistor includes a first conductivity type and the second transistor includes a second conductivity type. The first conductivity type and the second conductivity type are complementary. | 12-13-2012 |
20120326243 | TRANSISTOR HAVING ALUMINUM METAL GATE AND METHOD OF MAKING THE SAME - A transistor having an aluminum metal gate includes a substrate, a high-k gate dielectric layer, an aluminum metal gate and a source/drain region. The high-k gate dielectric layer is disposed on the substrate. The aluminum metal gate includes a work function tuning layer and an aluminum metal layer disposed orderly on the high-k gate dielectric layer, where the aluminum metal layer comprises a first aluminum metal layer and a second aluminum metal layer. Furthermore, the source/drain region is disposed in the substrate at each of two sides of the aluminum metal gate. | 12-27-2012 |
20130043506 | Fin-FET and Method of Forming the Same - A method of forming a Fin-FET is provided. A substrate is provided, then a mask layer is formed thereabove. A first trench is formed in the substrate and the mask layer. A semiconductor layer is formed in the first trench. Next, the mask layer is removed such that the semi-conductive layer becomes a fin structure embedded in the substrate and protruded above the substrate. Finally, a gate layer is formed on the fin structure. | 02-21-2013 |
20130078818 | SEMICONDUCTOR PROCESS - A semiconductor process includes the following steps. A substrate is provided. At least a fin-shaped structure is formed on the substrate and an oxide layer is formed on the substrate without the fin-shaped structure forming thereon. A thermal treatment process is performed to form a melting layer on at least a part of the sidewall of the fin-shaped structure. | 03-28-2013 |
20130113027 | Metal Oxide Semiconductor Transistor and Manufacturing Method Thereof - The present invention provides a MOS transistor, including a substrate, a gate oxide, a gate, a source/drain region and a silicide layer. The gate oxide is disposed on the substrate and the gate is disposed on the gate oxide. The source/drain region is disposed in the substrate at two sides of the gate. The silicide layer is disposed on the source/drain region, wherein the silicide layer includes a curved bottom surface. The present invention further provides a manufacturing method of the MOS transistor. | 05-09-2013 |
20130113053 | SEMICONDUCTOR STRUCTURE AND PROCESS THEREOF - A semiconductor structure includes a substrate, a dielectric layer and a fluoride metal layer. The dielectric layer is located on the substrate. The fluoride metal layer is located on the dielectric layer. Furthermore, the present invention also provides a semiconductor process to form said semiconductor structure. | 05-09-2013 |
20130115777 | MANUFACTURING METHOD FOR SEMICONDUCTOR STRUCTURES - A manufacturing method for semiconductor structures includes providing a substrate having a first region and a second region defined thereon, forming a plurality of first patterns in the first region and at least a second pattern in the second region, forming a plurality of first spacers respectively on sidewalls of the first patterns and at least a second spacer on a sidewall of the second pattern, forming a patterned protecting layer in the second region, removing the first patterns from the first region to form a plurality of first masking patterns in the first region and at least a second masking pattern in the second region, and transferring the first masking patterns and the second masking pattern to the substrate. | 05-09-2013 |
20130200470 | SEMICONDUCTOR STRUCTURE AND METHOD OF FABRICATING THE SAME - A semiconductor structure and a method of fabricating the same comprising the steps of providing a substrate, forming at least one fin structure on said substrate, forming a gate covering said fin structure, forming a plurality of epitaxial structures covering said fin structures, performing a gate pullback process to reduce the critical dimension (CD) of said gate and separate said gate and said epitaxial structures, forming lightly doped drains (LDD) in said fin structures, and forming a spacer on said gate and said fin structures. | 08-08-2013 |
20130277686 | Semiconductor Structure with Metal Gate and Method of Fabricating the Same - A metal gate process comprises the steps of providing a substrate, forming a dummy gate on said substrate, forming dummy spacers on at least one of the surrounding sidewalls of said dummy gate, forming a source and a drain respectively in said substrate at both sides of said dummy gate, performing a replacement metal gate process to replace said dummy gate with a metal gate, removing said dummy spacers, and forming low-K spacers to replace said dummy spacers. | 10-24-2013 |
20130307126 | SEMICONDUCTOR STRUCTURE AND PROCESS THEREOF - A semiconductor structure includes a stacked metal oxide layer on a substrate, wherein the stacked metal oxide layer includes a first metal oxide layer, a second metal oxide layer, and a third metal oxide layer from top to bottom, and the energy bandgap of the second metal oxide layer is lower than the energy bandgap of the first metal oxide layer and that of the third metal oxide layer. The semiconductor structure includes a metal oxide layer on a substrate, wherein the energy bandgap of the metal oxide layer changes along a direction perpendicular to the surface of the substrate. The present invention also provides a semiconductor process forming said semiconductor structure. | 11-21-2013 |
20140077229 | SEMICONDUCTOR STRUCTURE - A non-planar semiconductor structure comprises a substrate, at least one fin structure on the substrate, a gate covering parts of the fin structures and part of the substrate such that the fin structure is divided into a channel region stacking with the gate and source/drain region at both sides of the gate, a plurality of epitaxial structures covering on the source/drain region of the fin structures, a recess is provided between the channel region of the fin structure and the epitaxial structure, and a spacer formed on the sidewalls of the gate and the epitaxial structures, wherein the portion of the spacer filling in the recesses is flush with the top surface of the epitaxial structures. | 03-20-2014 |
20140103443 | SEMICONDUCTOR DEVICE HAVING METAL GATE AND MANUFACTURING METHOD THEREOF - A semiconductor device having a metal gate includes a substrate having a first gate trench and a second gate trench formed thereon, a gate dielectric layer respectively formed in the first gate trench and the second gate trench, a first work function metal layer formed on the gate dielectric layer in the first gate trench and the second gate trench, a second work function metal layer respectively formed in the first gate trench and the second gate trench, and a filling metal layer formed on the second work function metal layer. An opening width of the second gate trench is larger than an opening width of the first gate trench. An upper area of the second work function metal layer in the first gate trench is wider than a lower area of the second work function metal layer in the first gate trench. | 04-17-2014 |
20140113425 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE - A method of fabricating a semiconductor device includes the following steps. At first, at least a gate structure is formed on a substrate. Subsequently, a first material layer and a second material layer sequentially formed on the substrate conformally cover the gate structure. Subsequently, an implantation process is performed on the second material layer, and a wet etching process is further performed to remove a part of the second material layer to form a remaining second material layer. Furthermore, a dry etching process is performed to remove a part of the remaining second material layer to form a partial spacer. | 04-24-2014 |
20140127892 | SEMICONDUCTOR DEVICE HAVING METAL GATE AND MANUFACTURING METHOD THEREOF - A method of manufacturing a semiconductor device having metal gate includes providing a substrate having a first transistor and a second transistor formed thereon, the first transistor having a first gate trench formed therein, forming a first work function metal layer in the first gate trench, forming a sacrificial masking layer in the first gate trench, removing a portion of the sacrificial masking layer to expose a portion of the first work function metal layer, removing the exposed first function metal layer to form a U-shaped work function metal layer in the first gate trench, and removing the sacrificial masking layer. The first transistor includes a first conductivity type and the second transistor includes a second conductivity type. The first conductivity type and the second conductivity type are complementary. | 05-08-2014 |
20140256136 | METHOD FOR FORMING FIN-SHAPED STRUCTURES - The present invention provides a method for forming a fin structure comprising the following steps: first, a multiple-layer structure is formed on a substrate; then, a sacrificial pattern is formed on the multiple-layer structure, a spacer is formed on the sidewall of the sacrificial pattern and disposed on the multiple-layer structure, the sacrificial pattern is removed, the spacer is used as a cap layer to etch parts of the multiple-layer structure, and then the multiple-layer structure is used as a cap layer to etch the substrate and to form at least one fin structure in the substrate. | 09-11-2014 |
20140339652 | SEMICONDUCTOR DEVICE WITH OXYGEN-CONTAINING METAL GATES - A semiconductor device with oxygen-containing metal gates includes a substrate, a gate dielectric layer and a multi-layered stack structure. The multi-layered stack structure is disposed on the substrate. At least one layer of the multi-layered stack structure includes a work function metal layer. The concentration of oxygen in the side of one layer of the multi-layered stack structure closer to the gate dielectric layer is less than that in the side of one layer of the multi-layered stack structure opposite to the gate dielectric layer. | 11-20-2014 |
20150017781 | METHOD OF FORMING SHALLOW TRENCH ISOLATION STRUCTURE - A method of forming a shallow trench isolation structure is disclosed. Hard mask patterns are formed on a substrate. A portion of the substrate is removed, using the hard mask patterns as a mask, to form first trenches in the substrate, wherein a fin is disposed between the neighboring first trenches. A filling layer is formed in the first trenches. A patterned mask layer is formed on the filling layer. A portion of the filling layer and a portion of the fins are removed, using the patterned mask layer as a mask, to form second trenches in the substrate. A first insulating layer is formed on the substrate filling in the second trenches. | 01-15-2015 |
20150061041 | SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME - A method of forming a semiconductor device is disclosed. A substrate having a dielectric layer thereon is provided. The dielectric layer has a gate trench therein and a gate dielectric layer is formed on a bottom of the gate trench. A work function metal layer and a top barrier layer are sequentially formed in the gate trench. A treatment is performed to the top barrier layer so as to form a silicon-containing top barrier layer. A low-resistivity metal layer is formed in the gate trench. | 03-05-2015 |
20150069533 | SEMICONDUCTOR DEVICE HAVING METAL GATE AND MANUFACTURING METHOD THEREOF - A method for manufacturing a semiconductor device having metal gate includes following steps. A substrate having at least a first semiconductor device formed thereon is provided. The first semiconductor device includes a first gate trench formed therein. Next, an n-typed work function metal layer is formed in the first gate trench. After forming the n-typed work function metal layer, a nitridation process is performed to form a first protecting layer on the n-typed work function metal layer. After forming the first protecting layer, an oxidation process is performed to the first protecting layer to form a second protecting layer on the n-typed work function metal layer. Then, a gap filling metal layer is formed to fill up the first gate trench. | 03-12-2015 |
20150076623 | METAL GATE TRANSISTOR AND METHOD FOR FABRICATING THE SAME - A method for fabricating metal gate transistor is disclosed. The method includes the steps of: providing a substrate having a NMOS region and a PMOS region; forming a dummy gate on each of the NMOS region and the PMOS region respectively; removing the dummy gates from each of the NMOS region and the PMOS region; forming a n-type work function layer on the NMOS region and the PMOS region; removing the n-type work function layer in the PMOS region; forming a p-type work function layer on the NMOS region and the PMOS region; and depositing a low resistance metal layer on the p-type work function layer of the NMOS region and the PMOS region. | 03-19-2015 |