Patent application number | Description | Published |
20140070352 | Stress Release Layout and Associated Methods and Devices - An embodiment semiconductor device includes a substrate such as a silicon or silicon-containing film, a pixel array supported by the substrate, and a metal stress release feature arranged around a periphery of the pixel array. The metal stress release feature may be formed from metal strips or discrete metal elements. The metal stress release feature may be arranged in a stress release pattern that uses a single line or a plurality of lines. The metal stress release pattern may also use metal corner elements at ends of the lines. | 03-13-2014 |
20150130001 | IMAGE SENSOR AND METHOD FOR MANUFACTURING THEREOF - An image sensor is provided including a substrate, an array of photosensitive units, a grid and a plurality of color filters. In the image sensor, the grid has a first portion and a second portion disposed on the first portion. The second portion of the grid can cause reflection or refraction of incident lights targeted for one image sensor element back into the same image sensor element, so as to avoid crosstalk occurred. Further, a method for manufacturing the image sensor also provides herein. | 05-14-2015 |
20150130002 | IMAGE SENSOR AND METHOD FOR MANUFACTURING THEREOF - An image sensor is provided including a substrate, an array of photosensitive units, a grid, a light-tight layer and a plurality of color filters. In the image sensor, the grid has a top surface, and the light-tight layer is disposed on the top surface of the grid. Due to the light-tight layer on the grid, an incident light entering into the grid can be blocked by the light-tight layer, so that the crosstalk effect is reduced significantly. Further, a method for manufacturing the image sensor also provides herein. | 05-14-2015 |
20150145083 | Structure Of Dielectric Grid For A Semiconductor Device - An image sensor device and a method for manufacturing the image sensor device are provided. An image sensor device includes a pixel region and a non-pixel region in a substrate. In the pixel region there is a plurality of sensor elements. The non-pixel region is adjacent to the pixel region and has no sensor element. Dielectric grids are disposed in the pixel region with a first dielectric trench between two adjacent dielectric grids. The first dielectric trench aligns to a respective sensor element. Second dielectric trenches are disposed in the non-pixel region. | 05-28-2015 |
20150311247 | METHOD AND APPARATUS FOR FORMING BACK SIDE ILLUMINATED IMAGE SENSORS WITH EMBEDDED COLOR FILTERS - A semiconductor image sensor includes a substrate having a first side and a second side that is opposite the first side. An interconnect structure is disposed over the first side of the substrate. A plurality of radiation-sensing regions is located in the substrate. The radiation-sensing regions are configured to sense radiation that enters the substrate from the second side. The radiation-sensing regions are separated by a plurality of gaps. A plurality of radiation-blocking structures is disposed over the second side of the substrate. Each of the radiation-blocking structures is aligned with a respective one of the gaps. A plurality of color filters are disposed in between the radiation-blocking structures. | 10-29-2015 |
20160043129 | Stress Release Layout and Associated Methods and Devices - An embodiment semiconductor device includes a substrate such as a silicon or silicon-containing film, a pixel array supported by the substrate, and a metal stress release feature arranged around a periphery of the pixel array. The metal stress release feature may be formed from metal strips or discrete metal elements. The metal stress release feature may be arranged in a stress release pattern that uses a single line or a plurality of lines. The metal stress release pattern may also use metal corner elements at ends of the lines. | 02-11-2016 |
20160056196 | CONDUCTION LAYER FOR STACKED CIS CHARGING PREVENTION - A semiconductor device includes a first semiconductor chip comprising a first metallic structure and a second semiconductor chip comprising a second metallic structure. The second semiconductor chip is bonded with the first semiconductor chip by a first conductive plug. A second conductive plug extends from the first metallic structure and into a substrate of the first semiconductor chip. The first conductive plug connects the first metallic structure and the second metallic structure, wherein a conductive liner is along a sidewall of the first conductive plug or the second conductive plug. | 02-25-2016 |
20160111465 | STRUCTURE OF DIELECTRIC GRID FOR A SEMICONDUCTOR DEVICE - A method of forming an image sensor device is disclosed. The method includes providing a substrate having sensor elements in a pixel region and having no sensor elements in a non-pixel region. The method further includes forming metal pillars over the pixel region and a metal shield layer over the non-pixel region. The metal pillars are disposed above spaces between adjacent sensor elements. The method further includes depositing a dielectric layer over the metal pillars and the metal shield layer; and etching the dielectric layer to form first and second trenches. The first trenches are formed over the pixel region and the second trenches are formed over the non-pixel region. Each of the first trenches aligns to a respective sensor element and is surrounded by the dielectric layer at its bottom and sidewall surfaces. | 04-21-2016 |