Patent application number | Description | Published |
20090103160 | APPARATUS AND METHOD OF FORMING HIGH PERFORMANCE INTEGRATED RF OPTICAL MODULE - An integrated electro-optical module apparatus includes in one embodiment an optical modulator configured to modulate an input optical signal coupled thereto; and a control circuit assembly configured to provide electrical control signals to the optical modulator to modulate the input optical signal; wherein the control circuit assembly is attached to the optical modulator in a stacked arrangement. | 04-23-2009 |
20090242263 | SYSTEM AND METHOD OF FORMING A LOW PROFILE CONFORMAL SHIELD - A system and method for providing shielding to an electrical system is disclosed. A conformal shield is formed by applying a conformal insulating coating to an electrical system. A plurality of openings are formed in the insulating coating at desired locations and a first metallic layer is deposited over the insulating coating and in each of the plurality of openings, the first metallic layer being electrically connected with the circuit board at the desired locations. A second metallic layer is then deposited onto the first metallic layer to increase a thickness of the metallic layers. | 10-01-2009 |
20090243081 | SYSTEM AND METHOD OF FORMING A WAFER SCALE PACKAGE - A system and method for forming a wafer level package (WLP) (i.e., wafer level chip size package) is disclosed. The WLP includes a silicon integrated circuit (IC) substrate having a plurality of die pads formed on a top surface thereof and a plurality of polymer laminates positioned thereon. Each of the polymer laminates is comprised of a separate pre-formed laminate sheet and has a plurality of vias formed therein that correspond to a respective die pad. A plurality of metal interconnects are formed on each of the plurality of polymer laminates so as to cover a portion of a top surface of a polymer laminate and extend down through the via and into contact with a metal interconnect on a neighboring polymer laminate positioned below. An input/output (I/O) system interconnect is positioned on a top surface of the wafer level package and is attached to the plurality of metal interconnects. | 10-01-2009 |
20090245735 | PHOTONIC POWER DEVICES AND METHODS OF MANUFACTURING THE SAME - A high temperature optoelectronic device package includes a substrate, an optoelectronic die situated on an upper surface of the substrate, a seal surrounding the optoelectronic die and situated on the upper surface of the substrate and a housing disposed on the seal having a ferrule-seating portion. The housing is disposed on the seal such that a fiber optic center of the ferrule-seating portion is aligned with an active portion of the optoelectronic die. The optoelectronic die is in operative communication with electronic traces of the substrate. | 10-01-2009 |
20090309241 | ULTRA THIN DIE ELECTRONIC PACKAGE - A method for forming an ultra thin die electronic package is provided. The method includes disposing a first polymer film on a first substrate. The method also includes applying a first adhesive layer to the first polymer film on the first substrate. The method further includes disposing at least one die on the first adhesive layer on the first substrate. The method also includes disposing a second polymer film on at least one additional substrate. The method further includes applying a second adhesive layer to the second polymer film on the at least one additional substrate. The method further includes attaching the first substrate and the at least one additional substrate via the first adhesive layer and the second adhesive layer such that the at least one die is interspersed between. The method also includes forming multiple vias on at least one of a top side, and at least one of a bottom side of the first and the at least one additional substrate, wherein the multiple vias are attached to the die. The method further includes forming an electrical interconnection between the first substrate, the at least one additional substrate and a die pad of the at least one die. | 12-17-2009 |
20100108370 | SYSTEM AND METHOD OF FORMING A PATTERNED CONFORMAL STRUCTURE - A system and method of forming a patterned conformal structure for an electrical system is disclosed. The conformal structure includes a dielectric coating shaped to conform to a surface of an electrical system, with the dielectric coating having a plurality of openings therein positioned over contact pads on the surface of the electrical system. The conformal structure also includes a patterned conductive coating layered on the dielectric coating and on the contact pads such that an electrical connection is formed between the patterned conductive coating and the contact pads. The patterned conductive coating comprises at least one of an interconnect system, a shielding structure, and a thermal path. | 05-06-2010 |
20100244225 | STACKABLE ELECTRONIC PAGKAGE AND METHOD OF FABRICATING SAME - An electronic package includes a first layer having a first surface, the first layer includes a first device having a first electrical node, and a first contact pad in electrical communication with the first electrical node and positioned within the first surface. The package includes a second layer having a second surface and a third surface, the second layer includes a first conductor positioned within the second surface and a second contact pad positioned within the third surface and in electrical communication with the first conductor. A first anisotropic conducting paste (ACP) is positioned between the first contact pad and the first conductor to electrically connect the first contact pad to the first conductor such that an electrical signal may pass therebetween. | 09-30-2010 |
20100244226 | STACKABLE ELECTRONIC PACKAGE AND METHOD OF FABRICATING SAME - An electronic package includes a first layer having a first surface, the first layer includes a first device having a first electrical node, and a first contact pad in electrical communication with the first electrical node and positioned within the first surface. The package includes a second layer having a second surface and a third surface, the second layer includes a first conductor positioned within the second surface and a second contact pad positioned within the third surface and in electrical communication with the first conductor. A first anisotropic conducting paste (ACP) is positioned between the first contact pad and the first conductor to electrically connect the first contact pad to the first conductor such that an electrical signal may pass therebetween. | 09-30-2010 |
20100244235 | INTEGRATED CIRCUIT PACKAGE AND METHOD OF MAKING SAME - An integrated circuit package includes a first dielectric layer comprising a dielectric film having a first side and a second side. The package also includes a die having an active surface affixed to a contact location of the first side of the dielectric film absent a layer of adhesive therebetween that is distinct from a material of the dielectric film. A die stud is affixed to the active surface of the die and extends through the dielectric film to an interconnect location of the second side of the dielectric film, and a via is formed through the dielectric film by the die stud. | 09-30-2010 |
20100244240 | STACKABLE ELECTRONIC PACKAGE AND METHOD OF MAKING SAME - An apparatus comprises a first chip layer comprising a first component coupled to a first side of a first flex layer, the first component comprising a plurality of electrical pads. The first chip layer also comprises a first plurality of feed-thru pads coupled to the first side of the first flex layer and a first encapsulant encapsulating the first component, the first encapsulant having a portion thereof removed to form a first plurality of cavities in the first encapsulant and to expose the first plurality of feed-thru pads by way of the first plurality of cavities. | 09-30-2010 |
20100319981 | SYSTEM AND METHOD OF FORMING ISOLATED CONFORMAL SHIELDING AREAS - A system and method of forming a patterned conformal structure for an electrical system is disclosed. The conformal structure includes a dielectric coating positioned on an electrical system having circuit components mounted thereon, the dielectric coating shaped to conform to a surface of the electrical system and having a plurality of openings therein positioned over contact pads on the surface of the electrical system. The conformal structure also includes a conductive coating layered on the dielectric coating and on the contact pads such that an electrical connection is formed between the conductive coating and the contact pads. The dielectric coating and the conductive coating have a plurality of overlapping pathway openings formed therethrough to isolate a respective shielding area of the conformal structure over desired circuit components or groups of circuit components. | 12-23-2010 |
20110156261 | INTEGRATED CIRCUIT PACKAGE AND METHOD OF MAKING SAME - An integrated circuit package includes a first dielectric layer comprising a dielectric film having a first side and a second side, the first side having a plurality of contact locations and a plurality of non-contact locations. The package includes a plurality of components, each component having a first surface and a second surface, wherein the first surface of each of the plurality of components is affixed to a corresponding one of the plurality of contact locations of the dielectric film absent a layer of adhesive therebetween that is distinct from a material of the dielectric film. | 06-30-2011 |
20110210440 | STACKABLE ELECTRONIC PACKAGE AND METHOD OF FABRICATING SAME - An electronic package includes a first layer having a first surface, the first layer includes a first device having a first electrical node, and a first contact pad in electrical communication with the first electrical node and positioned within the first surface. The package includes a second layer having a second surface and a third surface, the second layer includes a first conductor positioned within the second surface and a second contact pad positioned within the third surface and in electrical communication with the first conductor. A first anisotropic conducting paste (ACP) is positioned between the first contact pad and the first conductor to electrically connect the first contact pad to the first conductor such that an electrical signal may pass therebetween. | 09-01-2011 |
20120069523 | SYSTEM AND METHOD OF FORMING A PATTERNED CONFORMAL STRUCTURE - A system and method of forming a patterned conformal structure for an electrical system is disclosed. The conformal structure includes a dielectric coating shaped to conform to a surface of an electrical system, with the dielectric coating having a plurality of openings therein positioned over contact pads on the surface of the electrical system. The conformal structure also includes a patterned conductive coating layered on the dielectric coating and on the contact pads such that an electrical connection is formed between the patterned conductive coating and the contact pads. The patterned conductive coating comprises at least one of an interconnect system, a shielding structure, and a thermal path. | 03-22-2012 |
20120080414 | METHOD AND SYSTEM FOR LASER PATTERNING A SEMICONDUCTOR SUBSTRATE - A method for laser patterning a sample is presented. The method includes coating at least one side of a substrate to form a sample, where coating the at least one side of the substrate forms an interface between the coating and the at least one side of the substrate. Further, the method includes configuring a scanning pattern for patterning the sample. In addition, the method includes determining settings for one or more laser beams of a laser based on the configured scanning pattern. Moreover, the method includes focusing the one or more laser beams of the laser at or near a surface of the substrate by selecting a focal point of the one or more laser beams near the surface of the substrate and setting a scribe depth near the surface of the substrate. The method also includes patterning the sample based on the configured scanning pattern using the one or more laser beams to generate one or more pixelated devices from the sample. | 04-05-2012 |
20120168941 | STACKABLE ELECTRONIC PACKAGE AND METHOD OF MAKING SAME - An apparatus comprises a first chip layer comprising a first component coupled to a first side of a first flex layer, the first component comprising a plurality of electrical pads. The first chip layer also comprises a first plurality of feed-thru pads coupled to the first side of the first flex layer and a first encapsulant encapsulating the first component, the first encapsulant having a portion thereof removed to form a first plurality of cavities in the first encapsulant and to expose the first plurality of feed-thru pads by way of the first plurality of cavities. | 07-05-2012 |
20120171816 | INTEGRATED CIRCUIT PACKAGE AND METHOD OF MAKING SAME - An integrated circuit package includes a first dielectric layer comprising a dielectric film having a first side and a second side, the first side having a plurality of contact locations and a plurality of non-contact locations. The package includes a plurality of components, each component having a first surface and a second surface, wherein the first surface of each of the plurality of components is affixed to a corresponding one of the plurality of contact locations of the dielectric film absent a layer of adhesive therebetween that is distinct from a material of the dielectric film. | 07-05-2012 |
20130257224 | ULTRASOUND ACOUSTIC ASSEMBLIES AND METHODS OF MANUFACTURE - An ultrasound acoustic assembly includes a number of ultrasound acoustic arrays, each array comprising an acoustic stack comprising a piezoelectric layer assembled with at least one acoustic impedance dematching layer and with a support layer. The acoustic stack defines a number of dicing kerfs and a number of acoustic elements, such that the dicing kerfs are formed between neighboring ones of the acoustic elements. The dicing kerfs extend through the piezoelectric layer and through the acoustic impedance dematching layer(s) but extend only partially through the support layer. The ultrasound acoustic assembly further includes a number of application specific integrated circuit (ASIC) die. Each ultrasound acoustic array is coupled to a respective ASIC die to form a respective acoustic-electric transducer module. Methods of manufacture are also provided. | 10-03-2013 |
20130344653 | STACKABLE ELECTRONIC PACKAGE AND METHOD OF FABRICATING SAME - An electronic package includes a first layer having a first surface, the first layer includes a first device having a first electrical node, and a first contact pad in electrical communication with the first electrical node and positioned within the first surface. The package includes a second layer having a second surface and a third surface, the second layer includes a first conductor positioned within the second surface and a second contact pad positioned within the third surface and in electrical communication with the first conductor. A first anisotropic conducting paste (ACP) is positioned between the first contact pad and the first conductor to electrically connect the first contact pad to the first conductor such that an electrical signal may pass therebetween. | 12-26-2013 |