Ching-Kun
Ching-Kun Chang, Taipei City TW
Patent application number | Description | Published |
---|---|---|
20100118564 | Custom assembly light-emitting module using plugs and jacks for obtaining vertical electrical connections - A custom assembly light-emitting module using plugs and jacks for obtaining vertical electrical connections, includes a light-emitting unit, a lens unit, a plug unit and a jack unit. The lens unit is detachably combined with the light-emitting unit. The plug unit is disposed beside one side of the lens unit and electrically connected with the light-emitting unit. The jack unit is disposed on a bottom side of the plug unit and electrically connected with the plug unit. In addition, the light-emitting unit has two first retaining structures being formed on two opposite lateral sides thereof, the lens unit has a hollow transparent structure and a lens integratedly with the hollow transparent structure, two second retaining structures are disposed in the hollow transparent structure, and the light-emitting unit is detachably disposed in the hollow transparent structure. | 05-13-2010 |
Ching-Kun Chang, Taipei TW
Patent application number | Description | Published |
---|---|---|
20100053965 | LED LAMP - A LED lamp comprises: a lamp base; an illuminating component, mounted on the lamp base, wherein the illuminating component comprises a circuit board and a plurality of LEDs arranged on the circuit board; a lamp shade, mounted on the lamp shade for enclosing the illuminating element, wherein the lamp shade has at least one open area; and at least one waterproof and ventilative element, disposed on the open area for covering the open area; thereby, vapors inside the lamp shade can vacate out of the LED lamp through the waterproof and ventilative element, while external vapors cannot infiltrate into the lamp shade through the waterproof and ventilative element. | 03-04-2010 |
Ching-Kun Chen, Hsinchu City TW
Patent application number | Description | Published |
---|---|---|
20140015107 | METHOD TO IMPROVE WITHIN WAFER UNIFORMITY OF CMP PROCESS - Closed loop control may be used to improve uniformity of within wafer uniformity using chemical mechanical planarization. For example, closed loop control may be used to determine a control profile for a chemical mechanical planarization process to more uniformly and consistently achieve the desired extent of variation of within wafer uniformity of a semiconductor wafer. | 01-16-2014 |
Ching-Kun Huang, Chubei TW
Patent application number | Description | Published |
---|---|---|
20100130003 | Method of Forming Through-Silicon Vias - A method of forming a semiconductor device having a through-silicon via (TSV) is provided. A semiconductor device is provided having a first dielectric layer formed thereon. One or more dielectric layers are formed over the first dielectric layer, such that each of the dielectric layers have a stacking structure, wherein the stacking structures in the one or more dielectric layers are vertically aligned. The stacking structures may be, for example, metal rings. The stacking structures are then removed to form a first recess. A second recess is formed by extending the first recess into the substrate. The second recess is filled with a conductive material to form the TSV. | 05-27-2010 |
20130207200 | INTEGRATED CIRCUIT HAVING THINNER GATE DIELECTRIC AND METHOD OF MAKING - An integrated circuit including a first transistor having a first gate dielectric layer with a first thickness. The integrated circuit also includes a second transistor having a second gate dielectric layer with a second thickness and the second transistor is configured to electrically connect to the first transistor. The integrated circuit also includes a third transistor having a third gate dielectric layer with a third thickness and the third transistor is configured to electrically connect to at least one of the first transistor or the second transistor. The first thickness, the second thickness and the third thickness of the integrated circuit are all different. | 08-15-2013 |
20130341686 | Semiconductor Devices, Transistors, and Methods of Manufacture Thereof - Semiconductor devices, transistors, and methods of manufacture thereof are disclosed. In one embodiment, a semiconductor device includes a gate dielectric disposed over a workpiece, a gate disposed over the gate dielectric, and a spacer disposed over sidewalls of the gate and the gate dielectric. A source region is disposed proximate the spacer on a first side of the gate, and a drain region is disposed proximate the spacer on a second side of the gate. A metal layer is disposed over the source region and the drain region. The metal layer extends beneath the spacers by about 25% or greater than a width of the spacers. | 12-26-2013 |
Ching-Kun Huang, Jhubei TW
Patent application number | Description | Published |
---|---|---|
20140273508 | Wafer Back Side Processing Structure and Apparatus - Disclosed herein is a method of processing a device, comprising providing a substrate having a buffer layer disposed on a back side and forming an outer protection layer over the back side of the buffer layer, forming a thermal layer on the back side of the outer protection layer and heating the substrate through the thermal layer and the back side of the outer protective layer. A back side protection layer may be formed on the back side of the buffer layer. The thermal layer has a thermal emissivity coefficient of about 0.7 or greater and a thickness greater than a roughness of the back side of the outer protection layer. The back side protection layer is an oxide with a thickness between about 20 angstroms and about 50 angstroms. The outer protection layer is a nitride with a thickness between about 50 angstroms and about 300 angstroms. | 09-18-2014 |
20150061035 | Semiconductor Devices, Transistors, and Methods of Manufacture Thereof - Semiconductor devices, transistors, and methods of manufacture thereof are disclosed. In one embodiment, a semiconductor device includes a gate dielectric disposed over a workpiece, a gate disposed over the gate dielectric, and a spacer disposed over sidewalls of the gate and the gate dielectric. A source region is disposed proximate the spacer on a first side of the gate, and a drain region is disposed proximate the spacer on a second side of the gate. A metal layer is disposed over the source region and the drain region. The metal layer extends beneath the spacers by about 25% or greater than a width of the spacers. | 03-05-2015 |
Ching-Kun Lee, Kaohsiung Hsien TW
Patent application number | Description | Published |
---|---|---|
20090152911 | Method of making an armrest and the armrest made thereby - A method of making an armrest that is mountable between adjacent left and right passenger seats includes: separately forming two receptacle parts by molding a prepreg in a first mold assembly, the receptacle parts being adapted to hold personal objects and each having a looped wall surrounding a slot; forming an armrest frame by molding a prepreg in a second mold assembly, the armrest frame including a lower frame portion having a plurality of downwardly extending legs, and an upper frame portion disposed on top of and bridging the legs; and positioning the receptacle parts within the second mold assembly and combining the receptacle parts with the upper frame portion during the forming of the armrest frame in the second mold assembly, thereby providing a one-piece unitary structure having the receptacle parts and the armrest frame. | 06-18-2009 |