Chang-Yu
Chang Yu Kim, Bucheon-Si KR
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20150323928 | SYSTEM AND METHOD FOR DIAGNOSING FAILURE OF SMART SENSOR OR SMART ACTUATOR OF VEHICLE - A system and method for diagnosing a failure of a smart sensor or a smart actuator of a vehicle are provided to diagnose the failure of the smart sensor or the smart actuator based on a detection result of a plurality of controllers connected as a network performing a plurality of logic detections. The method includes collecting, by a main controller, failure information detected by each of the controllers of the vehicle and determining a failure by integrating the failure information of each controller. In addition, the main controller is configured to request a failure confirmation from each controller when the failure occurs and diagnosing a failure of the smart sensor or the smart actuator when the failure confirmation is received. | 11-12-2015 |
Chang Yu Lin, New Taipei City TW
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20120257922 | PIVOT PIN STRUCTURE - A pivot pin structure includes an assembling section formed on a surface of the pivot pin for assembling with at least one bridge member. The bridge member has a pivot section, which rotatably encloses the assembling section of the pivot pin. On the assembling section are disposed multiple ridge sections and valley sections non-parallel to the axis of the pivot pin. The ridge sections and valley sections are formed in a cross-sectional direction of the pivot pin normal to or approximately normal to the axis of the pivot pin and continuously arranged on the surface thereof. By means of the ridge sections and valley sections of the assembling section, the pivot pin can be assembled with the bridge member in an interference-fit manner to naturally provide a guide and restriction effect and lubricant-reserving effect. Therefore, the bridge member is restricted to only rotate around the pivot pin without axially displacing. | 10-11-2012 |
Chang Yu Wu, Hsinchu City TW
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20120033459 | CIRCUIT REGULATOR AND SYNCHRONOUS TIMING PULSE GENERATION CIRCUIT THEREOF - A circuit regulator is used to generate a pulse-width-modulation signal, so as to control a power to be selectively input or not input to a primary side of a switching power supply. The circuit regulator includes a synchronous timing pulse generation circuit, outputs a starting pulse after performing signal process of time delay, timing pulse regulation, and synchronization control on a pulse-width-modulation signal and a discharging time signal of a secondary side, and accordingly effectively controls a pulse starting time of the pulse-width-modulation signal. Therefore, the synchronous timing pulse generation circuit can be applied to the circuit regulator, so as to further effectively prevent an inductor current of the switching power supply from entering a Continuous Conduction Mode (CCM). | 02-09-2012 |
20120188794 | ADAPTIVE BLEEDER CIRCUIT - An adaptive bleeder circuit is applicable to a power converter, in which the power converter has a transformer primary side and a transformer secondary side, and the power converter enables input power to be selectively input or not input to the transformer primary side through a pulse-width-modulated signal. The adaptive bleeder circuit includes a switched bleeder circuit, and the bleeder circuit switch dynamically adjusts a turn on/off ratio (or referred to as duty ratio) of the switch element according to the TRIAC holding current and the converter input current of an alternating current (AC) TRIAC. When the input current is less than the holding current, the bleeder circuit increases conduction time ratio of the pulse-width-modulated signal, such that the input current recovers to the holding current to maintain normal conduction of the AC TRIAC. | 07-26-2012 |
20130009616 | AUTO-SELECTING HOLDING CURRENT CIRCUIT - An auto-selecting holding current circuit is applicable to a converter. A primary side of the converter has a Triode for Alternating Current (TRIAC) and a bleeder circuit. The auto-selecting holding current circuit includes a first sensor module, a second sensor module and a reference voltage selecting circuit. The first sensor module detects an input current drop time or an input voltage drop time to output a sense signal. The second sensor module receives a current detector signal and outputs a critical current signal to detect a holding-current value range of the TRIAC. The reference voltage selecting circuit outputs a reference current signal to the bleeder circuit, and the reference current signal corresponds to a holding-current value of the TRIAC. Therefore, the bleeder circuit maintains normal operation of the TRIACs with different holding-current values. | 01-10-2013 |
20130042158 | SCAN FLIP-FLOP CIRCUIT HAVING FAST SETUP TIME - A scan-flip flop circuit includes an input stage for providing a data signal to a data node, wherein the input stage includes first and second stacks of transistors devices coupled to the data node. The first stack receives a data input signal during a normal operation mode for input to the data node, and the second stack receiving a scan input signal during a scan test mode for input to the data node. The scan flip-flop circuit also includes a master latch coupled directly to the data node for latching the data signal from the input stage and outputting the data signal; a slave latch coupled to an output of the master latch for latching the output from the master latch and outputting the output; and a scan and clock control logic module. The scan and clock control logic module controls the first stack to input the data input signal to the data node during normal operation mode. | 02-14-2013 |
20140183647 | INTEGRATED CIRCUIT LAYOUT DESIGN - An integrated circuit layout that includes a first standard cell having a first transistor region and a second transistor region; a second standard cell having a third transistor region and a fourth transistor region. The first and second standard cells adjoin each other at side boundaries thereof and the first transistor region and the third transistor region are formed in a first continuous active region, and the second transistor region and the fourth transistor region are formed in a second continuous region. | 07-03-2014 |
20150162910 | LOW-POWER INTERNAL CLOCK GATED CELL AND METHOD - A circuit includes a clock trigger block and a logic circuit. The logic circuit is configured to output a signal to the clock trigger block based on a logic level of an enable signal received at the logic circuit. The clock trigger block is configured to output an output signal response to a clock signal received at the clock trigger block and the signal received from the logic circuit. | 06-11-2015 |
20150356225 | MASKS FORMED BASED ON INTEGRATED CIRCUIT LAYOUT DESIGN HAVING CELL THAT INCLUDES EXTENDED ACTIVE REGION - A set of masks corresponds to an integrated circuit layout. The integrated circuit layout includes a first cell having a first transistor region and a second transistor region, and a second cell having a third transistor region and a fourth transistor region. The first cell and the second cell adjoin each other at side cell boundaries thereof, the first transistor region and the third transistor region are formed in a first continuous active region, and the second transistor region and the fourth transistor region are formed in a second continuous active region. The set of masks is formed based on the integrated circuit layout. | 12-10-2015 |
20160065184 | FLIP-FLOP CIRCUIT - A flip-flop circuit is provided. The flip-flop circuit includes a first latch, a trigger stage and a second latch. The first latch is configured to latch a selected signal in response to a first state of a clock signal, and provide a first output signal. The trigger stage, connected to the first latch, is configured to provide a trigger signal based on the clock signal and the first output signal. The second latch, connected to the trigger stage, is configured to latch the trigger signal in response to a second state of the clock signal, and provide a second output signal. The first state and the second state of the clock signal are complementary to each other. | 03-03-2016 |
Chang-Yu Chen, New Taipei City TW
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20160004057 | PORTABLE MICROSCOPE DEVICE - The present invention discloses a portable microscope device which can be installed on the smartphone capable of capturing image. By combing these devices, users can observe the detection sample and capture the image of the sample instantly without environment limitation. Moreover, during operation, the user can observe the whole image of the sample by substituting the microscope lens of different magnification ratio or by shifting the position of the sample. | 01-07-2016 |
Chang-Yu Chen, Kaohsiung City TW
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20130113638 | METHOD AND APPARATUS FOR EVALUATING WEIGHTING OF ELEMENTS OF DAC AND SAR ADC USING THE SAME - A method and an apparatus for evaluating weighting of elements of a DAC and a SAR ADC using the same are provided. An equivalent weighting of each composed element is obtained by adding a reference element with a reference weighting, an auxiliary DAC, and a search circuit into the SAR ADC, and the equivalent weighting is represented by the reference weighting. The SAR ADC can calculate and then obtain a correct digital output by using the calibrated equivalent weighting and the successive approximation result of each input signal. The present disclosure prevents the necessity of matching each composed element of the DAC in the SAR ADC. | 05-09-2013 |
Chang-Yu Chen, Taipei City TW
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20100062214 | Method for drilling micro-hole and structure thereof - Disclosed is a micro-hole structure and a method for forming the micro-hole. A working energy source is projected onto a predetermined drilling site on a first surface of a substrate for a given period of time so as to melt a portion of the substrate to form a working energy entering section until the working energy source penetrates through a second surface of the substrate to form a micro-hole. A melt formed by melting a portion of the substrate in the micro-hole next to the second surface is allowed to reflow in a direction opposite to the projection of the working energy source to thereby form a reflow section in the substrate. Further, a two or more stages emission of laser pulses is used to form the micro-hole to control the bore diameter of the micro-hole. | 03-11-2010 |
20120074108 | METHOD FOR DRILLING MICRO-HOLE AND STRUCTURE THEREOF - Disclosed is a micro-hole structure and a method for forming the micro-hole. A working energy source is projected onto a predetermined drilling site on a first surface of a substrate for a given period of time so as to melt a portion of the substrate to form a working energy entering section until the working energy source penetrates through a second surface of the substrate to form a micro-hole. A melt formed by melting a portion of the substrate in the micro-hole next to the second surface is allowed to reflow in a direction opposite to the projection of the working energy source to thereby form a reflow section in the substrate. Further, a two or more stages emission of laser pulses is used to form the micro-hole to control the bore diameter of the micro-hole. | 03-29-2012 |
Chang-Yu Chen, Kao-Hsiung TW
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20090184730 | System and Method For Display Test - The system for display test includes a driving circuit having integrated circuit (IC) pads on the substrate and the IC pads are electrically connected to the signal lines, respectively. And the first switches are between the first test pads and the IC pads, wherein the number of the first test pads is less than the number of the IC pads. | 07-23-2009 |
Chang-Yu Chen, Taichung City TW
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20140168405 | SAMPLING ASSEMBLY, MICROSCOPE MODULE, AND MICROSCOPE APPARATUS - A microscope apparatus is disclosed. The microscope apparatus comprises a microscope module and an image capture device. The microscope module comprises a housing, a lens element, a sampling assembly, and a light guide element. The lens element is mounted on the housing. The sampling assembly is accommodated in the housing. The light guide element is mounted in the sampling assembly. The sampling assembly is configured to sample a specimen and comprises a cover body and a base body received in the cover body. The cover body has a first top plate and a first anchoring structure connected to the top plate. The base body has a second opt plate and a second anchoring structure connected to the second top plate. The second top plate faces the first top plate to define a holding space for the specimen. | 06-19-2014 |
Chang-Yu Ho, Cyong-Lin Township TW
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20080197809 | Configurable Battery Management System with Embedded SRAM in Chip Architecture - A battery management system includes an external non-volatile memory and a battery management chip with embedded SRAM, CPU, ROM, and ROM_RAM encoder. The chip communicates with the non-volatile memory via standard protocols. While the battery management system is powered on or reset, a battery management program stored in the non-volatile memory is loaded to the embedded SRAM and the executed by CPU. As turning off this system, the program in the SRAM is then restored back the non-volatile memory. A battery protection IC is optionally embedded in the chip or externally connected with this chip to protect the battery from over-/under-voltage, over-current and short-circuit in both charge and discharge. | 08-21-2008 |
20090278501 | Smart battery protector with impedance compensation - A battery protector with internal impedance compensation comprises: a logic circuit and delay module, an overcharge comparator, and an over-discharge comparator. The overcharge comparator has a positive terminal connected with a first adjustable reference signal and the over-discharge comparator has a negative terminal connected with a second adjustable reference signal and both of the other terminals of comparator are fed by the same partial voltage of the same voltage divider, which has two terminals, respectively, connected with the two electrodes of the battery. The first adjustable reference signal and the second adjustable reference are varied with the charging current or discharging current and the internal impedance of the battery. | 11-12-2009 |
Chang-Yu Ho, Zhubei City TW
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20160018469 | METHOD OF ESTIMATING THE STATE OF CHARGE OF A BATTERY AND SYSTEM THEREOF - The invention relates to a method for estimating the state of charge (SOC) of a battery when battery is in the at least states of: charging, discharging, and relaxing. The invention makes use of the battery voltage (VBAT) instead of the battery current. In order to build models in the method, we use standard charging and discharging processes to collect battery information. | 01-21-2016 |
Chang-Yu Ho, Hsinchu Hsien TW
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20080211509 | Battery capacity monitoring system and method of displaying capacity thereof - A system for monitoring the battery capacitor is disclosed. The system comprises an ADC (analog to digital converter), a CPU, a ROM, a clock generator, a SMbus (smart management bus) interface. A series of RTC interrupt signals are generated by the clock generator and feeds to the CPU. When the CPU receives a RTC interrupt, the CPU runs a program in said ROM to calculate the remaining capacity of the battery and stores it into register or RAM according to the digital signal outputs from the ADC, which converts an analog signal of the battery into a digital signal. The SM bus interface then fetches the calculated results from the CPU and displays them by LED in terms of lighting, dark and flashing. | 09-04-2008 |
Chang-Yu Hou, Cambridge, MA US
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20160097876 | Method of Determining CEC and Other Properties from Multi-Frequency Dielectric Measurements - Techniques involve inverting a dielectric dispersion model based on the geometrical and electrochemical effects that affect dielectric dispersion in fluid-saturated rocks and other porous formation with formation data and measurements to obtain further formation characteristics. A workflow involves using multi-frequency dielectric measurements of the dielectric constant and the conductivity of the formation for reservoir evaluation. The workflow also involves determining formation data such as matrix permittivity, formation temperature, pressure, and porosity, etc., and inverting the formation data and the multi-frequency dielectric measurements with the dielectric dispersion model to determine formation characteristics such as volumetric fraction of water in the formation, the formation water salinity and the Cation Exchange Capacity (CEC), etc. From the CEC log, in combination with other measurements, clay typing may be performed and swelling clays may be identified. | 04-07-2016 |
Chang-Yu Hsieh, Taipei TW
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20140201420 | TRANSMISSION INTERFACE SYSTEM WITH DETECTION FUNCTION AND METHOD - A transmission interface system includes a connector; a detecting unit, a control unit, a chipset and a resetting unit. The connector includes lots of transmission interfaces. The detecting unit detects the data type of the current transmitting data and outputs a detecting signal; the control unit receives the detecting signal and informs the resetting unit to output a resetting signal to the chipset. The chipset is reset after receiving the resetting signal, and then the control unit informs the chipset to output a data signal corresponding to the data type of the current transmitting data to the connector. | 07-17-2014 |
20150082056 | COMPUTER DEVICE AND METHOD FOR CONVERTING WORKING MODE OF UNIVERSAL SERIAL BUS CONNECTOR OF THE COMPUTER DEVICE - A computer device and a method for converting a working mode of a universal serial bus (USB) connector of the computer device. The computer device comprises a USB connector, a power interruption unit, a first switch unit, a south bridge chip, a reading unit, a control unit, and a charging control unit. The USB connector is linked to an external USB device. When a fast charging instruction is received, the power interruption unit interrupts the power supply of the USB connector; the first switch unit performs switching, so that the USB connector works in a fast charging mode. When the control unit receives a common charging instruction, the power interruption unit interrupts the power supply of the USB connector; the first switch unit performs switching, so that the USB connector works in a common charging mode, and data transmission can be performed. | 03-19-2015 |
Chang-Yu Hsieh, Taipei City TW
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20120096286 | CHARGING MANAGEMENT METHOD, CHARGING CONTROL CIRCUIT AND THE HOST APPARATUS HAVING THE SAME - A control circuit of universal serial bus (USB) port includes a charge control unit providing a first operating voltage and a second operating voltage to a first operating voltage end and a second operating voltage end of the USB port, and a first circuit unit coupled to the charge control unit. Furthermore, the first circuit includes a first output end and a second output end. When a external apparatus is inserted into the USB port, the charge control unit connects the first output end and the second output end to a differential positive end and a differential negative end of the USB port, respectively, to enter a rapid charging mode. | 04-19-2012 |
Chang-Yu Hsu, Magong City TW
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20110107805 | Method for Forming an U-shaped Metal Frame - A method for forming an U-shaped metal frame includes a preparing means: bend forming a straight tube in a continuous curve shape to be a billet including a spaced section and a first and a second side segments twisted toward opposite directions individually; a forming means: placing the billet into a cavity of a forming mold, closing two ends of the billet, and feeding a high-pressure fluid into the billet; a cutting means: cutting the billet into the first and the second pipes, the first pipe including a first connecting portion formed in a first cut position thereof, the second pipe including a second connecting portion formed in a second cut position thereof; a connecting means: twisting the first side segment and the second side segment toward the same direction, and connecting the first connecting portion and the second connecting portion together to obtain the U-shaped metal frame. | 05-12-2011 |
Chang-Yu Huang, Taipei City TW
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20100270551 | BOTTOM GATE THIN FILM TRANSISTOR AND ACTIVE ARRAY SUBSTRATE - A bottom gate thin film transistor and an active array substrate are provided. The bottom gate thin film transistor includes a gate, a gate insulation layer, a semiconductor layer, a plurality of sources and a plurality of drains. The gate insulation layer is disposed on the gate. The semiconductor layer is disposed on the gate insulation layer and located above the gate. An area ratio of the semiconductor layer and the gate is about 0.001 to 0.9. The sources are electrically connected with each other, and the drains are electrically connected with each other. | 10-28-2010 |
20130119386 | PIXEL STRUCTURE AND FABRICATION METHOD OF PIXEL STRUCTURE - A pixel structure and its fabrication method are provided. The pixel structure includes a channel layer, a first patterned metal layer, a first insulation layer, a second patterned metal layer, a second insulation layer, and a pixel electrode. The first patterned metal layer includes a data line, a source, and a drain. The first insulation layer has a first opening exposing the drain. The second patterned metal layer includes a scan line and a capacitor electrode. The capacitor electrode has at least one first portion overlapping the data line. The second insulation layer has a second opening communicating with the first opening to expose the drain. The pixel electrode is connected to the drain through the first opening and the second opening and at least overlaps the first portion of the capacitor electrode. | 05-16-2013 |
Chang-Yu Lin, Kaohsiung City TW
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20120023719 | MANUFACTURING METHOD FOR A ZINC OXIDE PIEZOELECTRIC THIN-FILM WITH HIGH C-AXIS ORIENTATION - A manufacturing method for a Zinc Oxide (ZnO) piezoelectric thin-film with high C-axis orientation comprises the steps of providing a substrate having a base, a SiO | 02-02-2012 |
Chang-Yu Wang, Hsi Chih City TW
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20080231652 | Printing module for large-sized UV inkjet printer - A printing module for a large-sized UV (ultraviolet) inkjet printer includes an inkjet head device for outputting the color inks of printed figures. It is characterized in that the two sides of the inkjet head device are respectively providing with an inkjet head for outputting primer and an inkjet head for outputting varnish. Thereby, the inkjet head of primer could output under-coat before printing and the inkjet head of varnish could apply the top-coat on printed figures after printing. | 09-25-2008 |
Chang-Yu Wang, Hsin-Chu TW
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20140145628 | AC DRIVEN LIGHTING SYSTEMS CAPABLE OF AVOIDING DARK ZONE - Disclosed are methods and lighting system with LEDs. An exemplified system comprises series-coupled light-emitting diodes, an integrated circuit, and an energy storage apparatus. The series-coupled light-emitting diodes are divided into several LED groups coupled in series. The integrated circuit comprises nodes respectively coupled to the LED groups, for providing a driving current to selectively flow through at least one of the LED groups. The energy storage apparatus has two ends coupled to a predetermined LED in a predetermined LED group. When the driving current flows through the predetermined LED group the energy storage apparatus energizes; and when the driving current does not flow through the predetermined LED group the energy storage apparatus de-energizes to illuminate the predetermined LED. | 05-29-2014 |
Chang-Yu Wu, Hsin-Chu TW
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20140027821 | DEVICE PERFORMANCE ENHANCEMENT - Among other things, one or more techniques for enhancing device (e.g., transistor) performance are provided herein. In one embodiment, device performance is enhanced by forming an extended dummy region at an edge of a region of a device and forming an active region at a non-edge of the region. Limitations associated with semiconductor fabrication processing present in the extended dummy region more so than in non-edge regions. Accordingly, a device exhibiting enhanced performance is formed by connecting a gate to the active region, where the active region has a desired profile because it is comprised within a non-edge of the region. A dummy device (e.g., that may be less responsive) may be formed to include the extended dummy region, where the extended dummy region has a less than desired profile due to limitations associated with semiconductor fabrication processing, for example. | 01-30-2014 |
Chang-Yu Wu, Chiayi County TW
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20140073054 | RECOMBINANT THERMOTOLERANT YEAST WITH A SUBSTITUTE HEAT SHOCK PROTEIN 104 PROMOTER - The invention provides a yeast strain and a method for making the same. The method has the step of replacing the regulation region upstream of the hsp104 gene in the genome of the yeast, so as to accelerate and prolong the expression span of hsp104 gene and enhance the capability of the yeast to ferment and produce ethanol in a high-temperature environment. The yeast is capable of fermenting glucose at a temperature higher than 42° C. to produce ethanol, or biomass ethanol, wherein the ethanol production ratio based on fermentation of glucose is higher than 97%. Being able to synchronize the degradation/hydrolysis stage and fermentation stage of biomass ethanol producing process, the yeast in accordance with the present invention is able to lower the production cost of biomass ethanol and further raise the productivity with its high ethanol production ratio. | 03-13-2014 |
Chang-Yu Wu, Hsinchu County TW
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20150162821 | POWER FACTOR CORRECTION CIRCUIT OF POWER CONVERTER - A power factor correction (PFC) circuit of a power converter is disclosed. The power converter includes a primary side coil, a secondary side coil, an inductive coil, and a power switch. The PFC circuit includes a zero current detection circuit for detecting an inductive signal of the inductive coil to generate a detection signal; an error detection circuit for generating an error signal corresponding to an output voltage signal or an output current signal according to a reference signal; a ramp signal generating circuit for generating a ramp signal; a comparison circuit for comparing the ramp signal with the error signal to generate a comparison signal; and a trigger circuit for generating a control signal to control the power switch and for controlling the ramp signal generating circuit to adjust a slope of the ramp signal according to the detection signal and the comparison signal. | 06-11-2015 |
Chang-Yu Wu, Hsinchu TW
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20080284714 | CONTROL CIRCUIT OF AREA CONTROL DRIVING CIRCUIT FOR LED LIGHT SOURCE AND CONTROLLING METHOD THEREOF - A control circuit of a driving circuit for controlling a light emitting diode (LED) light source having a plurality of areas is provided. The control circuit includes the error amplifiers receiving a feed back current signal and a external reference voltage, and generating an error signal; a buffer register receiving a serial digital signal and generating the parallel digital signals; a work register receiving the parallel digital signals and a trigger signal, and outputting the parallel digital signals when the trigger signal is at a relatively high level; and a switch module having the power switches, each of which receives the error signal and the parallel digital signal for generating a driving signal to control a driving current of a specific area of the light source, in order to control the brightness in each area of the LED light source. | 11-20-2008 |