Patent application number | Description | Published |
20080252210 | Electrode Patterning - A method is provided to isolated conductive pads on top of a multi-layer polymer device structure. The method utilizes laser radiation to ablate conductive material and create a non-conductive path, electrically isolating the conductive pads. The process is self-limiting and incorporates at least one layer within the stack that absorbs the radiation at the required wavelength. The prevention of radiation degradation of the underlying layers is achieved, as absorption of radiation occurs primarily on the surface of the structure, but not in any of the radiation sensitive underlying layers of the electronic device. The method preferably uses low energy infrared radiation which has been shown to produce little debris and no device degradation. | 10-16-2008 |
20090212292 | Layer-selective laser ablation patterning - A method of fabricating an organic electronic device is provided. The organic electronic device has a structure including an upper conductive layer and an underlying layer immediately beneath said upper conducting layer and having at least one solution process able semiconducting layer. The upper conducting layer preferably has a thickness of between 10 nm and 200 nm. The method includes patterning said upper conductive layer of said structure by: laser ablating said upper conductive layer using a pulsed laser to remove regions of upper conductive layer from said underlying layer for said patterning; and wherein said laser ablating uses a single pulse of said laser to substantially completely remove a said region of said upper conductive layer to expose said underlying layer beneath | 08-27-2009 |
20130330850 | ELECTRODE PATTERNING - A method is provided to isolated conductive pads on top of a multi-layer polymer device structure. The method utilizes laser radiation to ablate conductive material and create a non-conductive path, electrically isolating the conductive pads. The process is self-limiting and incorporates at least one layer within the stack that absorbs the radiation at the required wavelength. The prevention of radiation degradation of the underlying layers is achieved, as absorption of radiation occurs primarily on the surface of the structure, but not in any of the radiation sensitive underlying layers of the electronic device. The method preferably uses low energy infrared radiation which has been shown to produce little debris and no device degradation. | 12-12-2013 |
20140235011 | PROCESS OF MANUFACTURING OF THE CATALYTIC LAYER OF THE COUNTER-ELECTRODES OF DYE-SENSITIZED SOLAR CELLS - A process of manufacturing the catalytic layer of the counter-electrodes of dye-sensitized solar cells is described. The process has the following steps: depositing a catalyst precursor paste or precursor solution layer over the counter-electrodes conductive and transparent substrates, by screen printing, doctor blade, spin coating or brush,and irradiating the catalyst precursor paste or precursor solution layer with a continuous wave or pulsed laser beam having a wavelength in the range of infrared, visible, or ultraviolet, thus curing the precursor and forming a catalyst layer over the conductive and transparent counter-electrode substrates. | 08-21-2014 |
20160111667 | LAYER-SELECTIVE LASER ABLATION PATTERNING - A method of fabricating an organic electronic device is provided. The organic electronic device has a structure including an upper conductive layer and an underlying layer immediately beneath said upper conducting layer and having at least one solution processable semiconducting layer. The upper conducting layer preferably has a thickness of between 10 nm and 200 nm. The method includes patterning said upper conductive layer of said structure by: laser ablating said upper conductive layer using a pulsed laser to remove regions of upper conductive layer from said underlying layer for said patterning; and wherein said laser ablating uses a single pulse of said laser to substantially completely remove a said region of said upper conductive layer to expose said underlying layer beneath. | 04-21-2016 |