Bouchoucha
Michel Luc Bouchoucha, Paris FR
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20110071385 | METHOD AND SYSTEM FOR LOCALIZING AN INGESTIBLE ELEMENT FOR THE FUNCTIONAL INVESTIGATION OF THE DIGESTIVE TRACT - A non-invasive exploration method for assessing the digestive motility of a subject including the subject swallowing an ingestible transmitting element containing a transmission means transmitting at a given fixed frequency, measuring in series the phase-shift of the frequency transmitted by each of at least three transportable reception means relative to a reference phase of a reference beacon to fix the origin of a coordinates system and the coordinates of each transportable reception means. Each of the reception means including a transceiver where the reception means is distributed around the subject and the reference beacon is attached to a given fixed location on the subject. The method includes measuring the phase shift of the frequency transmitted by the transmission means of the ingestible element to obtain at least three phase-shift measurements and determining by triangulation based on the phase-shift measurements a position of the ingestible element in the coordinates system. | 03-24-2011 |
Mohamed Bouchoucha, Grenoble FR
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20120153475 | METHOD OF ASSEMBLING TWO INTEGRATED CIRCUITS AND CORRESPONDING STRUCTURE - A semiconductor device includes an assembly of two integrated circuits. The assembly has a layer of photoresist filling the space between the two integrated circuits, and at least one electrically conducting pillar within the resist and electrically coupling the two integrated circuits. | 06-21-2012 |
20130112974 | METHOD FOR DETERMINING THE LOCAL STRESS INDUCED IN A SEMICONDUCTOR MATERIAL WAFER BY THROUGH VIAS - A method for determining, in a first semiconductor material wafer having at least one through via, mechanical stress induced by the at least one through via, this method including the steps of: manufacturing a test structure from a second wafer of the same nature as the first wafer, in which the at least one through via is formed by a substantially identical method, a rear surface layer being further arranged on this second wafer so that the via emerges on the layer; measuring the mechanical stress in the rear surface layer; and deducing therefrom the mechanical stress induced in the first semiconductor material wafer. | 05-09-2013 |
Mohamed Bouchoucha, Gardane FR
Patent application number | Description | Published |
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20130207279 | METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT COMPRISING VIAS CROSSING THE SUBSTRATE - A method for forming an integrated circuit including the steps of: | 08-15-2013 |