Patent application number | Description | Published |
20090319717 | SCALABLE DISTRIBUTED MEMORY AND I/O MULTIPROCESSOR SYSTEMS AND ASSOCIATED METHODS - A multiprocessor system comprises at least one processing module, at least one I/O module, and an interconnect network to connect the at least one processing module with the at least one input/output module. In an example embodiment, the interconnect network comprises at least two bridges to send and receive transactions between the input/output modules and the processing module. The interconnect network further comprises at least two crossbar switches to route the transactions over a high bandwidth switch connection. Using embodiments of the interconnect network allows high bandwidth communication between processing modules and I/O modules. Standard processing module hardware can be used with the interconnect network without modifying the BIOS or the operating system. Furthermore, using the interconnect network of embodiments of the present invention is non-invasive to the processor motherboard. The processor memory bus, clock, and reset logic all remain intact. | 12-24-2009 |
20120317328 | SCALABLE DISTRIBUTED MEMORY AND I/O MULTIPROCESSOR SYSTEM - A multiprocessor system comprises at least one processing module, at least one I/O module, and an interconnect network to connect the at least one processing module with the at least one input/output module. In an example embodiment, the interconnect network comprises at least two bridges to send and receive transactions between the input/output modules and the processing module. The interconnect network further comprises at least two crossbar switches to route the transactions over a high bandwidth switch connection. Using embodiments of the interconnect network allows high bandwidth communication between processing modules and I/O modules. Standard processing module hardware can be used with the interconnect network without modifying the BIOS or the operating system. Furthermore, using the interconnect network of embodiments of the present invention is non-invasive to the processor motherboard. The processor memory bus, clock, and reset logic all remain intact. | 12-13-2012 |
Patent application number | Description | Published |
20100115301 | CPU POWER DELIVERY SYSTEM - A central processing unit (CPU) is disclosed. The CPU includes a CPU die; and a voltage regulator die bonded to the CPU die in a three dimensional packaging layout. | 05-06-2010 |
20100219516 | Power management integrated circuit - An integrated circuit (IC) package is disclosed. The IC package includes a first die; and a second die bonded to the CPU die in a three dimensional packaging layout. | 09-02-2010 |
20100328946 | LIGHT DEVICES HAVING CONTROLLABLE LIGHT EMITTING ELEMENTS - In some embodiments, a light device for generating light includes light emitting diodes (LEDs), and power supply circuitry including at least one switching regulator including switching elements to provide power to the LEDs. The light device includes a device support structure including a device connector and an LED support to support the LEDs, wherein the device connector is one end of the device support structure, and the power supply circuitry is supported by the device support structure. Other embodiments are described. | 12-30-2010 |
20120221884 | ERROR MANAGEMENT ACROSS HARDWARE AND SOFTWARE LAYERS - Generally, this disclosure provides error management across hardware and software layers to enable hardware and software to deliver reliable operation in the face of errors and hardware variation due to aging, manufacturing tolerances, etc. In one embodiment, an error management module is provided that gathers information from the hardware and software layers, and detects and diagnoses errors. A hardware or software recovery technique may be selected to provide efficient operation, and, in some embodiments, the hardware device may be reconfigured to prevent future errors and to permit the hardware device to operate despite a permanent error. | 08-30-2012 |
20130271091 | Ultra-Capacitor Based Energy Storage in a Battery Form Factor - An ultra-capacitor based energy source may replace rechargeable and conventional batteries. It may have the form factor of a conventional battery and may emulate the discharge characteristics of the replaced battery. | 10-17-2013 |
20130271092 | Ultra-Capacitor Based Energy Storage for Appliances - An ultra-capacitor may replace a rechargeable battery in consumer applications where the appliance usage is not prolonged. That is, if the usage is intermittent, the ultra-capacitor can quickly recharge between consecutive uses. Especially for those applications where an appliance spends most of the time on a charging cradle ultra-capacitor may efficiently replace batteries in appliances. | 10-17-2013 |
20130282992 | OBJECT-AWARE STORAGE - A storage unit may have an associated processor and storage controller. The storage controller associated with the storage unit may store a mapping of objects (i.e., data) to blocks in the storage unit. This mapping may be received from another source, such as a file system, database, or software application, among other possibilities. The processor associated with the storage unit may execute operation s on the objects stored in the storage unit. | 10-24-2013 |
20140055054 | LIGHT DEVICES HAVING CONTROLLABLE LIGHT EMITTING ELEMENTS - In some embodiments, a light device for generating light includes light emitting diodes (LEDs), and power supply circuitry including at least one switching regulator including switching elements to provide power to the LEDs. The light device includes a device support structure including a device connector and an LED support to support the LEDs, wherein the device connector is one end of the device support structure, and the power supply circuitry is supported by the device support structure. Other embodiments are described. | 02-27-2014 |
20140089687 | POWER MANAGEMENT INTEGRATED CIRCUIT - An integrated circuit (IC) package is disclosed. The IC package includes a first die; and a second die bonded to the CPU die in a three dimensional packaging layout. | 03-27-2014 |