Patent application number | Description | Published |
20100189168 | SYSTEM, METHOD AND DEVICE FOR AUTONEGOTIATION - Disclosed are a system, method and device for negotiating a data transmission mode over an attachment unit interface (DDI). A data transceiver circuit may be coupled to one or more data lanes of the DDI. A negotiation section may receive a link pulse signal on at least one data lane in the DDI during a negotiation period and selectively configure the data transceiver to transmit and receive data on one or more data lanes according to a data transmission mode based upon the received link pulse signal. | 07-29-2010 |
20130325998 | System and Method for Providing Input/Output Functionality by an I/O Complex Switch - An input/output (I/O) device includes a management controller interface, a plurality of network switching interfaces, a storage interface, a component controller interface, and a plurality of multifunction modules. The multifunction modules further include a processing node interface, a first endpoint coupled to the management controller interface, a second endpoint coupled to one of the plurality of network switching interfaces, a third endpoint coupled to a remote direct memory access (RDMA) block, a fourth endpoint coupled to the storage interface, and a fifth endpoint coupled to the component controller interface. | 12-05-2013 |
20130332719 | System and Method for Providing Input/Output Functionality to a Processing Node - A remote component controller of a server rack includes a real time clock information unit to maintain real clock time and to respond to requests for real time clock information, and a communication module to receive over a communication link a request from a processing node of the server rack for real time clock information, to forward the request to the real time clock information unit, to receive from the real time clock information unit a response to the request, and to transmit the response to the request to the processing node over the communication link. | 12-12-2013 |
20130339479 | System and Method for Providing a Processing Node with Input/Output Functionality by an I/O Complex Switch - A system includes first and second processing nodes and a network switch coupled to the first and second processing nodes via respective first and second interfaces. The network switch includes a management controller coupled to the interfaces to provide management functions to the processing nodes, first and second network interfaces coupled respectively to the first and second interfaces to provide network access for the processing nodes, a message passing interface between the first processing node and the second processing node, a storage interface coupled to the first and second interfaces to provide a storage capacity to the processing nodes, and a remote component controller coupled to the interfaces. | 12-19-2013 |
20130339714 | System and Method for Providing a Processing Node with Input/Output Functionality Provided by an I/O Complex Switch - A processing node of a server rack includes a processor to generate processing node management requests and to process responses to the node management requests, and a communication module to receive the processing node management requests, to transmit over a communication link to a management controller of the server rack external to the processing node a processing node management request, to receive over the communication link from the management controller processing node management information, and to transmit the processing node management information to the processor. | 12-19-2013 |
20140019661 | System and Method for Providing Network Access for a Processing Node - A network interface controller includes a plurality of host interfaces configured to communicate with a plurality of processing nodes, a plurality of network interfaces configured to provide network communication for the processing nodes to a network, and a shared resource configured to provide link based services and stateless offload services for the processing nodes when communicating with the network. | 01-16-2014 |
20140195831 | ADVANCED PoE POWER CONTROL - A power sourcing equipment (PSE) device including a power over Ethernet (PoE) interface. A processor is coupled to the PoE interface. A memory is coupled to the processor and includes instruction that, when executed by the processor, cause the processor to perform a number of functions. The processor may supply power at a first power level to a PD that is coupled to the PoE interface. The processor may then determine an actual power consumption of the PD. The processor may then send a first Link Layer Discovery Protocol (LLDP) packet to the PD over the PoE interface that includes first proposed power level information that is based on the actual power consumption of the PD. Then processor may then supply power to the PD at a second power level that is different from the first power level. | 07-10-2014 |
20150055663 | INTERCONNECT SIGNAL TRANSMISSION SYSTEM - Systems and methods for transmitting interconnect signals include a source device having a first source device input connector of a first interconnect technology, a second source device input connector of a second interconnect technology, and a source device output connector. A cable includes a first connector that is coupled to the source device output connector, a second connector, and a transmission line extending between the first connector and the second connector. A receive device is coupled to the second connector. The transmission line is configured to pass a first signal of the first interconnect technology and a second signal of the second interconnect technology, received through the source device output connector by the first connector, to the second connector. The first and second signal may be multiplexed into a single stream before being passed over the transmission line, and then demultiplexed for use by the receive device. | 02-26-2015 |
Patent application number | Description | Published |
20080290076 | Methods for Securing Strand Ends and the Resulting Devices - Methods for securing strand ends of devices configured for insertion into an anatomical structure, and the resulting devices. | 11-27-2008 |
20120279030 | SECURED STRAND END DEVICES - A woven, self-expanding stent device has one or more strands and is configured for insertion into an anatomical structure. The device includes a coupling structure secured to two different strand end portions that are substantially aligned with each other. The two different strand end portions include nickel and titanium. The coupling structure is not a strand of the device. | 11-08-2012 |
20120283818 | SECURED STRAND END DEVICES - A woven, self-expanding stent device has one or more strands and is configured for insertion into an anatomical structure. The device includes a coupling structure secured to two different strand end portions that are substantially aligned with each other. The two different strand end portions include nickel and titanium. The coupling structure is not a strand of the device. | 11-08-2012 |
20140230204 | METHODS FOR MANUFACTURING SECURED STRAND END DEVICES - A woven, self-expanding stent device has one or more strands and is configured for insertion into an anatomical structure. The device includes a coupling structure secured to two different strand end portions that are substantially aligned with each other. The two different strand end portions include nickel and titanium. The coupling structure is not a strand of the device. | 08-21-2014 |
20140277329 | SECURED STRAND END DEVICES - A woven, self-expanding stent device has one or more strands and is configured for insertion into an anatomical structure. The device includes a coupling structure secured to two different strand end portions that are substantially aligned with each other. The two different strand end portions include nickel and titanium. The coupling structure is not a strand of the device. | 09-18-2014 |
20150081008 | DEVICES AND METHODS FOR STENT ADVANCEMENT - Devices and methods for stent advancement, including methods for instructing another or others how to advance a stent into an anatomical structure or into a testing/demonstration synthetic structure, such as a polymer tube. The advancement may be achieved by at least two periods of stent engagement that drive a stent distally from a sheath separated by a period of non-engagement. | 03-19-2015 |
Patent application number | Description | Published |
20090021989 | PROGRAMMABLE BIAS FOR A MEMORY ARRAY - A method determines a body bias for a memory cell. A supply voltage is applied to the memory cell and a bit line is precharged to a voltage lower than the supply voltage. A programmable bias voltage circuit provides a bias voltage to the memory cell in response to values on its input. Initial test values for the input are used. The memory cell is tested to determine a pass or a fail condition of the memory cell. The initial values are retained as the input values if the memory cell passes. If the memory cell fails, the memory cell is tested at changed values for the input. If the changed input values result in the memory cell being in a pass condition, the programmable bias voltage circuit is configured, in non-volatile fashion, to have the changed input values. | 01-22-2009 |
20090075428 | ELECTROMAGNETIC SHIELD FORMATION FOR INTEGRATED CIRCUIT DIE PACKAGE - Electromagnetic shielding for an integrated circuit packaged device. The method includes forming shielding structures by forming openings in an encapsulated structure. The openings are filled with conductive material that surrounds at least one die. The encapsulated structure may include a plurality of integrated circuit die. A layered redistribution structure is formed on one side of the encapsulated structure. | 03-19-2009 |
20090242994 | HYBRID TRANSISTOR BASED POWER GATING SWITCH CIRCUIT AND METHOD - A method includes forming a first transistor having a first gate dielectric thickness and a first source/drain extension depth, a second transistor having a second gate dielectric thickness and the first source/drain extension depth, and a third transistor having the second gate dielectric thickness and a second source/drain extension depth. The second source/drain extension depth is greater than the first source/drain extension depth. The second gate dielectric thickness is greater than the first gate dielectric thickness. The first transistor is used in a logic circuit. The third transistor is used in an I/O circuit. The second transistor is made without extra processing steps and is better than either the first or third transistor for coupling a power supply terminal to the logic circuit in a power-up mode and decoupling the power supply terminal from the logic circuit in a power-down mode. | 10-01-2009 |
20110003435 | ELECTROMAGNETIC SHIELD FORMATION FOR INTEGRATED CIRCUIT DIE PACKAGE - Electromagnetic shielding for an integrated circuit packaged device. The method includes forming shielding structures by forming openings in an encapsulated structure. The openings are filled with conductive material that surrounds at least one die. The encapsulated structure may include a plurality of integrated circuit die. A layered redistribution structure is formed on one side of the encapsulated structure. | 01-06-2011 |