Patent application number | Description | Published |
20090020805 | NON-VOLATILE MEMORY DEVICES AND METHODS OF FORMING THE SAME - A non-volatile memory device includes a dielectric layer between a charge storage layer and a substrate. Free bonds of the dielectric layer can be reduced to reduce/prevent charges from leaking through the free bonds and/or from being trapped by the free bonds. As a result, data retention properties and/or durability of a non-volatile memory device may be enhanced. | 01-22-2009 |
20090042383 | METHOD OF FABRICATING A SEMICONDUCTOR DEVICE - A method of forming a dielectric layer having an air gap to isolate adjacent wirings or a gate stack of the semiconductor device is provided. A method of fabricating a semiconductor device includes providing a semiconductor substrate on which a plurality of wirings are formed adjacent to one another and forming a dielectric layer filling an upper portion of a space between the adjacent wirings to form air gaps by a thermal chemical vapor deposition method. | 02-12-2009 |
20090072294 | Method of manufacturing a non-volatile memory device - A method of manufacturing a non-volatile memory device employing a relatively thin polysilicon layer as a floating gate is disclosed, wherein a tunnel oxide layer is formed on a substrate and a polysilicon layer having a thickness of about 35 Å to about 200 Å is then formed on the tunnel oxide layer using a trisilane (Si | 03-19-2009 |
20090134450 | Tunneling insulating layer, flash memory device including the same, memory card and system including the flash memory device, and methods of manufacturing the same - Provided is a tunneling insulating layer, a flash memory device including the same that increases a program/erase operation speed of the flash memory device and has improved data retention in order to increase reliability of the flash memory device, a memory card and system including the flash memory device, and methods of manufacturing the same. A tunneling insulating layer may include a first region and a second region on the first region, wherein the first region has a first nitrogen atomic percent, the second region has a second nitrogen atomic percent, and the second nitrogen atomic percent is less than the first nitrogen atomic percent. The flash memory device according to example embodiments may include a substrate including source and drain regions and a channel region between the source and drain regions, the tunneling insulating layer on the channel region, a charge storage layer on the tunneling insulating layer, a blocking insulation layer on the charge storage layer, and a gate electrode on the blocking insulation layer. | 05-28-2009 |
20090203190 | Method of forming a mask stack pattern and method of manufacturing a flash memory device including an active area having rounded corners - A method of forming a mask stack pattern and a method of manufacturing a flash memory device including an active area having rounded corners are provided. The method of manufacture including forming a mask stack pattern defining an active region, the mask stack pattern having a pad oxide layer formed on a semiconductor substrate, a silicon nitride layer formed on the pad oxide layer and a stack oxide layer formed on the silicon nitride layer, oxidizing a surface of the semiconductor substrate exposed by the mask stack pattern and lateral surfaces of the silicon nitride layer such that corners of the active region are rounded, etching the semiconductor substrate having an oxidized surface to form a trench in the semiconductor substrate, forming a device isolation oxide layer in the trench, removing the silicon nitride layer from the semiconductor substrate, and forming a gate electrode in a portion where the silicon nitride layer is removed. | 08-13-2009 |
20110275190 | METHOD OF FORMING AN INSULATION STRUCTURE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE USING THE SAME - In a method of forming an insulation structure, at least one oxide layer is formed on an object by at least one oxidation process, and then at least one nitride layer is formed from the oxide layer by at least one nitration process. An edge portion of the insulation structure may have a thickness substantially the same as that of a central portion of the insulation structure so that the insulation structure may have a uniform thickness and improved insulation characteristics. When the insulation structure is employed as a tunnel insulation layer of a semiconductor device, the semiconductor device may have enhanced endurance and improved electrical characteristics because a threshold voltage distribution of cells in the semiconductor device may become uniform. | 11-10-2011 |
20120129356 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE - A method of forming a dielectric layer having an air gap to isolate adjacent wirings or a gate stack of the semiconductor device is provided. A method of fabricating a semiconductor device includes providing a semiconductor substrate on which a plurality of wirings are formed adjacent to one another and forming a dielectric layer filling an upper portion of a space between the adjacent wirings to form air gaps by a thermal chemical vapor deposition method. | 05-24-2012 |
20140217483 | SEMICONDUCTOR DEVICES INCLUDING GATE PATTERN, MULTI-CHANNEL ACTIVE PATTERN AND DIFFUSION LAYER - A semiconductor device includes a gate pattern on a substrate, a multi-channel active pattern under the gate pattern to cross the gate pattern and having a first region not overlapping the gate pattern and a second region overlapping the gate pattern, a diffusion layer in the multi-channel active pattern along the outer periphery of the first region and including an impurity having a concentration, and a liner on the multi-channel active pattern, the liner extending on lateral surfaces of the first region and not extending on a top surface of the first region. Related fabrication methods are also described. | 08-07-2014 |
20140220752 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A method of fabricating a semiconductor device is described. The method of fabricating a semiconductor device comprises providing a fin formed to protrude from a substrate and a plurality of gate electrodes formed on the fin to intersect the fin; forming first recesses in the fin on at least one side of the respective gate electrodes; forming an oxide layer on the surfaces of the first recesses; and expanding the first recesses into second recesses by removing the oxide layer. Related devices are also disclosed. | 08-07-2014 |
20140299934 | Semiconductor Device and Method for Fabricating the Same - Provided is a semiconductor device. The semiconductor device includes a fin on a substrate; a gate electrode cross the fin on the substrate; a source/drain formed on at least one of both sides of the gate electrode, and including a first film and a second film; and a stress film arranged between an isolation film on the substrate and the source/drain, and formed on a side surface of the fin. | 10-09-2014 |
20150035023 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device may include first and second fins formed side by side on a substrate, a first elevated doped region formed on the first fin and having a first doping concentration of impurities, a second elevated doped region formed on the second fin, and a first bridge connecting the first elevated doped region and the second elevated doped region to each other. Methods of manufacturing such a semiconductor device are also disclosed. | 02-05-2015 |